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From: "Arnd Bergmann" <arnd@arndb.de>
To: "Ciprian Costea" <ciprianmarian.costea@oss.nxp.com>,
	"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Catalin Marinas" <catalin.marinas@arm.com>,
	"Will Deacon" <will@kernel.org>
Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	"NXP S32 Linux Team" <s32@nxp.com>,
	imx@lists.linux.dev, "Christophe Lizzi" <clizzi@redhat.com>,
	"Alberto Ruiz" <aruizrui@redhat.com>,
	"Enric Balletbo" <eballetb@redhat.com>,
	"Bogdan Hamciuc" <bogdan.hamciuc@nxp.com>,
	"Ghennadi Procopciuc" <Ghennadi.Procopciuc@nxp.com>,
	"Daniel Lezcano" <daniel.lezcano@linaro.org>,
	"Thomas Gleixner" <tglx@linutronix.de>
Subject: Re: [PATCH v6 2/4] rtc: s32g: add NXP S32G2/S32G3 SoC support
Date: Tue, 10 Dec 2024 09:22:51 +0100	[thread overview]
Message-ID: <fc50d8a7-cc59-42dd-aafd-7da49fadee45@app.fastmail.com> (raw)
In-Reply-To: <42d39f8e-0b59-4185-af1f-f778522608d2@oss.nxp.com>

On Mon, Dec 9, 2024, at 18:17, Ciprian Marian Costea wrote:
> On 12/6/2024 2:41 PM, Arnd Bergmann wrote:

>> I think storing 'rtc_hz' as a u32 variable and adding a range
>> check when filling it would help, mainly to save the next reader
>> from having to understand what is going on.
>> 
>
> The confusion on my end is that I cannot see where 'div_u64() implicitly 
> casts the dividend 'hz' from 64-bit to 32-bit' by following the method's 
> implementation [1]

I mean passing a 64-bit variable into a function that takes a
32-bit argument truncates the range.

> But I agree that 'rtc_hz' can be stored into a 32-bit variable with a 
> range check added when it is taken from the Linux clock API to avoid any
> unneeded abstractions.

ok

>> 
>> This is the same as just removing the error handling and
>> relying on unsigned integer overflow semantics.
>> 
>> The usual check we do in time_before()/time_after instead
>> checks if the elapsed time is less than half the available
>> range:
>> 
>> #define time_after(a,b)         \
>>          (typecheck(unsigned long, a) && \
>>           typecheck(unsigned long, b) && \
>>           ((long)((b) - (a)) < 0))
>> 
>
> Ok. Thanks for the suggestion. I will look into using 
> 'time_before()/time_after()' API instead of directly checking via 
> comparison operators.

To be clear: you can't directly use time_before() here because
that takes an 'unsigned long' argument, so you want the
same logic, but for u32 values. I have not found an existing
helper for that, but it's possible I missed it.

>> Who sets that alarm though? Are you relying on custom userspace
>> for this, or is that something that the kernel already does
>> that I'm missing?
>
> The test usage is via 'rtcwake' [2] userspace tool.
> I've detailed a bit the testing scenario in the cover letter for this 
> patchset [3]:
>
> "
> Following is an example of Suspend to RAM trigger on S32G2/S32G3 SoCs,
> using userspace tools such as rtcwake:
> # rtcwake -s 2 -m mem
> # rtcwake: assuming RTC uses UTC ...
> # rtcwake: wakeup from "mem" using /dev/rtc0 at Wed Feb  6 06:28:36 2036

Got it. I feel this also needs either some documentation in
the source code, or some infrastructure in the rtc layer if
this is a common problem in other drivers as well. If there
is a maximum time that the system can be suspended for without
a wakeup, why not just set an earlier wakeup in the kernel
when you have all the information for it?

Or maybe this should not actually be an 'rtc' driver at all?
In the old days, we used drivers like
arch/arm/mach-omap1/timer32k.c to register a handler
for read_persistent_clock64(), which completely bypasses
the RTC layer and provides both automatic wakeup and more
accurate accounting of sleep time. 

Another example was the tegra clocksource driver, which used
to use read_persistent_clock64() but changed to being
a CLOCK_SOURCE_SUSPEND_NONSTOP source in 95170f0708f2
("clocksource/drivers/tegra: Rework for compensation of
suspend time"). The same seems true for timer-ti-32k.c and
timer-sprd.c.

Alexandre, Daniel, any recommendations here?

     Arnd

  reply	other threads:[~2024-12-10  8:23 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-06  7:09 [PATCH v6 0/4] add NXP RTC driver support for S32G2/S32G3 SoCs Ciprian Costea
2024-12-06  7:09 ` [PATCH v6 1/4] dt-bindings: rtc: add schema for NXP " Ciprian Costea
2024-12-10 23:04   ` Rob Herring (Arm)
2024-12-06  7:09 ` [PATCH v6 2/4] rtc: s32g: add NXP S32G2/S32G3 SoC support Ciprian Costea
2024-12-06  8:04   ` Arnd Bergmann
2024-12-06 12:05     ` Ciprian Marian Costea
2024-12-06 12:41       ` Arnd Bergmann
2024-12-09 17:17         ` Ciprian Marian Costea
2024-12-10  8:22           ` Arnd Bergmann [this message]
2024-12-10 23:07             ` Alexandre Belloni
2024-12-10  5:22   ` kernel test robot
2024-12-10 23:25   ` Alexandre Belloni
2025-02-06 10:36     ` Ciprian Marian Costea
2024-12-06  7:09 ` [PATCH v6 3/4] arm64: defconfig: add S32G RTC module support Ciprian Costea
2024-12-06  7:09 ` [PATCH v6 4/4] MAINTAINERS: add NXP S32G RTC driver Ciprian Costea

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