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From: Hakyeong Kim <hgkim05@coasia.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
	ksk4725@coasia.com, Jesper Nilsson <jesper.nilsson@axis.com>,
	Michael Turquette <mturquette@baylibre.com>,
	 Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
	 Ravi Patel <ravi.patel@samsung.com>,
	SungMin Park <smn1196@coasia.com>
Cc: kenkim <kenkim@coasia.com>, Jongshin Park <pjsin865@coasia.com>,
	GunWoo Kim <gwk1013@coasia.com>,
	GyoungBo Min <mingyoungbo@coasia.com>,
	Pankaj Dubey <pankaj.dubey@samsung.com>,
	Shradha Todi <shradha.t@samsung.com>,
	Inbaraj E <inbaraj.e@samsung.com>,
	Swathi K S <swathi.ks@samsung.com>,
	Hrishikesh <hrishikesh.d@samsung.com>,
	Dongjin Yang <dj76.yang@samsung.com>,
	Sang Min Kim <hypmean.kim@samsung.com>,
	linux-kernel@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org,  linux-arm-kernel@axis.com,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-gpio@vger.kernel.org, soc@lists.linux.dev
Subject: Re: [PATCH 02/16] dt-bindings: clock: Add ARTPEC-8 CMU bindings
Date: Mon, 21 Jul 2025 13:31:53 +0900	[thread overview]
Message-ID: <fd261b5b4452cc797f50bb3fc8cfe93e4a38e477.camel@coasia.com> (raw)
In-Reply-To: <7b9a8203-2d66-4735-a6a2-762f57fb5cef@kernel.org>

On Thu, 2025-07-10 at 09:10 +0200, Krzysztof Kozlowski wrote:
> On 10/07/2025 02:20, ksk4725@coasia.com wrote:
> > From: Hakyeong Kim <hgkim05@coasia.com>
> > 
> > Add dt-schema for ARTPEC-8 SoC clock controller.
> > 
> > Add device-tree binding definitions for following CMU blocks:
> > - CMU_CMU
> > - CMU_BUS
> > - CMU_CORE
> > - CMU_CPUCL
> > - CMU_FSYS
> > - CMU_IMEM
> > - CMU_PERI
> > 
> > Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
> > Signed-off-by: Hakyeong Kim <hgkim05@coasia.com>
> 
> Confusing order, unless you really understand this, but considering
> you
> did not add your own SoB I claim you do not understand this. What
> does
> Ravi's SoB mean here?

Ok, I will update the SoB section in all the patches.

> 
> > ---
> >  .../bindings/clock/axis,artpec8-clock.yaml    | 224
> > ++++++++++++++++++
> >  1 file changed, 224 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/clock/axis,artpec8-clock.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/clock/axis,artpec8-
> > clock.yaml b/Documentation/devicetree/bindings/clock/axis,artpec8-
> > clock.yaml
> > new file mode 100644
> > index 000000000000..baacea10599b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/axis,artpec8-
> > clock.yaml
> > @@ -0,0 +1,224 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/clock/axis,artpec8-clock.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Axis ARTPEC-8 SoC clock controller
> > +
> > +maintainers:
> > +  - Jesper Nilsson <jesper.nilsson@axis.com>
> > +
> > +description: |
> > +  ARTPEC-8 clock controller is comprised of several CMU units,
> > generating
> > +  clocks for different domains. Those CMU units are modeled as
> > separate device
> > +  tree nodes, and might depend on each other. The root clock in
> > that root tree
> > +  is an external clock: OSCCLK (25 MHz). This external clock must
> > be defined
> > +  as a fixed-rate clock in dts.
> > +
> > +  CMU_CMU is a top-level CMU, where all base clocks are prepared
> > using PLLs and
> > +  dividers; all other clocks of function blocks (other CMUs) are
> > usually
> > +  derived from CMU_CMU.
> > +
> > +  Each clock is assigned an identifier and client nodes can use
> > this identifier
> > +  to specify the clock which they consume. All clocks available
> > for usage
> > +  in clock consumer nodes are defined as preprocessor macros in
> > +  'include/dt-bindings/clock/axis,artpec8-clk.h' header.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - axis,artpec8-cmu-cmu
> > +      - axis,artpec8-cmu-bus
> > +      - axis,artpec8-cmu-core
> > +      - axis,artpec8-cmu-cpucl
> > +      - axis,artpec8-cmu-fsys
> > +      - axis,artpec8-cmu-imem
> > +      - axis,artpec8-cmu-peri
> > +
> > +  clocks:
> > +    minItems: 1
> > +    maxItems: 5
> > +
> > +  clock-names:
> > +    minItems: 1
> > +    maxItems: 5
> > +
> > +  "#clock-cells":
> > +    const: 1
> > +
> > +  reg:
> > +    maxItems: 1
> 
> reg goes second, after compatible (Samsung bindings are not the best
> example because I converted them long time ago before many coding
> style
> practices were encouraged)

Ok, I will move the reg property.

> 
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - "#clock-cells"
> > +  - clocks
> > +  - clock-names
> > +
> > +allOf:
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> 
> Drop contains.

Ok, I will remove the contains wherever applicable.

> 
> > +            const: axis,artpec8-cmu-cmu
> > +
> > +    then:
> > +      properties:
> > +        clocks:
> > +          items:
> > +            - description: External reference clock (25 MHz)
> > +
> > +        clock-names:
> > +          items:
> > +            - const: fin_pll
> > +
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: axis,artpec8-cmu-bus
> > +
> > +    then:
> > +      properties:
> > +        clocks:
> > +          items:
> > +            - description: External reference clock (25 MHz)
> > +            - description: CMU_BUS BUS clock (from CMU_CMU)
> > +            - description: CMU_BUS DLP clock (from CMU_CMU)
> > +
> > +        clock-names:
> > +          items:
> > +            - const: fin_pll
> > +            - const: dout_clkcmu_bus_bus
> > +            - const: dout_clkcmu_bus_dlp
> 
> All these names should be changed to match what is the input. Look at
> latest bindings, we moved away from that style.

Ok, I will modify clock-names to "bus" and "dlp" and will update at the
other related places also.

Thanks,
Hakyeong Kim

> 
> 
> 
> Best regards,
> Krzysztof


  reply	other threads:[~2025-07-21  4:31 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-10  0:20 [PATCH 00/16] Add support for the Axis ARTPEC-8 SoC ksk4725
2025-07-10  0:20 ` [PATCH 01/16] dt-bindings: clock: Add CMU bindings definitions for ARTPEC-8 platform ksk4725
2025-07-10  7:07   ` Krzysztof Kozlowski
2025-07-21  4:31     ` Hakyeong Kim
2025-07-10  0:20 ` [PATCH 02/16] dt-bindings: clock: Add ARTPEC-8 CMU bindings ksk4725
2025-07-10  7:10   ` Krzysztof Kozlowski
2025-07-21  4:31     ` Hakyeong Kim [this message]
2025-07-10  0:20 ` [PATCH 03/16] clk: samsung: Add clock PLL support for ARTPEC-8 SoC ksk4725
2025-07-10  0:20 ` [PATCH 04/16] clk: samsung: artpec-8: Add initial clock support ksk4725
2025-07-10  7:12   ` Krzysztof Kozlowski
2025-07-21  4:32     ` Hakyeong Kim
2025-07-10  0:20 ` [PATCH 05/16] clk: samsung: artpec-8: Add clock support for CMU_CMU block ksk4725
2025-07-10  0:20 ` [PATCH 06/16] clk: samsung: artpec-8: Add clock support for CMU_BUS block ksk4725
2025-07-10  0:20 ` [PATCH 07/16] clk: samsung: artpec-8: Add clock support for CMU_CORE block ksk4725
2025-07-10  0:20 ` [PATCH 08/16] clk: samsung: artpec-8: Add clock support for CMU_CPUCL block ksk4725
2025-07-10  0:20 ` [PATCH 09/16] clk: samsung: artpec-8: Add clock support for CMU_FSYS block ksk4725
2025-07-10  0:20 ` [PATCH 10/16] clk: samsung: artpec-8: Add clock support for CMU_PERI block ksk4725
2025-07-10  7:13   ` Krzysztof Kozlowski
2025-07-21  4:32     ` Hakyeong Kim
2025-07-10  0:20 ` [PATCH 11/16] dt-bindings: pinctrl: samsung: Add compatible for ARTPEC-8 SoC ksk4725
2025-07-10  0:20 ` [PATCH 12/16] pinctrl: samsung: Add ARTPEC-8 SoC specific configuration ksk4725
2025-07-10  0:20 ` [PATCH 13/16] dt-bindings: arm: Add Axis ARTPEC SoC platform ksk4725
2025-07-10  7:15   ` Krzysztof Kozlowski
2025-07-21  6:36     ` sungmin
2025-07-10  0:20 ` [PATCH 14/16] arm64: dts: axis: Add initial device tree support ksk4725
2025-07-10  7:02   ` Krzysztof Kozlowski
2025-07-21  7:08     ` sungmin park
2025-07-21  7:17       ` Krzysztof Kozlowski
2025-07-10  7:48   ` Arnd Bergmann
2025-07-10 10:14     ` Krzysztof Kozlowski
2025-07-10  0:20 ` [PATCH 15/16] arm64: dts: axis: Add initial pinctrl support ksk4725
2025-07-10  7:04   ` Krzysztof Kozlowski
2025-07-21  4:48     ` SeonGu Kang
2025-07-10  0:20 ` [PATCH 16/16] arm64: defconfig: Enable Axis ARTPEC SoC ksk4725
2025-07-10  7:07 ` [PATCH 00/16] Add support for the Axis ARTPEC-8 SoC Krzysztof Kozlowski
2025-07-21  4:50   ` SeonGu Kang
2025-07-21  6:39     ` Krzysztof Kozlowski
2025-08-06  8:22       ` Pankaj Dubey
2025-08-06  8:36         ` Krzysztof Kozlowski
2025-08-06  9:05           ` Pankaj Dubey
2025-08-06  9:23             ` Krzysztof Kozlowski
2025-08-06 15:42               ` Arnd Bergmann
2025-08-07  6:56               ` Pankaj Dubey
2025-08-08 13:18                 ` 'Jesper Nilsson'
2025-07-12 19:26 ` Linus Walleij
2025-07-21  4:32   ` Hakyeong Kim
     [not found] ` <CGME20250821124014epcas5p12bacab10aac378f8d011fe7d2e04c8fa@epcas5p1.samsung.com>
2025-08-21 12:32   ` [PATCH v2 00/10] " Ravi Patel
     [not found]     ` <CGME20250821124019epcas5p42ac6e6abe1d3c8c9d69331596e51ad48@epcas5p4.samsung.com>
2025-08-21 12:32       ` [PATCH v2 01/10] dt-bindings: clock: Add ARTPEC-8 clock controller Ravi Patel
2025-08-22 19:39         ` Rob Herring (Arm)
     [not found]     ` <CGME20250821124024epcas5p349dda3c9e0523cc07acf2889476beeb1@epcas5p3.samsung.com>
2025-08-21 12:32       ` [PATCH v2 02/10] clk: samsung: Add clock PLL support for ARTPEC-8 SoC Ravi Patel
2025-08-22  6:32         ` Krzysztof Kozlowski
2025-08-22 12:08           ` Ravi Patel
     [not found]     ` <CGME20250821124029epcas5p1f04c643c243a7d388492b46341fb3c74@epcas5p1.samsung.com>
2025-08-21 12:32       ` [PATCH v2 03/10] clk: samsung: artpec-8: Add initial clock " Ravi Patel
     [not found]     ` <CGME20250821124034epcas5p350aeb42b9065fcbc3d9f713df1649574@epcas5p3.samsung.com>
2025-08-21 12:32       ` [PATCH v2 04/10] dt-bindings: pinctrl: samsung: Add compatible " Ravi Patel
2025-08-22 19:40         ` Rob Herring (Arm)
     [not found]     ` <CGME20250821124039epcas5p34b77813c9936b8b70c801e0e1b67891a@epcas5p3.samsung.com>
2025-08-21 12:32       ` [PATCH v2 05/10] pinctrl: samsung: Add ARTPEC-8 SoC specific configuration Ravi Patel
2025-08-21 16:50         ` Linus Walleij
     [not found]     ` <CGME20250821124045epcas5p37f0a50fb18e6f468a7c57ab406795419@epcas5p3.samsung.com>
2025-08-21 12:32       ` [PATCH v2 06/10] dt-bindings: arm: Convert Axis board/soc bindings to json-schema Ravi Patel
2025-08-22 19:41         ` Rob Herring (Arm)
     [not found]     ` <CGME20250821124050epcas5p22b08f66c69633f10986b7c19b3cd8cb4@epcas5p2.samsung.com>
2025-08-21 12:32       ` [PATCH v2 07/10] dt-bindings: arm: axis: Add ARTPEC-8 grizzly board Ravi Patel
2025-08-22 19:41         ` Rob Herring (Arm)
     [not found]     ` <CGME20250821124055epcas5p4d1072e9b4ef29587e0fd8606bc1abc4f@epcas5p4.samsung.com>
2025-08-21 12:32       ` [PATCH v2 08/10] arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support Ravi Patel
2025-08-22  6:38         ` Krzysztof Kozlowski
2025-08-22 11:48           ` Ravi Patel
     [not found]     ` <CGME20250821124100epcas5p42f719e140529823d9408b7325c646bbf@epcas5p4.samsung.com>
2025-08-21 12:32       ` [PATCH v2 09/10] arm64: dts: axis: Add ARTPEC-8 Grizzly dts support Ravi Patel
     [not found]     ` <CGME20250821124105epcas5p402a0f6ec6a893d0e5e305547976e4c80@epcas5p4.samsung.com>
2025-08-21 12:32       ` [PATCH v2 10/10] arm64: defconfig: Enable Axis ARTPEC SoC Ravi Patel
2025-08-22  6:26     ` [PATCH v2 00/10] Add support for the Axis ARTPEC-8 SoC Krzysztof Kozlowski
2025-08-22 11:50       ` Ravi Patel

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