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boundary="------------dT5J3fciB6XdX12J3tbfN9Ye"; protected-headers="v1" From: Matt Coster To: Michal Wilczynski , mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Message-ID: Subject: Re: [PATCH v4 10/18] drm/imagination: Add reset controller support for GPU initialization References: <20250128194816.2185326-1-m.wilczynski@samsung.com> <20250128194816.2185326-11-m.wilczynski@samsung.com> In-Reply-To: <20250128194816.2185326-11-m.wilczynski@samsung.com> --------------dT5J3fciB6XdX12J3tbfN9Ye Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 28/01/2025 19:48, Michal Wilczynski wrote: > Certain platforms, such as the T-Head TH1520 and Banana Pi BPI-F3, > require a controlled GPU reset sequence during the power-up procedure > to ensure proper initialization. Without this reset, the GPU may remain= > in an undefined state, potentially leading to stability or performance > issues. Can you reword this to clarify that _all_ IMG Rogue GPUs have a reset line that participates in the power-up sequence but some SoCs handle this in silicon and/or firmware without exposing the reset line directly (as the currently supported TI SoC does). >=20 > This commit integrates a dedicated reset controller within the > drm/imagination driver. By doing so, the driver can coordinate the > necessary reset operations as part of the normal GPU bring-up process, > improving reliability and ensuring that the hardware is ready for > operation. >=20 > Signed-off-by: Michal Wilczynski > --- > drivers/gpu/drm/imagination/pvr_device.c | 21 +++++++++++++++++++++ > drivers/gpu/drm/imagination/pvr_device.h | 9 +++++++++ > drivers/gpu/drm/imagination/pvr_power.c | 12 +++++++++++- > 3 files changed, 41 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/gpu/drm/imagination/pvr_device.c b/drivers/gpu/drm= /imagination/pvr_device.c > index 1704c0268589..ef73e95157ee 100644 > --- a/drivers/gpu/drm/imagination/pvr_device.c > +++ b/drivers/gpu/drm/imagination/pvr_device.c > @@ -25,6 +25,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -120,6 +121,21 @@ static int pvr_device_clk_init(struct pvr_device *= pvr_dev) > return 0; > } > =20 > +static int pvr_device_reset_init(struct pvr_device *pvr_dev) > +{ > + struct drm_device *drm_dev =3D from_pvr_device(pvr_dev); > + struct reset_control *reset; > + > + reset =3D devm_reset_control_get_optional_exclusive(drm_dev->dev, NUL= L); > + if (IS_ERR(reset)) > + return dev_err_probe(drm_dev->dev, PTR_ERR(reset), > + "failed to get gpu reset line\n"); > + > + pvr_dev->reset =3D reset; > + > + return 0; > +} > + > /** > * pvr_device_process_active_queues() - Process all queue related even= ts. > * @pvr_dev: PowerVR device to check > @@ -509,6 +525,11 @@ pvr_device_init(struct pvr_device *pvr_dev) > if (err) > return err; > =20 > + /* Get the reset line for the GPU */ > + err =3D pvr_device_reset_init(pvr_dev); > + if (err) > + return err; > + > /* Explicitly power the GPU so we can access control registers before= the FW is booted. */ > err =3D pm_runtime_resume_and_get(dev); > if (err) > diff --git a/drivers/gpu/drm/imagination/pvr_device.h b/drivers/gpu/drm= /imagination/pvr_device.h > index 6d0dfacb677b..f6576c08111c 100644 > --- a/drivers/gpu/drm/imagination/pvr_device.h > +++ b/drivers/gpu/drm/imagination/pvr_device.h > @@ -131,6 +131,15 @@ struct pvr_device { > */ > struct clk *mem_clk; > =20 > + /** > + * @reset: Optional reset line. > + * > + * This may be used on some platforms to provide a reset line that ne= eds to be de-asserted > + * after power-up procedure. It would also need to be asserted after = the power-down > + * procedure. > + */ > + struct reset_control *reset; > + > /** @irq: IRQ number. */ > int irq; > =20 > diff --git a/drivers/gpu/drm/imagination/pvr_power.c b/drivers/gpu/drm/= imagination/pvr_power.c > index ba7816fd28ec..e39460d594bd 100644 > --- a/drivers/gpu/drm/imagination/pvr_power.c > +++ b/drivers/gpu/drm/imagination/pvr_power.c > @@ -15,6 +15,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -252,6 +253,8 @@ pvr_power_device_suspend(struct device *dev) > clk_disable_unprepare(pvr_dev->sys_clk); > clk_disable_unprepare(pvr_dev->core_clk); > =20 > + err =3D reset_control_assert(pvr_dev->reset); > + > err_drm_dev_exit: > drm_dev_exit(idx); > =20 > @@ -282,16 +285,23 @@ pvr_power_device_resume(struct device *dev) > if (err) > goto err_sys_clk_disable; This is where I'd expect to see the 32 cycle delay that's currently in P9 ("reset: thead: Add TH1520 reset controller driver"). If it turns out that delay is required in the reset driver, would you be opposed to adding it here as well? It's a very small amount of time and would make this codepath more versatile to future reset controllers. Cheers, Matt > =20 > + err =3D reset_control_deassert(pvr_dev->reset); > + if (err) > + goto err_mem_clk_disable; > + > if (pvr_dev->fw_dev.booted) { > err =3D pvr_power_fw_enable(pvr_dev); > if (err) > - goto err_mem_clk_disable; > + goto err_reset_assert; > } > =20 > drm_dev_exit(idx); > =20 > return 0; > =20 > +err_reset_assert: > + reset_control_assert(pvr_dev->reset); > + > err_mem_clk_disable: > clk_disable_unprepare(pvr_dev->mem_clk); > =20 --=20 Matt Coster E: matt.coster@imgtec.com --------------dT5J3fciB6XdX12J3tbfN9Ye-- --------------DXa8rneT8fhJ55pTEKU0QuO5 Content-Type: application/pgp-signature; name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wnsEABYIACMWIQS4qDmoJvwmKhjY+nN5vBnz2d5qsAUCZ5zusgUDAAAAAAAKCRB5vBnz2d5qsJba AQCWFFQ0oujc0Pyob5edMcvzdr9QksGreyj/bM2gT+hnAgEAwQDrImD/aog93PRObykb6maOBgLQ c60MxnqbH+B3PwI= =bST6 -----END PGP SIGNATURE----- --------------DXa8rneT8fhJ55pTEKU0QuO5--