* [PATCH 1/4] dt-bindings: clock: Add support for LPASS Audio Clock Controller
2020-09-17 13:28 [PATCH 0/4] clk: qcom : add sm8250 LPASS GFM drivers Srinivas Kandagatla
@ 2020-09-17 13:28 ` Srinivas Kandagatla
2020-09-18 17:29 ` Rob Herring
2020-09-17 13:28 ` [PATCH 2/4] dt-bindings: clock: Add support for LPASS Always ON Controller Srinivas Kandagatla
` (2 subsequent siblings)
3 siblings, 1 reply; 12+ messages in thread
From: Srinivas Kandagatla @ 2020-09-17 13:28 UTC (permalink / raw)
To: sboyd, linux-clk, devicetree
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm, linux-kernel,
Srinivas Kandagatla
Audio Clock controller is a block inside LPASS which controls
2 Glitch free muxes to LPASS codec Macros.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../bindings/clock/qcom,audiocc-sm8250.yaml | 58 +++++++++++++++++++
.../clock/qcom,sm8250-lpass-audiocc.h | 13 +++++
2 files changed, 71 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml
create mode 100644 include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml
new file mode 100644
index 000000000000..915d76206ad0
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Clock bindings for LPASS Audio Clock Controller on SM8250 SoCs
+
+maintainers:
+ - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+
+description: |
+ The clock consumer should specify the desired clock by having the clock
+ ID in its "clocks" phandle cell.
+ See include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h for the full list
+ of Audio Clock controller clock IDs.
+
+properties:
+ compatible:
+ const: qcom,sm8250-lpass-audiocc
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+
+ clocks:
+ items:
+ - description: LPASS Core voting clock
+ - description: Glitch Free Mux register clock
+
+ clock-names:
+ items:
+ - const: core
+ - const: bus
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
+ #include <dt-bindings/sound/qcom,q6afe.h>
+ clock-controller@3300000 {
+ #clock-cells = <1>;
+ compatible = "qcom,sm8250-lpass-audiocc";
+ reg = <0x03300000 0x30000>;
+ clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "core", "bus";
+ };
diff --git a/include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h b/include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h
new file mode 100644
index 000000000000..a1aa6cb5d840
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _DT_BINDINGS_CLK_LPASS_AUDIOCC_SM8250_H
+#define _DT_BINDINGS_CLK_LPASS_AUDIOCC_SM8250_H
+
+/* From AudioCC */
+#define LPASS_CDC_WSA_NPL 0
+#define LPASS_CDC_WSA_MCLK 1
+#define LPASS_CDC_RX_MCLK 2
+#define LPASS_CDC_RX_NPL 3
+#define LPASS_CDC_RX_MCLK_MCLK2 4
+
+#endif /* _DT_BINDINGS_CLK_LPASS_AUDIOCC_SM8250_H */
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 1/4] dt-bindings: clock: Add support for LPASS Audio Clock Controller
2020-09-17 13:28 ` [PATCH 1/4] dt-bindings: clock: Add support for LPASS Audio Clock Controller Srinivas Kandagatla
@ 2020-09-18 17:29 ` Rob Herring
2020-09-23 10:25 ` Srinivas Kandagatla
0 siblings, 1 reply; 12+ messages in thread
From: Rob Herring @ 2020-09-18 17:29 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: sboyd, linux-arm-msm, linux-kernel, robh+dt, devicetree,
mturquette, bjorn.andersson, linux-clk
On Thu, 17 Sep 2020 14:28:47 +0100, Srinivas Kandagatla wrote:
> Audio Clock controller is a block inside LPASS which controls
> 2 Glitch free muxes to LPASS codec Macros.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> .../bindings/clock/qcom,audiocc-sm8250.yaml | 58 +++++++++++++++++++
> .../clock/qcom,sm8250-lpass-audiocc.h | 13 +++++
> 2 files changed, 71 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml
> create mode 100644 include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h
>
My bot found errors running 'make dt_binding_check' on your patch:
Error: Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.example.dts:25.30-31 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:342: Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1366: dt_binding_check] Error 2
See https://patchwork.ozlabs.org/patch/1366127
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:
pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/4] dt-bindings: clock: Add support for LPASS Audio Clock Controller
2020-09-18 17:29 ` Rob Herring
@ 2020-09-23 10:25 ` Srinivas Kandagatla
0 siblings, 0 replies; 12+ messages in thread
From: Srinivas Kandagatla @ 2020-09-23 10:25 UTC (permalink / raw)
To: Rob Herring
Cc: sboyd, linux-arm-msm, linux-kernel, robh+dt, devicetree,
mturquette, bjorn.andersson, linux-clk
Hi Rob,
On 18/09/2020 18:29, Rob Herring wrote:
> On Thu, 17 Sep 2020 14:28:47 +0100, Srinivas Kandagatla wrote:
>> Audio Clock controller is a block inside LPASS which controls
>> 2 Glitch free muxes to LPASS codec Macros.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>> .../bindings/clock/qcom,audiocc-sm8250.yaml | 58 +++++++++++++++++++
>> .../clock/qcom,sm8250-lpass-audiocc.h | 13 +++++
>> 2 files changed, 71 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml
>> create mode 100644 include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h
>>
>
>
> My bot found errors running 'make dt_binding_check' on your patch:
>
> Error: Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.example.dts:25.30-31 syntax error
> FATAL ERROR: Unable to parse input tree
> make[1]: *** [scripts/Makefile.lib:342: Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.example.dt.yaml] Error 1
> make[1]: *** Waiting for unfinished jobs....
> make: *** [Makefile:1366: dt_binding_check] Error 2
>
Is this check done against linux-next?
or linux master?
I have rechecked this once again on next and I see no check failures.
Next has a patch [1] which adds defines in header file that are used in
example! Possibly that is what is making the check fail!
thanks,
srini
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20200922&id=4e398353a7e51410c34fd19f8b7dfc56fff5901b
>
> See https://patchwork.ozlabs.org/patch/1366127
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure dt-schema is up to date:
>
> pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
>
> Please check and re-submit.
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/4] dt-bindings: clock: Add support for LPASS Always ON Controller
2020-09-17 13:28 [PATCH 0/4] clk: qcom : add sm8250 LPASS GFM drivers Srinivas Kandagatla
2020-09-17 13:28 ` [PATCH 1/4] dt-bindings: clock: Add support for LPASS Audio Clock Controller Srinivas Kandagatla
@ 2020-09-17 13:28 ` Srinivas Kandagatla
2020-09-18 17:29 ` Rob Herring
2020-09-17 13:28 ` [PATCH 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks Srinivas Kandagatla
2020-09-17 13:28 ` [PATCH 4/4] clk: qcom: Add support to LPASS AON_CC " Srinivas Kandagatla
3 siblings, 1 reply; 12+ messages in thread
From: Srinivas Kandagatla @ 2020-09-17 13:28 UTC (permalink / raw)
To: sboyd, linux-clk, devicetree
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm, linux-kernel,
Srinivas Kandagatla
Always ON Clock controller is a block inside LPASS which controls
1 Glitch free muxes to LPASS codec Macros.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
.../bindings/clock/qcom,aoncc-sm8250.yaml | 58 +++++++++++++++++++
.../clock/qcom,sm8250-lpass-aoncc.h | 11 ++++
2 files changed, 69 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml
create mode 100644 include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml
new file mode 100644
index 000000000000..1846c79c6535
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Clock bindings for LPASS Always ON Clock Controller on SM8250 SoCs
+
+maintainers:
+ - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+
+description: |
+ The clock consumer should specify the desired clock by having the clock
+ ID in its "clocks" phandle cell.
+ See include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h for the full list
+ of Audio Clock controller clock IDs.
+
+properties:
+ compatible:
+ const: qcom,sm8250-lpass-aon
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+
+ clocks:
+ items:
+ - description: LPASS Core voting clock
+ - description: Glitch Free Mux register clock
+
+ clock-names:
+ items:
+ - const: core
+ - const: bus
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
+ #include <dt-bindings/sound/qcom,q6afe.h>
+ clock-controller@3800000 {
+ #clock-cells = <1>;
+ compatible = "qcom,sm8250-lpass-aon";
+ reg = <0 0x03380000 0 0x40000>;
+ clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "core", "bus";
+ };
diff --git a/include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h b/include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h
new file mode 100644
index 000000000000..f5a1cfac8612
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _DT_BINDINGS_CLK_LPASS_AONCC_SM8250_H
+#define _DT_BINDINGS_CLK_LPASS_AONCC_SM8250_H
+
+/* from AOCC */
+#define LPASS_CDC_VA_MCLK 0
+#define LPASS_CDC_TX_NPL 1
+#define LPASS_CDC_TX_MCLK 2
+
+#endif /* _DT_BINDINGS_CLK_LPASS_AONCC_SM8250_H */
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 2/4] dt-bindings: clock: Add support for LPASS Always ON Controller
2020-09-17 13:28 ` [PATCH 2/4] dt-bindings: clock: Add support for LPASS Always ON Controller Srinivas Kandagatla
@ 2020-09-18 17:29 ` Rob Herring
0 siblings, 0 replies; 12+ messages in thread
From: Rob Herring @ 2020-09-18 17:29 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: linux-clk, devicetree, sboyd, mturquette, linux-kernel,
linux-arm-msm, robh+dt, bjorn.andersson
On Thu, 17 Sep 2020 14:28:48 +0100, Srinivas Kandagatla wrote:
> Always ON Clock controller is a block inside LPASS which controls
> 1 Glitch free muxes to LPASS codec Macros.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> .../bindings/clock/qcom,aoncc-sm8250.yaml | 58 +++++++++++++++++++
> .../clock/qcom,sm8250-lpass-aoncc.h | 11 ++++
> 2 files changed, 69 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml
> create mode 100644 include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h
>
My bot found errors running 'make dt_binding_check' on your patch:
Error: Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.example.dts:25.30-31 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:342: Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1366: dt_binding_check] Error 2
See https://patchwork.ozlabs.org/patch/1366126
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:
pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks
2020-09-17 13:28 [PATCH 0/4] clk: qcom : add sm8250 LPASS GFM drivers Srinivas Kandagatla
2020-09-17 13:28 ` [PATCH 1/4] dt-bindings: clock: Add support for LPASS Audio Clock Controller Srinivas Kandagatla
2020-09-17 13:28 ` [PATCH 2/4] dt-bindings: clock: Add support for LPASS Always ON Controller Srinivas Kandagatla
@ 2020-09-17 13:28 ` Srinivas Kandagatla
2020-09-22 18:41 ` Stephen Boyd
2020-09-22 21:49 ` Dmitry Baryshkov
2020-09-17 13:28 ` [PATCH 4/4] clk: qcom: Add support to LPASS AON_CC " Srinivas Kandagatla
3 siblings, 2 replies; 12+ messages in thread
From: Srinivas Kandagatla @ 2020-09-17 13:28 UTC (permalink / raw)
To: sboyd, linux-clk, devicetree
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm, linux-kernel,
Srinivas Kandagatla
GFM Muxes in AUDIO_CC control clocks to LPASS WSA and RX Codec Macros.
This patch adds support to these muxes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/clk/qcom/Kconfig | 7 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/lpass-gfm-sm8250.c | 235 ++++++++++++++++++++++++++++
3 files changed, 243 insertions(+)
create mode 100644 drivers/clk/qcom/lpass-gfm-sm8250.c
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 2eda63b7c46c..4e46fd339e62 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -494,4 +494,11 @@ config KRAITCC
Support for the Krait CPU clocks on Qualcomm devices.
Say Y if you want to support CPU frequency scaling.
+config CLK_GFM_LPASS_SM8250
+ tristate "GFM LPASS Clocks"
+ depends on SND_SOC_QDSP6_COMMON
+ help
+ Support for the GFM Glitch Free Mux LPASS clock. Say Y
+ if you want to support GFM Clocks on LPASS for SM8250 SoC.
+
endif
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index 8eb395d02a32..c18e4ead6c9e 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -74,3 +74,4 @@ obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o
obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
obj-$(CONFIG_KRAITCC) += krait-cc.o
+obj-$(CONFIG_CLK_GFM_LPASS_SM8250) += lpass-gfm-sm8250.o
diff --git a/drivers/clk/qcom/lpass-gfm-sm8250.c b/drivers/clk/qcom/lpass-gfm-sm8250.c
new file mode 100644
index 000000000000..2d5c41ae4969
--- /dev/null
+++ b/drivers/clk/qcom/lpass-gfm-sm8250.c
@@ -0,0 +1,235 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/clk-provider.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/notifier.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/of_device.h>
+#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
+
+struct lpass_gfm {
+ struct device *dev;
+ void __iomem *base;
+ struct clk *core_vote;
+ struct clk *bus_clk;
+};
+
+struct clk_gfm {
+ unsigned int mux_reg;
+ unsigned int mux_mask;
+ struct clk_hw hw;
+ struct lpass_gfm *priv;
+ void __iomem *gfm_mux;
+};
+
+#define GFM_MASK BIT(1)
+#define to_clk_gfm(_hw) container_of(_hw, struct clk_gfm, hw)
+
+static u8 clk_gfm_get_parent(struct clk_hw *hw)
+{
+ struct clk_gfm *clk = to_clk_gfm(hw);
+
+ return readl(clk->gfm_mux) & GFM_MASK;
+}
+
+static int clk_gfm_set_parent(struct clk_hw *hw, u8 index)
+{
+ struct clk_gfm *clk = to_clk_gfm(hw);
+ unsigned int val;
+
+ val = readl(clk->gfm_mux);
+
+ if (index)
+ val |= GFM_MASK;
+ else
+ val &= ~GFM_MASK;
+
+ writel(val, clk->gfm_mux);
+
+ return 0;
+}
+
+static const struct clk_ops clk_gfm_ops = {
+ .get_parent = clk_gfm_get_parent,
+ .set_parent = clk_gfm_set_parent,
+ .determine_rate = __clk_mux_determine_rate,
+};
+
+static struct clk_gfm lpass_gfm_wsa_mclk = {
+ .mux_reg = 0x220d8,
+ .mux_mask = BIT(0),
+ .hw.init = &(struct clk_init_data) {
+ .name = "WSA_MCLK",
+ .ops = &clk_gfm_ops,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ .parent_names = (const char *[]){
+ "LPASS_CLK_ID_TX_CORE_MCLK",
+ "LPASS_CLK_ID_WSA_CORE_MCLK",
+ },
+ .parent_data = (const struct clk_parent_data[]){
+ { .index = 0 },
+ { .index = 1 },
+ },
+ .num_parents = 2,
+ },
+};
+
+static struct clk_gfm lpass_gfm_wsa_npl = {
+ .mux_reg = 0x220d8,
+ .mux_mask = BIT(0),
+ .hw.init = &(struct clk_init_data) {
+ .name = "WSA_NPL",
+ .ops = &clk_gfm_ops,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ .parent_names = (const char *[]){
+ "LPASS_CLK_ID_TX_CORE_NPL_MCLK",
+ "LPASS_CLK_ID_WSA_CORE_NPL_MCLK",
+ },
+ .parent_data = (const struct clk_parent_data[]){
+ { .index = 0 },
+ { .index = 1 },
+ },
+ .num_parents = 2,
+ },
+};
+
+static struct clk_gfm lpass_gfm_rx_mclk_mclk2 = {
+ .mux_reg = 0x240d8,
+ .mux_mask = BIT(0),
+ .hw.init = &(struct clk_init_data) {
+ .name = "RX_MCLK_MCLK2",
+ .ops = &clk_gfm_ops,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ .parent_names = (const char *[]){
+ "LPASS_CLK_ID_TX_CORE_MCLK",
+ "LPASS_CLK_ID_RX_CORE_MCLK",
+ },
+ .parent_data = (const struct clk_parent_data[]){
+ { .index = 0 },
+ { .index = 1 },
+ },
+ .num_parents = 2,
+ },
+};
+
+static struct clk_gfm lpass_gfm_rx_npl = {
+ .mux_reg = 0x240d8,
+ .mux_mask = BIT(0),
+ .hw.init = &(struct clk_init_data) {
+ .name = "RX_NPL",
+ .ops = &clk_gfm_ops,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ .parent_names = (const char *[]){
+ "LPASS_CLK_ID_TX_CORE_NPL_MCLK",
+ "LPASS_CLK_ID_RX_CORE_NPL_MCLK",
+ },
+ .parent_data = (const struct clk_parent_data[]){
+ { .index = 0 },
+ { .index = 1 },
+ },
+ .num_parents = 2,
+ },
+};
+
+static struct clk_gfm *audiocc_gfm_clks[] = {
+ [LPASS_CDC_WSA_NPL] = &lpass_gfm_wsa_npl,
+ [LPASS_CDC_WSA_MCLK] = &lpass_gfm_wsa_mclk,
+ [LPASS_CDC_RX_NPL] = &lpass_gfm_rx_npl,
+ [LPASS_CDC_RX_MCLK_MCLK2] = &lpass_gfm_rx_mclk_mclk2,
+};
+
+static struct clk_hw_onecell_data audiocc_hw_onecell_data = {
+ .hws = {
+ [LPASS_CDC_WSA_NPL] = &lpass_gfm_wsa_npl.hw,
+ [LPASS_CDC_WSA_MCLK] = &lpass_gfm_wsa_mclk.hw,
+ [LPASS_CDC_RX_NPL] = &lpass_gfm_rx_npl.hw,
+ [LPASS_CDC_RX_MCLK_MCLK2] = &lpass_gfm_rx_mclk_mclk2.hw,
+ },
+ .num = ARRAY_SIZE(audiocc_gfm_clks),
+};
+
+struct lpass_gfm_data {
+ struct clk_hw_onecell_data *onecell_data;
+ struct clk_gfm **gfm_clks;
+};
+
+static struct lpass_gfm_data audiocc_data = {
+ .onecell_data = &audiocc_hw_onecell_data,
+ .gfm_clks = audiocc_gfm_clks,
+};
+
+static int lpass_gfm_clk_driver_probe(struct platform_device *pdev)
+{
+ const struct lpass_gfm_data *data;
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ struct clk_gfm *gfm;
+ struct lpass_gfm *cc;
+ int err, i;
+
+ cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
+ if (!cc)
+ return -ENOMEM;
+
+ cc->core_vote = devm_clk_get(&pdev->dev, "core");
+ if (IS_ERR(cc->core_vote)) {
+ dev_dbg(dev, "Failed to get lpass core clk\n");
+ return PTR_ERR(cc->core_vote);
+ }
+
+ data = of_device_get_match_data(dev);
+ cc->bus_clk = devm_clk_get(&pdev->dev, "bus");
+ if (IS_ERR(cc->bus_clk)) {
+ dev_dbg(dev, "Failed to get lpass bus clk\n");
+ return PTR_ERR(cc->bus_clk);
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ cc->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(cc->base))
+ return PTR_ERR(cc->base);
+
+ clk_prepare_enable(cc->core_vote);
+ clk_prepare_enable(cc->bus_clk);
+
+ for (i = 0; i < data->onecell_data->num; i++) {
+ if (!data->gfm_clks[i])
+ continue;
+
+ gfm = data->gfm_clks[i];
+ gfm->priv = cc;
+ gfm->gfm_mux = cc->base;
+ gfm->gfm_mux = gfm->gfm_mux + data->gfm_clks[i]->mux_reg;
+
+ err = devm_clk_hw_register(dev, &data->gfm_clks[i]->hw);
+ if (err)
+ return err;
+
+ }
+
+ return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
+ data->onecell_data);
+}
+
+static const struct of_device_id lpass_gfm_clk_match_table[] = {
+ {
+ .compatible = "qcom,sm8250-lpass-audiocc",
+ .data = &audiocc_data,
+ },
+ { }
+};
+
+static struct platform_driver lpass_gfm_clk_driver = {
+ .probe = lpass_gfm_clk_driver_probe,
+ .driver = {
+ .name = "lpass-gfm-clk",
+ .of_match_table = lpass_gfm_clk_match_table,
+ },
+};
+builtin_platform_driver(lpass_gfm_clk_driver);
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks
2020-09-17 13:28 ` [PATCH 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks Srinivas Kandagatla
@ 2020-09-22 18:41 ` Stephen Boyd
2020-09-22 21:45 ` Srinivas Kandagatla
2020-09-22 21:49 ` Dmitry Baryshkov
1 sibling, 1 reply; 12+ messages in thread
From: Stephen Boyd @ 2020-09-22 18:41 UTC (permalink / raw)
To: Srinivas Kandagatla, devicetree, linux-clk
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm, linux-kernel,
Srinivas Kandagatla
Quoting Srinivas Kandagatla (2020-09-17 06:28:49)
> GFM Muxes in AUDIO_CC control clocks to LPASS WSA and RX Codec Macros.
> This patch adds support to these muxes.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> drivers/clk/qcom/Kconfig | 7 +
> drivers/clk/qcom/Makefile | 1 +
> drivers/clk/qcom/lpass-gfm-sm8250.c | 235 ++++++++++++++++++++++++++++
> 3 files changed, 243 insertions(+)
> create mode 100644 drivers/clk/qcom/lpass-gfm-sm8250.c
>
> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index 2eda63b7c46c..4e46fd339e62 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -494,4 +494,11 @@ config KRAITCC
> Support for the Krait CPU clocks on Qualcomm devices.
> Say Y if you want to support CPU frequency scaling.
>
> +config CLK_GFM_LPASS_SM8250
> + tristate "GFM LPASS Clocks"
> + depends on SND_SOC_QDSP6_COMMON
What is the depends for?
> + help
> + Support for the GFM Glitch Free Mux LPASS clock. Say Y
> + if you want to support GFM Clocks on LPASS for SM8250 SoC.
> +
> endif
> diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
> index 8eb395d02a32..c18e4ead6c9e 100644
> --- a/drivers/clk/qcom/Makefile
> +++ b/drivers/clk/qcom/Makefile
> @@ -74,3 +74,4 @@ obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o
> obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
> obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
> obj-$(CONFIG_KRAITCC) += krait-cc.o
> +obj-$(CONFIG_CLK_GFM_LPASS_SM8250) += lpass-gfm-sm8250.o
I don't know but probably this should be sorted by Kconfig instead of
tacked onto the end here.
> diff --git a/drivers/clk/qcom/lpass-gfm-sm8250.c b/drivers/clk/qcom/lpass-gfm-sm8250.c
> new file mode 100644
> index 000000000000..2d5c41ae4969
> --- /dev/null
> +++ b/drivers/clk/qcom/lpass-gfm-sm8250.c
> @@ -0,0 +1,235 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/clk-provider.h>
> +#include <linux/io.h>
> +#include <linux/clk.h>
> +#include <linux/slab.h>
> +#include <linux/err.h>
> +#include <linux/notifier.h>
> +#include <linux/device.h>
> +#include <linux/platform_device.h>
> +#include <linux/of_device.h>
> +#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
> +
> +struct lpass_gfm {
> + struct device *dev;
> + void __iomem *base;
> + struct clk *core_vote;
> + struct clk *bus_clk;
> +};
> +
> +struct clk_gfm {
> + unsigned int mux_reg;
> + unsigned int mux_mask;
> + struct clk_hw hw;
> + struct lpass_gfm *priv;
> + void __iomem *gfm_mux;
> +};
> +
> +#define GFM_MASK BIT(1)
> +#define to_clk_gfm(_hw) container_of(_hw, struct clk_gfm, hw)
> +
> +static u8 clk_gfm_get_parent(struct clk_hw *hw)
> +{
> + struct clk_gfm *clk = to_clk_gfm(hw);
> +
> + return readl(clk->gfm_mux) & GFM_MASK;
> +}
> +
> +static int clk_gfm_set_parent(struct clk_hw *hw, u8 index)
> +{
> + struct clk_gfm *clk = to_clk_gfm(hw);
> + unsigned int val;
> +
> + val = readl(clk->gfm_mux);
> +
> + if (index)
> + val |= GFM_MASK;
> + else
> + val &= ~GFM_MASK;
> +
> + writel(val, clk->gfm_mux);
> +
> + return 0;
> +}
> +
> +static const struct clk_ops clk_gfm_ops = {
> + .get_parent = clk_gfm_get_parent,
> + .set_parent = clk_gfm_set_parent,
> + .determine_rate = __clk_mux_determine_rate,
> +};
> +
> +static struct clk_gfm lpass_gfm_wsa_mclk = {
> + .mux_reg = 0x220d8,
> + .mux_mask = BIT(0),
> + .hw.init = &(struct clk_init_data) {
> + .name = "WSA_MCLK",
> + .ops = &clk_gfm_ops,
> + .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
> + .parent_names = (const char *[]){
> + "LPASS_CLK_ID_TX_CORE_MCLK",
> + "LPASS_CLK_ID_WSA_CORE_MCLK",
> + },
> + .parent_data = (const struct clk_parent_data[]){
> + { .index = 0 },
> + { .index = 1 },
> + },
> + .num_parents = 2,
> + },
> +};
> +
> +static struct clk_gfm lpass_gfm_wsa_npl = {
> + .mux_reg = 0x220d8,
> + .mux_mask = BIT(0),
> + .hw.init = &(struct clk_init_data) {
> + .name = "WSA_NPL",
> + .ops = &clk_gfm_ops,
> + .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
> + .parent_names = (const char *[]){
> + "LPASS_CLK_ID_TX_CORE_NPL_MCLK",
> + "LPASS_CLK_ID_WSA_CORE_NPL_MCLK",
> + },
> + .parent_data = (const struct clk_parent_data[]){
> + { .index = 0 },
> + { .index = 1 },
> + },
> + .num_parents = 2,
> + },
> +};
> +
> +static struct clk_gfm lpass_gfm_rx_mclk_mclk2 = {
> + .mux_reg = 0x240d8,
> + .mux_mask = BIT(0),
> + .hw.init = &(struct clk_init_data) {
> + .name = "RX_MCLK_MCLK2",
> + .ops = &clk_gfm_ops,
> + .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
> + .parent_names = (const char *[]){
> + "LPASS_CLK_ID_TX_CORE_MCLK",
> + "LPASS_CLK_ID_RX_CORE_MCLK",
> + },
> + .parent_data = (const struct clk_parent_data[]){
> + { .index = 0 },
> + { .index = 1 },
> + },
> + .num_parents = 2,
> + },
> +};
> +
> +static struct clk_gfm lpass_gfm_rx_npl = {
> + .mux_reg = 0x240d8,
> + .mux_mask = BIT(0),
> + .hw.init = &(struct clk_init_data) {
> + .name = "RX_NPL",
> + .ops = &clk_gfm_ops,
> + .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
> + .parent_names = (const char *[]){
> + "LPASS_CLK_ID_TX_CORE_NPL_MCLK",
> + "LPASS_CLK_ID_RX_CORE_NPL_MCLK",
> + },
> + .parent_data = (const struct clk_parent_data[]){
> + { .index = 0 },
> + { .index = 1 },
> + },
Please use parent_data instead of parent_names. The name can go in the
parent_data struct.
> + .num_parents = 2,
> + },
> +};
> +
> +static struct clk_gfm *audiocc_gfm_clks[] = {
> + [LPASS_CDC_WSA_NPL] = &lpass_gfm_wsa_npl,
> + [LPASS_CDC_WSA_MCLK] = &lpass_gfm_wsa_mclk,
> + [LPASS_CDC_RX_NPL] = &lpass_gfm_rx_npl,
> + [LPASS_CDC_RX_MCLK_MCLK2] = &lpass_gfm_rx_mclk_mclk2,
> +};
> +
> +static struct clk_hw_onecell_data audiocc_hw_onecell_data = {
> + .hws = {
> + [LPASS_CDC_WSA_NPL] = &lpass_gfm_wsa_npl.hw,
> + [LPASS_CDC_WSA_MCLK] = &lpass_gfm_wsa_mclk.hw,
> + [LPASS_CDC_RX_NPL] = &lpass_gfm_rx_npl.hw,
> + [LPASS_CDC_RX_MCLK_MCLK2] = &lpass_gfm_rx_mclk_mclk2.hw,
> + },
> + .num = ARRAY_SIZE(audiocc_gfm_clks),
> +};
> +
> +struct lpass_gfm_data {
> + struct clk_hw_onecell_data *onecell_data;
> + struct clk_gfm **gfm_clks;
> +};
> +
> +static struct lpass_gfm_data audiocc_data = {
> + .onecell_data = &audiocc_hw_onecell_data,
> + .gfm_clks = audiocc_gfm_clks,
> +};
> +
> +static int lpass_gfm_clk_driver_probe(struct platform_device *pdev)
> +{
> + const struct lpass_gfm_data *data;
> + struct device *dev = &pdev->dev;
> + struct resource *res;
> + struct clk_gfm *gfm;
> + struct lpass_gfm *cc;
> + int err, i;
> +
> + cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
> + if (!cc)
> + return -ENOMEM;
> +
> + cc->core_vote = devm_clk_get(&pdev->dev, "core");
> + if (IS_ERR(cc->core_vote)) {
> + dev_dbg(dev, "Failed to get lpass core clk\n");
> + return PTR_ERR(cc->core_vote);
> + }
Can this use the pm_clk stuff?
> +
> + data = of_device_get_match_data(dev);
What if data is NULL?
> + cc->bus_clk = devm_clk_get(&pdev->dev, "bus");
> + if (IS_ERR(cc->bus_clk)) {
> + dev_dbg(dev, "Failed to get lpass bus clk\n");
> + return PTR_ERR(cc->bus_clk);
> + }
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + cc->base = devm_ioremap_resource(dev, res);
> + if (IS_ERR(cc->base))
> + return PTR_ERR(cc->base);
> +
> + clk_prepare_enable(cc->core_vote);
> + clk_prepare_enable(cc->bus_clk);
These will always be left enabled if the probe function bails out after here.
> +
> + for (i = 0; i < data->onecell_data->num; i++) {
> + if (!data->gfm_clks[i])
> + continue;
> +
> + gfm = data->gfm_clks[i];
> + gfm->priv = cc;
> + gfm->gfm_mux = cc->base;
> + gfm->gfm_mux = gfm->gfm_mux + data->gfm_clks[i]->mux_reg;
> +
> + err = devm_clk_hw_register(dev, &data->gfm_clks[i]->hw);
> + if (err)
> + return err;
> +
> + }
> +
> + return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
> + data->onecell_data);
> +}
> +
> +static const struct of_device_id lpass_gfm_clk_match_table[] = {
> + {
> + .compatible = "qcom,sm8250-lpass-audiocc",
> + .data = &audiocc_data,
> + },
> + { }
> +};
> +
> +static struct platform_driver lpass_gfm_clk_driver = {
> + .probe = lpass_gfm_clk_driver_probe,
> + .driver = {
> + .name = "lpass-gfm-clk",
> + .of_match_table = lpass_gfm_clk_match_table,
> + },
> +};
> +builtin_platform_driver(lpass_gfm_clk_driver);
Should be module_platform_driver()?
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks
2020-09-22 18:41 ` Stephen Boyd
@ 2020-09-22 21:45 ` Srinivas Kandagatla
2020-09-23 23:28 ` Stephen Boyd
0 siblings, 1 reply; 12+ messages in thread
From: Srinivas Kandagatla @ 2020-09-22 21:45 UTC (permalink / raw)
To: Stephen Boyd, devicetree, linux-clk
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm, linux-kernel
Thanks Stephen for review,
On 22/09/2020 19:41, Stephen Boyd wrote:
> Quoting Srinivas Kandagatla (2020-09-17 06:28:49)
>> GFM Muxes in AUDIO_CC control clocks to LPASS WSA and RX Codec Macros.
>> This patch adds support to these muxes.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>> drivers/clk/qcom/Kconfig | 7 +
>> drivers/clk/qcom/Makefile | 1 +
>> drivers/clk/qcom/lpass-gfm-sm8250.c | 235 ++++++++++++++++++++++++++++
>> 3 files changed, 243 insertions(+)
>> create mode 100644 drivers/clk/qcom/lpass-gfm-sm8250.c
>>
>> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
>> index 2eda63b7c46c..4e46fd339e62 100644
>> --- a/drivers/clk/qcom/Kconfig
>> +++ b/drivers/clk/qcom/Kconfig
>> @@ -494,4 +494,11 @@ config KRAITCC
>> Support for the Krait CPU clocks on Qualcomm devices.
>> Say Y if you want to support CPU frequency scaling.
>>
>> +config CLK_GFM_LPASS_SM8250
>> + tristate "GFM LPASS Clocks"
>> + depends on SND_SOC_QDSP6_COMMON
>
> What is the depends for?
I think I forgot to remove this!
>
>> + help
>> + Support for the GFM Glitch Free Mux LPASS clock. Say Y
>> + if you want to support GFM Clocks on LPASS for SM8250 SoC.
>> +
>> endif
>> diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
>> index 8eb395d02a32..c18e4ead6c9e 100644
>> --- a/drivers/clk/qcom/Makefile
>> +++ b/drivers/clk/qcom/Makefile
>> @@ -74,3 +74,4 @@ obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o
>> obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
>> obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
>> obj-$(CONFIG_KRAITCC) += krait-cc.o
>> +obj-$(CONFIG_CLK_GFM_LPASS_SM8250) += lpass-gfm-sm8250.o
>
> I don't know but probably this should be sorted by Kconfig instead of
> tacked onto the end here.
>
>> diff --git a/drivers/clk/qcom/lpass-gfm-sm8250.c b/drivers/clk/qcom/lpass-gfm-sm8250.c
>> new file mode 100644
>> index 000000000000..2d5c41ae4969
>> --- /dev/null
>> +++ b/drivers/clk/qcom/lpass-gfm-sm8250.c
>> @@ -0,0 +1,235 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +
>> +#include <linux/kernel.h>
>> +#include <linux/module.h>
>> +#include <linux/clk-provider.h>
>> +#include <linux/io.h>
>> +#include <linux/clk.h>
>> +#include <linux/slab.h>
>> +#include <linux/err.h>
>> +#include <linux/notifier.h>
>> +#include <linux/device.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/of_device.h>
>> +#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
>> +
>> +struct lpass_gfm {
>> + struct device *dev;
>> + void __iomem *base;
>> + struct clk *core_vote;
>> + struct clk *bus_clk;
>> +};
>> +
>> +struct clk_gfm {
>> + unsigned int mux_reg;
>> + unsigned int mux_mask;
>> + struct clk_hw hw;
>> + struct lpass_gfm *priv;
>> + void __iomem *gfm_mux;
>> +};
>> +
...
>> +static struct clk_gfm lpass_gfm_rx_npl = {
>> + .mux_reg = 0x240d8,
>> + .mux_mask = BIT(0),
>> + .hw.init = &(struct clk_init_data) {
>> + .name = "RX_NPL",
>> + .ops = &clk_gfm_ops,
>> + .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
>> + .parent_names = (const char *[]){
>> + "LPASS_CLK_ID_TX_CORE_NPL_MCLK",
>> + "LPASS_CLK_ID_RX_CORE_NPL_MCLK",
>> + },
>> + .parent_data = (const struct clk_parent_data[]){
>> + { .index = 0 },
>> + { .index = 1 },
>> + },
>
> Please use parent_data instead of parent_names. The name can go in the
> parent_data struct.
Ah.. I missed that, will fix that in next version!
>
>> + .num_parents = 2,
>> + },
>> +};
>> +
>> +static struct clk_gfm *audiocc_gfm_clks[] = {
>> + [LPASS_CDC_WSA_NPL] = &lpass_gfm_wsa_npl,
>> + [LPASS_CDC_WSA_MCLK] = &lpass_gfm_wsa_mclk,
>> + [LPASS_CDC_RX_NPL] = &lpass_gfm_rx_npl,
>> + [LPASS_CDC_RX_MCLK_MCLK2] = &lpass_gfm_rx_mclk_mclk2,
>> +};
>> +
>> +static struct clk_hw_onecell_data audiocc_hw_onecell_data = {
>> + .hws = {
>> + [LPASS_CDC_WSA_NPL] = &lpass_gfm_wsa_npl.hw,
>> + [LPASS_CDC_WSA_MCLK] = &lpass_gfm_wsa_mclk.hw,
>> + [LPASS_CDC_RX_NPL] = &lpass_gfm_rx_npl.hw,
>> + [LPASS_CDC_RX_MCLK_MCLK2] = &lpass_gfm_rx_mclk_mclk2.hw,
>> + },
>> + .num = ARRAY_SIZE(audiocc_gfm_clks),
>> +};
>> +
>> +struct lpass_gfm_data {
>> + struct clk_hw_onecell_data *onecell_data;
>> + struct clk_gfm **gfm_clks;
>> +};
>> +
>> +static struct lpass_gfm_data audiocc_data = {
>> + .onecell_data = &audiocc_hw_onecell_data,
>> + .gfm_clks = audiocc_gfm_clks,
>> +};
>> +
>> +static int lpass_gfm_clk_driver_probe(struct platform_device *pdev)
>> +{
>> + const struct lpass_gfm_data *data;
>> + struct device *dev = &pdev->dev;
>> + struct resource *res;
>> + struct clk_gfm *gfm;
>> + struct lpass_gfm *cc;
>> + int err, i;
>> +
>> + cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
>> + if (!cc)
>> + return -ENOMEM;
>> +
>> + cc->core_vote = devm_clk_get(&pdev->dev, "core");
>> + if (IS_ERR(cc->core_vote)) {
>> + dev_dbg(dev, "Failed to get lpass core clk\n");
>> + return PTR_ERR(cc->core_vote);
>> + }
>
> Can this use the pm_clk stuff?
you mean add runtime pm support or something else?
I can give it a go and see!
>
>> +
>> + data = of_device_get_match_data(dev);
>
> What if data is NULL?
It should not be here if there is no match of compatible string, so data
should not be NULL!
>
>> + cc->bus_clk = devm_clk_get(&pdev->dev, "bus");
>> + if (IS_ERR(cc->bus_clk)) {
>> + dev_dbg(dev, "Failed to get lpass bus clk\n");
>> + return PTR_ERR(cc->bus_clk);
>> + }
>> +
>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + cc->base = devm_ioremap_resource(dev, res);
>> + if (IS_ERR(cc->base))
>> + return PTR_ERR(cc->base);
>> +
>> + clk_prepare_enable(cc->core_vote);
>> + clk_prepare_enable(cc->bus_clk);
>
> These will always be left enabled if the probe function bails out after here.
>
I agree, Will add some error handling
>> +
>> + for (i = 0; i < data->onecell_data->num; i++) {
>> + if (!data->gfm_clks[i])
>> + continue;
>> +
>> + gfm = data->gfm_clks[i];
>> + gfm->priv = cc;
>> + gfm->gfm_mux = cc->base;
>> + gfm->gfm_mux = gfm->gfm_mux + data->gfm_clks[i]->mux_reg;
>> +
>> + err = devm_clk_hw_register(dev, &data->gfm_clks[i]->hw);
>> + if (err)
>> + return err;
>> +
>> + }
>> +
>> + return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
>> + data->onecell_data);
>> +}
>> +
>> +static const struct of_device_id lpass_gfm_clk_match_table[] = {
>> + {
>> + .compatible = "qcom,sm8250-lpass-audiocc",
>> + .data = &audiocc_data,
>> + },
>> + { }
>> +};
>> +
>> +static struct platform_driver lpass_gfm_clk_driver = {
>> + .probe = lpass_gfm_clk_driver_probe,
>> + .driver = {
>> + .name = "lpass-gfm-clk",
>> + .of_match_table = lpass_gfm_clk_match_table,
>> + },
>> +};
>> +builtin_platform_driver(lpass_gfm_clk_driver);
>
> Should be module_platform_driver()?
sure, will do that!
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks
2020-09-22 21:45 ` Srinivas Kandagatla
@ 2020-09-23 23:28 ` Stephen Boyd
0 siblings, 0 replies; 12+ messages in thread
From: Stephen Boyd @ 2020-09-23 23:28 UTC (permalink / raw)
To: Srinivas Kandagatla, devicetree, linux-clk
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm, linux-kernel
Quoting Srinivas Kandagatla (2020-09-22 14:45:07)
> Thanks Stephen for review,
>
> On 22/09/2020 19:41, Stephen Boyd wrote:
> > Quoting Srinivas Kandagatla (2020-09-17 06:28:49)
> >> diff --git a/drivers/clk/qcom/lpass-gfm-sm8250.c b/drivers/clk/qcom/lpass-gfm-sm8250.c
> >> new file mode 100644
> >> index 000000000000..2d5c41ae4969
> >> --- /dev/null
> >> +++ b/drivers/clk/qcom/lpass-gfm-sm8250.c
> >> @@ -0,0 +1,235 @@
[...]
> >> +};
> >> +
> >> +static int lpass_gfm_clk_driver_probe(struct platform_device *pdev)
> >> +{
> >> + const struct lpass_gfm_data *data;
> >> + struct device *dev = &pdev->dev;
> >> + struct resource *res;
> >> + struct clk_gfm *gfm;
> >> + struct lpass_gfm *cc;
> >> + int err, i;
> >> +
> >> + cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
> >> + if (!cc)
> >> + return -ENOMEM;
> >> +
> >> + cc->core_vote = devm_clk_get(&pdev->dev, "core");
> >> + if (IS_ERR(cc->core_vote)) {
> >> + dev_dbg(dev, "Failed to get lpass core clk\n");
> >> + return PTR_ERR(cc->core_vote);
> >> + }
> >
> > Can this use the pm_clk stuff?
>
> you mean add runtime pm support or something else?
>
> I can give it a go and see!
>
Yes use the runtime PM support and pm_clk APIs. There are some examples
in this directory already.
>
> >
> >> +
> >> + data = of_device_get_match_data(dev);
> >
> > What if data is NULL?
> It should not be here if there is no match of compatible string, so data
> should not be NULL!
Ok sure but it always makes me feel better if we check for a valid
pointer with this API.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks
2020-09-17 13:28 ` [PATCH 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks Srinivas Kandagatla
2020-09-22 18:41 ` Stephen Boyd
@ 2020-09-22 21:49 ` Dmitry Baryshkov
1 sibling, 0 replies; 12+ messages in thread
From: Dmitry Baryshkov @ 2020-09-22 21:49 UTC (permalink / raw)
To: Srinivas Kandagatla, sboyd, linux-clk, devicetree
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm, linux-kernel
On 17/09/2020 16:28, Srinivas Kandagatla wrote:
> GFM Muxes in AUDIO_CC control clocks to LPASS WSA and RX Codec Macros.
> This patch adds support to these muxes.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> drivers/clk/qcom/Kconfig | 7 +
> drivers/clk/qcom/Makefile | 1 +
> drivers/clk/qcom/lpass-gfm-sm8250.c | 235 ++++++++++++++++++++++++++++
> 3 files changed, 243 insertions(+)
> create mode 100644 drivers/clk/qcom/lpass-gfm-sm8250.c
>
> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index 2eda63b7c46c..4e46fd339e62 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -494,4 +494,11 @@ config KRAITCC
> Support for the Krait CPU clocks on Qualcomm devices.
> Say Y if you want to support CPU frequency scaling.
>
> +config CLK_GFM_LPASS_SM8250
> + tristate "GFM LPASS Clocks"
Since this driver can be built as module, few things are missing (see
below).
> + depends on SND_SOC_QDSP6_COMMON
> + help
> + Support for the GFM Glitch Free Mux LPASS clock. Say Y
> + if you want to support GFM Clocks on LPASS for SM8250 SoC.
> +
[skipped]
> +
> +static const struct of_device_id lpass_gfm_clk_match_table[] = {
> + {
> + .compatible = "qcom,sm8250-lpass-audiocc",
> + .data = &audiocc_data,
> + },
> + { }
> +};
MODULE_DEVICE_TABLE(of, lpass_gfm_clk_match_table);
> +
> +static struct platform_driver lpass_gfm_clk_driver = {
> + .probe = lpass_gfm_clk_driver_probe,
> + .driver = {
> + .name = "lpass-gfm-clk",
> + .of_match_table = lpass_gfm_clk_match_table,
> + },
> +};
> +builtin_platform_driver(lpass_gfm_clk_driver);
Wouldn't you like to use module_platform_driver() here, like other LPASS
CC drivers do?
Also MODULE_LICENSE is missing.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 4/4] clk: qcom: Add support to LPASS AON_CC Glitch Free Mux clocks
2020-09-17 13:28 [PATCH 0/4] clk: qcom : add sm8250 LPASS GFM drivers Srinivas Kandagatla
` (2 preceding siblings ...)
2020-09-17 13:28 ` [PATCH 3/4] clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks Srinivas Kandagatla
@ 2020-09-17 13:28 ` Srinivas Kandagatla
3 siblings, 0 replies; 12+ messages in thread
From: Srinivas Kandagatla @ 2020-09-17 13:28 UTC (permalink / raw)
To: sboyd, linux-clk, devicetree
Cc: bjorn.andersson, mturquette, robh+dt, linux-arm-msm, linux-kernel,
Srinivas Kandagatla
LPASS Always ON Clock controller has one GFM mux to control VA
and TX clocks to codec macro on LPASS.
This patch adds support to this mux.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/clk/qcom/lpass-gfm-sm8250.c | 61 +++++++++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/drivers/clk/qcom/lpass-gfm-sm8250.c b/drivers/clk/qcom/lpass-gfm-sm8250.c
index 2d5c41ae4969..6b11bea912bf 100644
--- a/drivers/clk/qcom/lpass-gfm-sm8250.c
+++ b/drivers/clk/qcom/lpass-gfm-sm8250.c
@@ -12,6 +12,7 @@
#include <linux/platform_device.h>
#include <linux/of_device.h>
#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
+#include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
struct lpass_gfm {
struct device *dev;
@@ -61,6 +62,44 @@ static const struct clk_ops clk_gfm_ops = {
.determine_rate = __clk_mux_determine_rate,
};
+static struct clk_gfm lpass_gfm_va_mclk = {
+ .mux_reg = 0x20000,
+ .mux_mask = BIT(0),
+ .hw.init = &(struct clk_init_data) {
+ .name = "VA_MCLK",
+ .ops = &clk_gfm_ops,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ .parent_names = (const char *[]) {
+ "LPASS_CLK_ID_TX_CORE_MCLK",
+ "LPASS_CLK_ID_VA_CORE_MCLK",
+ },
+ .num_parents = 2,
+ .parent_data = (const struct clk_parent_data[]){
+ { .index = 0 },
+ { .index = 1 },
+ },
+ },
+};
+
+static struct clk_gfm lpass_gfm_tx_npl = {
+ .mux_reg = 0x20000,
+ .mux_mask = BIT(0),
+ .hw.init = &(struct clk_init_data) {
+ .name = "TX_NPL",
+ .ops = &clk_gfm_ops,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
+ .parent_names = (const char *[]){
+ "LPASS_CLK_ID_TX_CORE_NPL_MCLK",
+ "LPASS_CLK_ID_VA_CORE_2X_MCLK",
+ },
+ .parent_data = (const struct clk_parent_data[]){
+ { .index = 0 },
+ { .index = 1 },
+ },
+ .num_parents = 2,
+ },
+};
+
static struct clk_gfm lpass_gfm_wsa_mclk = {
.mux_reg = 0x220d8,
.mux_mask = BIT(0),
@@ -137,6 +176,19 @@ static struct clk_gfm lpass_gfm_rx_npl = {
},
};
+static struct clk_gfm *aoncc_gfm_clks[] = {
+ [LPASS_CDC_VA_MCLK] = &lpass_gfm_va_mclk,
+ [LPASS_CDC_TX_NPL] = &lpass_gfm_tx_npl,
+};
+
+static struct clk_hw_onecell_data aoncc_hw_onecell_data = {
+ .hws = {
+ [LPASS_CDC_VA_MCLK] = &lpass_gfm_va_mclk.hw,
+ [LPASS_CDC_TX_NPL] = &lpass_gfm_tx_npl.hw,
+ },
+ .num = ARRAY_SIZE(aoncc_gfm_clks),
+};
+
static struct clk_gfm *audiocc_gfm_clks[] = {
[LPASS_CDC_WSA_NPL] = &lpass_gfm_wsa_npl,
[LPASS_CDC_WSA_MCLK] = &lpass_gfm_wsa_mclk,
@@ -164,6 +216,11 @@ static struct lpass_gfm_data audiocc_data = {
.gfm_clks = audiocc_gfm_clks,
};
+static struct lpass_gfm_data aoncc_data = {
+ .onecell_data = &aoncc_hw_onecell_data,
+ .gfm_clks = aoncc_gfm_clks,
+};
+
static int lpass_gfm_clk_driver_probe(struct platform_device *pdev)
{
const struct lpass_gfm_data *data;
@@ -218,6 +275,10 @@ static int lpass_gfm_clk_driver_probe(struct platform_device *pdev)
}
static const struct of_device_id lpass_gfm_clk_match_table[] = {
+ {
+ .compatible = "qcom,sm8250-lpass-aoncc",
+ .data = &aoncc_data,
+ },
{
.compatible = "qcom,sm8250-lpass-audiocc",
.data = &audiocc_data,
--
2.21.0
^ permalink raw reply related [flat|nested] 12+ messages in thread