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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>,
	robh+dt@kernel.org
Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com,
	mturquette@baylibre.com, sboyd@kernel.org,
	p.zabel@pengutronix.de, y.oudjana@protonmail.com,
	jason-jh.lin@mediatek.com, ck.hu@mediatek.com,
	fparent@baylibre.com, rex-bc.chen@mediatek.com,
	tinghan.shen@mediatek.com, chun-jie.chen@mediatek.com,
	weiyi.lu@mediatek.com, ikjn@chromium.org,
	miles.chen@mediatek.com, sam.shih@mediatek.com,
	wenst@chromium.org, bgolaszewski@baylibre.com,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org,
	konrad.dybcio@somainline.org, marijn.suijten@somainline.org,
	martin.botka@somainline.org,
	~postmarketos/upstreaming@lists.sr.ht,
	phone-devel@vger.kernel.org, paul.bouchara@somainline.org,
	kernel@collabora.com
Subject: Re: [PATCH v4 4/7] dt-bindings: clock: mediatek: Add clock driver bindings for MT6795
Date: Wed, 29 Jun 2022 12:51:18 +0200	[thread overview]
Message-ID: <fdc4fcfa-2d30-310e-d736-fd317b1cd2da@linaro.org> (raw)
In-Reply-To: <20220627085632.23797-5-angelogioacchino.delregno@collabora.com>

On 27/06/2022 10:56, AngeloGioacchino Del Regno wrote:
> Add the bindings for the clock drivers of the MediaTek Helio X10
> MT6795 SoC.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>  .../bindings/clock/mediatek,mt6795-clock.yaml | 66 +++++++++++++++++++
>  .../clock/mediatek,mt6795-sys-clock.yaml      | 54 +++++++++++++++
>  2 files changed, 120 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml
>  create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml
> new file mode 100644
> index 000000000000..795fb18721c3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml
> @@ -0,0 +1,66 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/clock/mediatek,mt6795-clock.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"

No quotes in both places. Especially that once you use " and in other
place here '.

> +
> +title: MediaTek Functional Clock Controller for MT6795
> +
> +maintainers:
> +  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> +  - Chun-Jie Chen <chun-jie.chen@mediatek.com>
> +
> +description: |
> +  The clock architecture in MediaTek like below
> +  PLLs -->
> +          dividers -->
> +                      muxes
> +                           -->
> +                              clock gate
> +
> +  The devices provide clock gate control in different IP blocks.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mediatek,mt6795-mfgcfg
> +      - mediatek,mt6795-vdecsys
> +      - mediatek,mt6795-vencsys
> +
> +  reg:
> +    maxItems: 1
> +
> +  '#clock-cells':
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    soc {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        mfgcfg: clock-controller@13000000 {
> +            compatible = "mediatek,mt6795-mfgcfg";
> +            reg = <0 0x13000000 0 0x1000>;
> +            #clock-cells = <1>;
> +        };
> +
> +        vdecsys: clock-controller@16000000 {
> +            compatible = "mediatek,mt6795-vdecsys";
> +            reg = <0 0x16000000 0 0x1000>;
> +            #clock-cells = <1>;
> +        };
> +
> +        vencsys: clock-controller@18000000 {
> +            compatible = "mediatek,mt6795-vencsys";
> +            reg = <0 0x18000000 0 0x1000>;
> +            #clock-cells = <1>;
> +        };
> +    };
> diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml
> new file mode 100644
> index 000000000000..629e0cc7c916
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml
> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/clock/mediatek,mt6795-sys-clock.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"

No quotes.


Best regards,
Krzysztof

  reply	other threads:[~2022-06-29 10:51 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-27  8:56 [PATCH v4 0/7] MediaTek Helio X10 MT6795 - Clock drivers AngeloGioacchino Del Regno
2022-06-27  8:56 ` [PATCH v4 1/7] dt-bindings: mediatek: Document MT6795 system controllers bindings AngeloGioacchino Del Regno
2022-06-27  8:56 ` [PATCH v4 2/7] dt-bindings: clock: Add MediaTek Helio X10 MT6795 clock bindings AngeloGioacchino Del Regno
2022-06-29 10:49   ` Krzysztof Kozlowski
2022-06-27  8:56 ` [PATCH v4 3/7] dt-bindings: reset: Add bindings for MT6795 Helio X10 reset controllers AngeloGioacchino Del Regno
2022-06-29 10:49   ` Krzysztof Kozlowski
2022-06-29 10:50     ` AngeloGioacchino Del Regno
2022-06-27  8:56 ` [PATCH v4 4/7] dt-bindings: clock: mediatek: Add clock driver bindings for MT6795 AngeloGioacchino Del Regno
2022-06-29 10:51   ` Krzysztof Kozlowski [this message]
2022-06-27  8:56 ` [PATCH v4 5/7] clk: mediatek: clk-apmixed: Remove unneeded __init annotation AngeloGioacchino Del Regno
2022-06-27  8:56 ` [PATCH v4 6/7] clk: mediatek: Export required symbols to compile clk drivers as module AngeloGioacchino Del Regno
2022-06-27  8:56 ` [PATCH v4 7/7] clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers AngeloGioacchino Del Regno

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