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([2a02:810d:15c0:828:7ede:fc7b:2328:3883]) by smtp.gmail.com with ESMTPSA id h8-20020aa7de08000000b005083bc605f9sm3621291edv.72.2023.05.11.23.27.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 11 May 2023 23:27:09 -0700 (PDT) Message-ID: Date: Fri, 12 May 2023 08:27:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH net-next V3 1/3] dt-bindings: net: xilinx_axienet: Introduce dmaengine binding support Content-Language: en-US To: "Gaddam, Sarath Babu Naidu" , "davem@davemloft.net" , "edumazet@google.com" , "kuba@kernel.org" , "pabeni@redhat.com" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" Cc: "linux@armlinux.org.uk" , "Simek, Michal" , "Pandey, Radhey Shyam" , "netdev@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "Sarangi, Anirudha" , "Katakam, Harini" , "git (AMD-Xilinx)" References: <20230510085031.1116327-1-sarath.babu.naidu.gaddam@amd.com> <20230510085031.1116327-2-sarath.babu.naidu.gaddam@amd.com> <95f61847-2ec3-a4e0-d277-5d68836f66cf@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 11/05/2023 13:32, Gaddam, Sarath Babu Naidu wrote: > > >> -----Original Message----- >> From: Krzysztof Kozlowski >> Sent: Wednesday, May 10, 2023 3:39 PM >> To: Gaddam, Sarath Babu Naidu >> ; davem@davemloft.net; >> edumazet@google.com; kuba@kernel.org; pabeni@redhat.com; >> robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org >> Cc: linux@armlinux.org.uk; Simek, Michal ; >> Pandey, Radhey Shyam ; >> netdev@vger.kernel.org; devicetree@vger.kernel.org; linux-arm- >> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Sarangi, >> Anirudha ; Katakam, Harini >> ; git (AMD-Xilinx) >> Subject: Re: [PATCH net-next V3 1/3] dt-bindings: net: xilinx_axienet: >> Introduce dmaengine binding support >> >> On 10/05/2023 10:50, Sarath Babu Naidu Gaddam wrote: >>> From: Radhey Shyam Pandey >>> >>> The axiethernet driver will use dmaengine framework to communicate >>> with dma controller IP instead of built-in dma programming sequence. >> >> Subject: drop second/last, redundant "bindings". The "dt-bindings" >> prefix is already stating that these are bindings. >> >> Actually also drop "dmaenging" as it is Linuxism. Focus on hardware, e.g. >> "Add DMA support". >> >>> >>> To request dma transmit and receive channels the axiethernet driver >>> uses generic dmas, dma-names properties. >>> >>> Also to support the backward compatibility, use "dmas" property to >>> identify as it should use dmaengine framework or legacy >>> driver(built-in dma programming). >>> >>> At this point it is recommended to use dmaengine framework but it's >>> optional. Once the solution is stable will make dmas as required >>> properties. >>> >>> Signed-off-by: Radhey Shyam Pandey >> >>> Signed-off-by: Sarath Babu Naidu Gaddam >>> >>> --- >>> These changes are on top of below txt to yaml conversion discussion >>> https://lore.kernel.org/all/20230308061223.1358637-1- >> sarath.babu.naidu >>> .gaddam@amd.com/#Z2e.:20230308061223.1358637-1- >> sarath.babu.naidu.gadda >>> m::40amd.com:1bindings:net:xlnx::2caxi-ethernet.yaml >>> >>> Changes in V3: >>> 1) Reverted reg and interrupts property to support backward >> compatibility. >>> 2) Moved dmas and dma-names properties from Required properties. >>> >>> Changes in V2: >>> - None. >>> --- >>> .../devicetree/bindings/net/xlnx,axi-ethernet.yaml | 12 >> ++++++++++++ >>> 1 file changed, 12 insertions(+) >>> >>> diff --git >>> a/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml >>> b/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml >>> index 80843c177029..9dfa1976e260 100644 >>> --- a/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml >>> +++ b/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml >>> @@ -122,6 +122,16 @@ properties: >>> modes, where "pcs-handle" should be used to point to the PCS/PMA >> PHY, >>> and "phy-handle" should point to an external PHY if exists. >>> >>> + dmas: >>> + items: >>> + - description: TX DMA Channel phandle and DMA request line >> number >>> + - description: RX DMA Channel phandle and DMA request line >>> + number >>> + >>> + dma-names: >>> + items: >>> + - const: tx_chan0 >> >> tx >> >>> + - const: rx_chan0 >> >> rx > > We want to support more channels in the future, currently we support > AXI DMA which has only one tx and rx channel. In future we want to > extend support for multichannel DMA (MCDMA) which has 16 TX and > 16 RX channels. To uniquely identify each channel, we are using chan > suffix. Depending on the usecase AXI ethernet driver can request any > combination of multichannel DMA channels. > > dma-names = tx_chan0, tx_chan1, rx_chan0, rx_chan1; > > will update the commit message with same. I expect the binding to be complete, otherwise you get comments like this. Add missing parts to the binding and resend. Best regards, Krzysztof