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Wysocki" , Danilo Krummrich , Pavel Machek , Drew Fustini , Guo Ren , Fu Wei , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Philipp Zabel , Frank Binns , Matt Coster , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org Content-Language: en-US From: Michal Wilczynski In-Reply-To: <20250415-tycoon-naming-20ba5a55c469@spud> Content-Transfer-Encoding: 8bit X-Brightmail-Tracker: H4sIAAAAAAAAA02SfUxTVxjGc+69vb1UIZfC5BQWKyxjc8uwoJsn2YbDuO2abJn6D5khcZ3e 1EZKWQvINuOYMKUIEywIFqHFKB+dFYZtpQ1tJyKt6dahYxX5FIdOq4AM3dBAmeXqxn/P+5zf ed/nPTkULqwjYyl5Vg6rypJmJpACwtrz+Nc34qsXZBLDmAh5rp3E0BmHD0MtVUYS3Tv2gET6 bh8PjVw1Y6jv0RSJzt7q5aM7jm8JdFc3QqLf7CdINFPWDZB1pohEpu5hPmqYthDoVIcdoIOa Rh4aHvEQqHiqAEd1D6twtNDZwUe1ky4+Mt+v4CG3KR0VuSqJ90SM428Dwdh0w3ym1PYzYNqN GpIZ8neSTP3lrczoYTfGnDv1DVNk6sGYI/MSZsr5O8l8bzYC5pz3a2amfeWWiO2Cd3axmfI8 VrUm9TPB7tPWQ7zs+3H5+q7MAtCyogSEUZBeBzUltVgJEFBCuhlA/2wPzhUPAXTeLMdDlJCe AVCrZZ7f+OOHcR4HNQEYHLtIcsUEgJq2KiJEhdOpcLT4MQhpgn4Z2m4F+ZwfCS8fH19kXqDF cHSg5qlPUVF0BjQG9obsaPol2GfSgVBPnB4kYWOxdpHH6Rg4MK7HQpqkU+CNJj0vpMPo9XDW dxZwjBgWWmoXV4B0gwB6Dl8ludiboMd8Bed0FAy4zXxOvwgXbFxTSCvhDctfz5h90Fbqfqbf hkO+J2QoKE6vhq32NZydBp0H+hfzQzoC9k9EchEi4FFrNc7Z4bD4oJCjE2FVadl/Q33NVqwc JOiWPIpuyZK6Jcvo/p9rAIQRxLC5aoWMVa/NYvcmqaUKdW6WLGmnUtEOnv5gb9D9qAM0B6aT ugBGgS4AKTwhOty3PigThu+SfvkVq1LuUOVmsuouEEcRCTHhJ13fyYS0TJrD7mHZbFb1/BSj wmILMHmnx3p+U+vtmYLESNd+sFr4T6RRMZAbn3fJK5m+rtbvI4/PX7MpN9xZVkfPLUuRvFoZ e89SvcfZ9sD14xl9ouXTKx8UReT21ASTxd4G+Zwxdl1cIENEbWDEH15Ku96aN3HEsTmd9X9+ fiFN0uuqMNTY34xyRDsDfb+k9uK35Yr9a4+aa8vmK5WyYyU7g7Z+w4XZlVK2KcX00Y6MVVu8 oo0BZdvWQJh9c/b2A/XJRj95aLDeb9C89f7r6fjdyULjcpP24qqKj4V/DsVv7JzDn5h1KfIV F5ZP/uTc9u4Jd4V8m9b4SSMUCE6/4isn8kWF+TeHW1iqoewL8UCOoW1wLIFQ75Ymv4ar1NJ/ ARmwujQwBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrAKsWRmVeSWpSXmKPExsVy+t/xu7oK0/+nGzw6pWVx4voiJos1e88x WaycuorN4vW0D2wW84+cY7W4d2kLk8WVr+/ZLNY9vcBu8WJvI4vFy1n32Cwu75rDZvG59wij xbbPLWwWa4/cZbdY+HEri8WSHbsYLdo6l7Fa3L13gsWi430Ds8XcL1OZLf7v2cFuMfvdfnaL LW8mslocXxtu0bJ/CouDpMfebwtYPHbOusvu0bPzDKPHplWdbB53ru1h85h3MtDjfvdxJo/N S+o9WtYeY/Lo/2vg8X7fVTaPvi2rGD02n672+LxJLoAvSs+mKL+0JFUhI7+4xFYp2tDCSM/Q 0kLPyMRSz9DYPNbKyFRJ384mJTUnsyy1SN8uQS9j6bZ21oI30hXzD+U0MK4U62Lk5JAQMJF4 vPoJaxcjF4eQwFJGiRct61khEjIS17pfskDYwhJ/rnWxQRS9ZpTYuPciE0iCV8BO4n7HT0YQ m0VAVWLn03/sEHFBiZMzn4A1iwrIS9y/NQMozsEhLBAjsepVOUhYREBZ4sraWYwgM5kF7rJJ zP75jQliQRuTxPVru8GuYBYQl7j1ZD7YMjYBI4kHy+eDxTkFzCV+nFvHCDKUWUBdYv08IYhy eYnmrbOZJzAKzUJyxiwkk2YhdMxC0rGAkWUVo0hqaXFuem6xkV5xYm5xaV66XnJ+7iZGYNLZ duznlh2MK1991DvEyMTBeIhRgoNZSYT3nPm/dCHelMTKqtSi/Pii0pzU4kOMpsCgmMgsJZqc D0x7eSXxhmYGpoYmZpYGppZmxkrivGxXzqcJCaQnlqRmp6YWpBbB9DFxcEo1MPkvPrVvrm/R Uns380g9VTeJhKiZZk7VV57NOBN3bqvM6zyvjOTA45dvShoU8D58MuVNbpLHzva9V5gfqt+v WiFm0bmTz6bZI+eHmsuVhf8qpmjkGJx4V8V1gbv4ucfe/0nn86w8rdK0P5Vaz2hae3ad7D7b L/9ZvL6b7zQK6RDxE/fvuBoiFlJ84u6NRx+2rchX1OAW0YjaPj/txYp6tSe3FnBNy9P1s/iU qXVcrbI4dcvVqGW7HDmF3uewt62Ps64RT8mdV7v1xk6N/5pNz+Uf8ifxrIh+/8Hza5DYxjcq bjL9x9yyQyet2Oy81fHL5c29c1IrWQ782K7tp6ygabcn1SrljWeG2aGLaVyvlFiKMxINtZiL ihMB7u4zXMMDAAA= X-CMS-MailID: 20250416114016eucas1p1d5d662177196380940a4bbca0a68bb15 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-RootMTR: 20250414185315eucas1p1fae2d6250bfd30b12bb084e197c02948 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250414185315eucas1p1fae2d6250bfd30b12bb084e197c02948 References: <20250414-apr_14_for_sending-v2-0-70c5af2af96c@samsung.com> <20250414-apr_14_for_sending-v2-2-70c5af2af96c@samsung.com> <20250415-tycoon-naming-20ba5a55c469@spud> On 4/15/25 18:38, Conor Dooley wrote: > On Mon, Apr 14, 2025 at 08:52:56PM +0200, Michal Wilczynski wrote: >> Extend the TH1520 AON firmware bindings to describe the GPU clkgen reset >> line, required for proper GPU clock and reset sequencing. >> >> The T-HEAD TH1520 GPU requires coordinated management of two clocks >> (core and sys) and two resets (GPU core reset and GPU clkgen >> reset). Only the clkgen reset is exposed at the AON level, to support >> SoC-specific initialization handled through a generic PM domain. The GPU >> core reset remains described in the GPU device node, as from the GPU >> driver's perspective, there is only a single reset line [1]. >> >> This follows upstream maintainers' recommendations [2] to abstract >> SoC specific details into the PM domain layer rather than exposing them >> to drivers directly. >> >> [1] - https://lore.kernel.org/all/816db99d-7088-4c1a-af03-b9a825ac09dc@imgtec.com/ >> [2] - https://lore.kernel.org/all/38d9650fc11a674c8b689d6bab937acf@kernel.org/ >> >> Signed-off-by: Michal Wilczynski >> --- >> .../devicetree/bindings/firmware/thead,th1520-aon.yaml | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml b/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml >> index bbc183200400de7aadbb21fea21911f6f4227b09..6ea3029c222df9ba6ea7d423b92ba248cfb02cc0 100644 >> --- a/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml >> +++ b/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml >> @@ -32,6 +32,13 @@ properties: >> items: >> - const: aon >> >> + resets: >> + maxItems: 1 >> + >> + reset-names: >> + items: >> + - const: gpu-clkgen >> + >> "#power-domain-cells": >> const: 1 >> >> @@ -39,6 +46,8 @@ required: >> - compatible >> - mboxes >> - mbox-names >> + - resets >> + - reset-names > > Given these are new required properties, have you made sure in the > driver that their absence will not cause problems with older > devicetrees? I took a brief look at the driver, and it _looked_ like you > were failing if they were not there? It was a brief look though, tbf. Hi Conor, Good point — but in this case, the devicetrees compatible with the driver haven’t been merged upstream yet. In fact, the TH1520 PM domains driver currently doesn’t even compile against mainline, since the required commit [1] didn’t make it into 6.15. That said, Drew has queued the DT changes for the next release [2], and you’ve queued [1], so assuming this series lands in 6.16, there won’t be any older devicetrees to support. As a result, I haven’t added a fallback path in the driver for missing properties. If, however this series doesn’t make it in for 6.16, then yes — we’d need to revisit the driver and add a failure safe path for cases where these properties aren’t present. Thanks, Michał [1] - https://lore.kernel.org/all/20250407-synergy-staff-b1cec90ffe72@spud/ [2] - https://lore.kernel.org/all/Z%2F6p6MQDS8ZlQv5r@x1/ > >> - "#power-domain-cells" >> >> additionalProperties: false >> @@ -49,5 +58,7 @@ examples: >> compatible = "thead,th1520-aon"; >> mboxes = <&mbox_910t 1>; >> mbox-names = "aon"; >> + resets = <&rst 0>; >> + reset-names = "gpu-clkgen"; >> #power-domain-cells = <1>; >> }; >> >> -- >> 2.34.1 >>