* [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332
@ 2025-01-30 4:34 Raj Kumar Bhagat
2025-01-30 4:34 ` [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module Raj Kumar Bhagat
` (12 more replies)
0 siblings, 13 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:34 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Raj Kumar Bhagat
Currently, Ath12k driver only supports WiFi devices that are based on
PCI bus. New Ath12k device IPQ5332 is based on AHB bus. Hence, add
Ath12k AHB support for IPQ5332.
IPQ5332 is IEEE802.11be 2 GHz 2x2 Wifi device. To bring-up IPQ5332
device:
- Add hardware parameters for IPQ5332.
- CE register address space in IPQ5332 is separate from WCSS register
space. Hence, add logic to remap CE register address.
- Add support for fixed QMI firmware memory for IPQ5332.
- Support userPD handling for WCSS secure PIL driver to enable ath12k
AHB support.
NOTE:
The working upstream DTS changes for this series have been posted as a
separate series.
[PATCH v2] arm64: dts: qcom: add wifi node for IPQ5332 based RDP441
v5:
- DT binding: Added `memory-region-names` property to address undocumented
ABIs.
- DT binding: Added four complete items to `memory-region`, required by
ath12k firmware.
- All calls to `of_find_node_by_name()` are removed. Introduced helper
function `ath12k_core_get_reserved_mem_by_name()` to get the reserved
memory by name.
- Removed unused include headers.
- Removed error prints for impossible scenarios.
- Used proper phandle API `of_parse_phandle()` to read `qcom,rproc`.
- Used `dev_err_probe()` API for logging errors wherever applicable.
- Changed hardware parameter `needs_m3_fw` to `enum ath12k_m3_fw_loaders`.
- Changed hardware parameter `bdf_addr` to `bdf_addr_offset` to store the
offset for BDF memory from the q6-memory as base.
v4: https://lore.kernel.org/all/20241210074159.2637933-1-quic_rajkbhag@quicinc.com/
- Missed to include some review list in v3. Hence sending v4 with
all review list as per - scripts/get_maintainers.pl
v3: https://lore.kernel.org/all/20241209165644.1680167-1-quic_rajkbhag@quicinc.com/
- DT binding: clock name changed from gcc_xo_clk to xo.
- DT binding: Upper constraint added for memory-region property.
- DT binding: The description for "qcom,rproc" phandle updated to represent
the hardware aspect.
- DT binding: Added property qcom,ath12k-calibration-variant.
- Squashed patch[2/22] to patch[8/22] of v2 into a single patch.
- Patch reordering is done.
- The hardware parameter "m3_fw_support" renamed to "needs_m3_fw".
- CMEM remap and CMEM register handling are dropped. CMEM registers are
accessed within WCSS register space (ab->mem).
- The devm APIs are used for interrupts handling.
- Logic updated in ath12k_ahb_map_service_to_pipe().
- Dependency path series from other subsystem are dropped.
v2: https://lore.kernel.org/all/20241015182637.955753-1-quic_rajkbhag@quicinc.com/
- "qcom,board_id" property is dropped. This is not the direct dependency
for Ath12k AHB support, hence it can be taken up separately.
- "qcom,bdf-addr" property is dropped in device-tree and moved to ath12k
driver.
- Currently we have only one compatible enum (qcom,ipq5332-wifi), hence
conditional if() check for defining the binding is removed.
- "reserved-memory" node is dropped from example DTS.
- "status" property is dropped in wifi node of example DTS.
- Integrated the “Support userPD handling for WCSS secure PIL driver”
patch series with the Ath12k AHB bring-up patch.
- Removed the RFC tag as all dependency patch series are now compilable.
v1: https://lore.kernel.org/all/20240814094323.3927603-1-quic_rajkbhag@quicinc.com/
Balamurugan S (6):
wifi: ath12k: fix incorrect CE addresses
wifi: ath12k: add ath12k_hw_params for IPQ5332
wifi: ath12k: avoid m3 firmware download in AHB device IPQ5332
wifi: ath12k: Add hw_params to remap CE register space for IPQ5332
wifi: ath12k: add AHB driver support for IPQ5332
wifi: ath12k: enable ath12k AHB support
P Praneesh (1):
wifi: ath12k: refactor ath12k_hw_regs structure
Raj Kumar Bhagat (2):
dt-bindings: net: wireless: describe the ath12k AHB module
wifi: ath12k: add support for fixed QMI firmware memory
Sowmiya Sree Elavalagan (4):
wifi: ath12k: Power up root PD
wifi: ath12k: Register various userPD interrupts and save SMEM entries
wifi: ath12k: Power up userPD
wifi: ath12k: Power down userPD
.../net/wireless/qcom,ath12k-ahb.yaml | 319 +++++
drivers/net/wireless/ath/ath12k/Kconfig | 6 +
drivers/net/wireless/ath/ath12k/Makefile | 1 +
drivers/net/wireless/ath/ath12k/ahb.c | 1234 +++++++++++++++++
drivers/net/wireless/ath/ath12k/ahb.h | 80 ++
drivers/net/wireless/ath/ath12k/ce.c | 92 +-
drivers/net/wireless/ath/ath12k/ce.h | 18 +-
drivers/net/wireless/ath/ath12k/core.c | 59 +-
drivers/net/wireless/ath/ath12k/core.h | 14 +-
drivers/net/wireless/ath/ath12k/hal.c | 84 +-
drivers/net/wireless/ath/ath12k/hal.h | 68 +-
drivers/net/wireless/ath/ath12k/hw.c | 479 ++++++-
drivers/net/wireless/ath/ath12k/hw.h | 22 +-
drivers/net/wireless/ath/ath12k/pci.c | 10 +-
drivers/net/wireless/ath/ath12k/pci.h | 4 +-
drivers/net/wireless/ath/ath12k/qmi.c | 218 ++-
drivers/net/wireless/ath/ath12k/qmi.h | 3 +-
17 files changed, 2593 insertions(+), 118 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
create mode 100644 drivers/net/wireless/ath/ath12k/ahb.c
create mode 100644 drivers/net/wireless/ath/ath12k/ahb.h
base-commit: a10b8b584b8bcb7559f068ce247fc27d0c4850ca
--
2.34.1
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
@ 2025-01-30 4:34 ` Raj Kumar Bhagat
2025-01-30 8:28 ` Krzysztof Kozlowski
2025-01-30 19:07 ` Jeff Johnson
2025-01-30 4:34 ` [PATCH v5 02/13] wifi: ath12k: fix incorrect CE addresses Raj Kumar Bhagat
` (11 subsequent siblings)
12 siblings, 2 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:34 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Raj Kumar Bhagat
Add device-tree bindings for the ATH12K module found in the IPQ5332
device.
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
.../net/wireless/qcom,ath12k-ahb.yaml | 319 ++++++++++++++++++
1 file changed, 319 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
new file mode 100644
index 000000000000..bd953a028dc3
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
@@ -0,0 +1,319 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/wireless/qcom,ath12k-ahb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies ath12k wireless devices (AHB)
+
+maintainers:
+ - Kalle Valo <kvalo@kernel.org>
+ - Jeff Johnson <jjohnson@kernel.org>
+
+description:
+ Qualcomm Technologies IEEE 802.11be AHB devices.
+
+properties:
+ compatible:
+ enum:
+ - qcom,ipq5332-wifi
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: XO clock used for copy engine
+
+ clock-names:
+ items:
+ - const: xo
+
+ interrupts:
+ items:
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Spawn acknowledge interrupt
+ - description: Stop acknowledge interrupt
+ - description: misc-pulse1 interrupt events
+ - description: misc-latch interrupt events
+ - description: sw exception interrupt events
+ - description: interrupt event for ring CE0
+ - description: interrupt event for ring CE1
+ - description: interrupt event for ring CE2
+ - description: interrupt event for ring CE3
+ - description: interrupt event for ring CE4
+ - description: interrupt event for ring CE5
+ - description: interrupt event for ring CE6
+ - description: interrupt event for ring CE7
+ - description: interrupt event for ring CE8
+ - description: interrupt event for ring CE9
+ - description: interrupt event for ring CE10
+ - description: interrupt event for ring CE11
+ - description: interrupt event for ring host2wbm-desc-feed
+ - description: interrupt event for ring host2reo-re-injection
+ - description: interrupt event for ring host2reo-command
+ - description: interrupt event for ring host2rxdma-monitor-ring1
+ - description: interrupt event for ring reo2ost-exception
+ - description: interrupt event for ring wbm2host-rx-release
+ - description: interrupt event for ring reo2host-status
+ - description: interrupt event for ring reo2host-destination-ring4
+ - description: interrupt event for ring reo2host-destination-ring3
+ - description: interrupt event for ring reo2host-destination-ring2
+ - description: interrupt event for ring reo2host-destination-ring1
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac3
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac2
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac1
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac3
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac2
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac1
+ - description: interrupt event for ring host2tcl-input-ring4
+ - description: interrupt event for ring host2tcl-input-ring3
+ - description: interrupt event for ring host2tcl-input-ring2
+ - description: interrupt event for ring host2tcl-input-ring1
+ - description: interrupt event for ring wbm2host-tx-completions-ring4
+ - description: interrupt event for ring wbm2host-tx-completions-ring3
+ - description: interrupt event for ring wbm2host-tx-completions-ring2
+ - description: interrupt event for ring wbm2host-tx-completions-ring1
+ - description: interrupt event for ring host2tx-monitor-ring1
+ - description: interrupt event for ring txmon2host-monitor-destination-mac3
+ - description: interrupt event for ring txmon2host-monitor-destination-mac2
+ - description: interrupt event for ring txmon2host-monitor-destination-mac1
+ - description: interrupt event for umac-reset
+
+ interrupt-names:
+ items:
+ - const: fatal
+ - const: ready
+ - const: spawn
+ - const: stop-ack
+ - const: misc-pulse1
+ - const: misc-latch
+ - const: sw-exception
+ - const: ce0
+ - const: ce1
+ - const: ce2
+ - const: ce3
+ - const: ce4
+ - const: ce5
+ - const: ce6
+ - const: ce7
+ - const: ce8
+ - const: ce9
+ - const: ce10
+ - const: ce11
+ - const: host2wbm-desc-feed
+ - const: host2reo-re-injection
+ - const: host2reo-command
+ - const: host2rxdma-monitor-ring1
+ - const: reo2ost-exception
+ - const: wbm2host-rx-release
+ - const: reo2host-status
+ - const: reo2host-destination-ring4
+ - const: reo2host-destination-ring3
+ - const: reo2host-destination-ring2
+ - const: reo2host-destination-ring1
+ - const: rxdma2host-monitor-destination-mac3
+ - const: rxdma2host-monitor-destination-mac2
+ - const: rxdma2host-monitor-destination-mac1
+ - const: host2rxdma-host-buf-ring-mac3
+ - const: host2rxdma-host-buf-ring-mac2
+ - const: host2rxdma-host-buf-ring-mac1
+ - const: host2tcl-input-ring4
+ - const: host2tcl-input-ring3
+ - const: host2tcl-input-ring2
+ - const: host2tcl-input-ring1
+ - const: wbm2host-tx-completions-ring4
+ - const: wbm2host-tx-completions-ring3
+ - const: wbm2host-tx-completions-ring2
+ - const: wbm2host-tx-completions-ring1
+ - const: host2tx-monitor-ring1
+ - const: txmon2host-monitor-destination-mac3
+ - const: txmon2host-monitor-destination-mac2
+ - const: txmon2host-monitor-destination-mac1
+ - const: umac-reset
+
+ memory-region:
+ description:
+ phandle to a node describing reserved memory (System RAM memory)
+ used by ath12k firmware (see bindings/reserved-memory/reserved-memory.txt)
+ items:
+ - description: Q6 memory region
+ - description: m3 dump memory region
+ - description: Q6 caldata memory region
+ - description: Multi Link Operation (MLO) Global memory region
+
+ memory-region-names:
+ description:
+ Name of the reserved memory region used by ath12k firmware
+ items:
+ - const: q6-region
+ - const: m3-dump
+ - const: q6-caldb
+ - const: mlo-global-mem
+
+ qcom,ath12k-calibration-variant:
+ $ref: /schemas/types.yaml#/definitions/string
+ description:
+ String to uniquely identify variant of the calibration data for designs
+ with colliding bus and device ids
+
+ qcom,rproc:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to the Qualcomm Hexagon DSP(q6 remote processor), which is utilized
+ for offloading WiFi processing tasks, this q6 remote processor operates in
+ conjunction with WiFi.
+
+ qcom,smem-states:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: States used by the AP to signal the remote processor
+ items:
+ - description: Shutdown WCSS pd
+ - description: Stop WCSS pd
+ - description: Spawn WCSS pd
+
+ qcom,smem-state-names:
+ description:
+ Names of the states used by the AP to signal the remote processor
+ items:
+ - const: shutdown
+ - const: stop
+ - const: spawn
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - interrupt-names
+ - memory-region
+ - memory-region-names
+ - qcom,rproc
+ - qcom,smem-states
+ - qcom,smem-state-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
+
+ wifi0: wifi@c000000 {
+ compatible = "qcom,ipq5332-wifi";
+ reg = <0x0c000000 0x1000000>;
+ clocks = <&gcc GCC_XO_CLK>;
+ clock-names = "xo";
+ interrupts-extended = <&wcss_smp2p_in 8 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 9 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 12 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 11 IRQ_TYPE_NONE>,
+ <&intc GIC_SPI 559 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 560 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 561 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 422 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 423 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 424 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 425 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 426 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 427 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 428 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 429 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 430 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 431 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 491 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 495 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 493 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 544 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 457 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 497 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 454 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 453 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 452 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 451 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 488 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 488 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 484 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 554 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 554 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 549 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 507 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 500 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 499 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 498 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 450 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 449 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 447 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 543 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 486 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 486 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 482 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 419 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "fatal",
+ "ready",
+ "spawn",
+ "stop-ack",
+ "misc-pulse1",
+ "misc-latch",
+ "sw-exception",
+ "ce0",
+ "ce1",
+ "ce2",
+ "ce3",
+ "ce4",
+ "ce5",
+ "ce6",
+ "ce7",
+ "ce8",
+ "ce9",
+ "ce10",
+ "ce11",
+ "host2wbm-desc-feed",
+ "host2reo-re-injection",
+ "host2reo-command",
+ "host2rxdma-monitor-ring1",
+ "reo2ost-exception",
+ "wbm2host-rx-release",
+ "reo2host-status",
+ "reo2host-destination-ring4",
+ "reo2host-destination-ring3",
+ "reo2host-destination-ring2",
+ "reo2host-destination-ring1",
+ "rxdma2host-monitor-destination-mac3",
+ "rxdma2host-monitor-destination-mac2",
+ "rxdma2host-monitor-destination-mac1",
+ "host2rxdma-host-buf-ring-mac3",
+ "host2rxdma-host-buf-ring-mac2",
+ "host2rxdma-host-buf-ring-mac1",
+ "host2tcl-input-ring4",
+ "host2tcl-input-ring3",
+ "host2tcl-input-ring2",
+ "host2tcl-input-ring1",
+ "wbm2host-tx-completions-ring4",
+ "wbm2host-tx-completions-ring3",
+ "wbm2host-tx-completions-ring2",
+ "wbm2host-tx-completions-ring1",
+ "host2tx-monitor-ring1",
+ "txmon2host-monitor-destination-mac3",
+ "txmon2host-monitor-destination-mac2",
+ "txmon2host-monitor-destination-mac1",
+ "umac-reset";
+
+ memory-region = <&q6_region>, <&m3_dump>, <&q6_caldb>, <&mlo_mem>;
+ memory-region-names = "q6-region", "m3-dump", "q6-caldb", "mlo-global-mem";
+ qcom,ath12k-calibration-variant = "RDP441_1";
+ qcom,rproc = <&q6v5_wcss>;
+ qcom,smem-states = <&wcss_smp2p_out 8>,
+ <&wcss_smp2p_out 9>,
+ <&wcss_smp2p_out 10>;
+ qcom,smem-state-names = "shutdown",
+ "stop",
+ "spawn";
+ };
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v5 02/13] wifi: ath12k: fix incorrect CE addresses
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
2025-01-30 4:34 ` [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module Raj Kumar Bhagat
@ 2025-01-30 4:34 ` Raj Kumar Bhagat
2025-01-30 4:34 ` [PATCH v5 03/13] wifi: ath12k: refactor ath12k_hw_regs structure Raj Kumar Bhagat
` (10 subsequent siblings)
12 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:34 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Balamurugan S, Raj Kumar Bhagat
From: Balamurugan S <quic_bselvara@quicinc.com>
In the current ath12k implementation, the CE addresses
CE_HOST_IE_ADDRESS and CE_HOST_IE_2_ADDRESS are incorrect. These
values were inherited from ath11k, but ath12k does not currently use
them.
However, the Ath12k AHB support relies on these addresses. Therefore,
correct the CE addresses for ath12k.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ce.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/ce.h b/drivers/net/wireless/ath/ath12k/ce.h
index 1a14b9fb86b8..f85188af5de2 100644
--- a/drivers/net/wireless/ath/ath12k/ce.h
+++ b/drivers/net/wireless/ath/ath12k/ce.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef ATH12K_CE_H
@@ -39,8 +39,8 @@
#define PIPEDIR_INOUT_H2H 4 /* bidirectional, host to host */
/* CE address/mask */
-#define CE_HOST_IE_ADDRESS 0x00A1803C
-#define CE_HOST_IE_2_ADDRESS 0x00A18040
+#define CE_HOST_IE_ADDRESS 0x75804C
+#define CE_HOST_IE_2_ADDRESS 0x758050
#define CE_HOST_IE_3_ADDRESS CE_HOST_IE_ADDRESS
#define CE_HOST_IE_3_SHIFT 0xC
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v5 03/13] wifi: ath12k: refactor ath12k_hw_regs structure
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
2025-01-30 4:34 ` [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module Raj Kumar Bhagat
2025-01-30 4:34 ` [PATCH v5 02/13] wifi: ath12k: fix incorrect CE addresses Raj Kumar Bhagat
@ 2025-01-30 4:34 ` Raj Kumar Bhagat
2025-01-30 4:34 ` [PATCH v5 04/13] wifi: ath12k: add ath12k_hw_params for IPQ5332 Raj Kumar Bhagat
` (9 subsequent siblings)
12 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:34 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel, P Praneesh,
Balamurugan S, Raj Kumar Bhagat
From: P Praneesh <quic_ppranees@quicinc.com>
IPQ5332 device have different register address values for the below
registers:
HAL_TCL1_RING_BASE_LSB
HAL_TCL1_RING_BASE_MSB
HAL_TCL2_RING_BASE_LSB
HAL_SEQ_WCSS_UMAC_CE0_SRC_REG
HAL_SEQ_WCSS_UMAC_CE0_DST_REG
HAL_SEQ_WCSS_UMAC_CE1_SRC_REG
HAL_SEQ_WCSS_UMAC_CE1_DST_REG
Hence, refactor ath12k_hw_regs structure to accommodate these changes
in IPQ5332.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Co-developed-by: Balamurugan S <quic_bselvara@quicinc.com>
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/hal.c | 84 +++++++++++++--------------
drivers/net/wireless/ath/ath12k/hal.h | 63 +++++++++++---------
drivers/net/wireless/ath/ath12k/hw.c | 29 ++++++++-
drivers/net/wireless/ath/ath12k/hw.h | 10 +++-
4 files changed, 114 insertions(+), 72 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/hal.c b/drivers/net/wireless/ath/ath12k/hal.c
index cd59ff8e6c7b..031f76d88bef 100644
--- a/drivers/net/wireless/ath/ath12k/hal.c
+++ b/drivers/net/wireless/ath/ath12k/hal.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/dma-mapping.h>
#include "hal_tx.h"
@@ -552,9 +552,9 @@ static int ath12k_hal_srng_create_config_qcn9274(struct ath12k_base *ab)
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_HP;
s = &hal->srng_config[HAL_TCL_DATA];
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB(ab);
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_HP;
- s->reg_size[0] = HAL_TCL2_RING_BASE_LSB - HAL_TCL1_RING_BASE_LSB;
+ s->reg_size[0] = HAL_TCL2_RING_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB(ab);
s->reg_size[1] = HAL_TCL2_RING_HP - HAL_TCL1_RING_HP;
s = &hal->srng_config[HAL_TCL_CMD];
@@ -566,29 +566,29 @@ static int ath12k_hal_srng_create_config_qcn9274(struct ath12k_base *ab)
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_HP;
s = &hal->srng_config[HAL_CE_SRC];
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_HP;
- s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG -
- HAL_SEQ_WCSS_UMAC_CE0_SRC_REG;
- s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG -
- HAL_SEQ_WCSS_UMAC_CE0_SRC_REG;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
s = &hal->srng_config[HAL_CE_DST];
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_HP;
- s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
- s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
s = &hal->srng_config[HAL_CE_DST_STATUS];
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG +
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) +
HAL_CE_DST_STATUS_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_STATUS_RING_HP;
- s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
- s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
s = &hal->srng_config[HAL_WBM_IDLE_LINK];
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab);
@@ -1371,9 +1371,9 @@ static int ath12k_hal_srng_create_config_wcn7850(struct ath12k_base *ab)
s = &hal->srng_config[HAL_TCL_DATA];
s->max_rings = 5;
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB(ab);
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_HP;
- s->reg_size[0] = HAL_TCL2_RING_BASE_LSB - HAL_TCL1_RING_BASE_LSB;
+ s->reg_size[0] = HAL_TCL2_RING_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB(ab);
s->reg_size[1] = HAL_TCL2_RING_HP - HAL_TCL1_RING_HP;
s = &hal->srng_config[HAL_TCL_CMD];
@@ -1386,31 +1386,31 @@ static int ath12k_hal_srng_create_config_wcn7850(struct ath12k_base *ab)
s = &hal->srng_config[HAL_CE_SRC];
s->max_rings = 12;
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_HP;
- s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG -
- HAL_SEQ_WCSS_UMAC_CE0_SRC_REG;
- s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG -
- HAL_SEQ_WCSS_UMAC_CE0_SRC_REG;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
s = &hal->srng_config[HAL_CE_DST];
s->max_rings = 12;
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_HP;
- s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
- s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
s = &hal->srng_config[HAL_CE_DST_STATUS];
s->max_rings = 12;
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG +
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) +
HAL_CE_DST_STATUS_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_STATUS_RING_HP;
- s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
- s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
s = &hal->srng_config[HAL_WBM_IDLE_LINK];
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab);
@@ -1756,7 +1756,7 @@ static void ath12k_hal_srng_src_hw_init(struct ath12k_base *ab,
HAL_TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB) |
u32_encode_bits((srng->entry_size * srng->num_entries),
HAL_TCL1_RING_BASE_MSB_RING_SIZE);
- ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_BASE_MSB_OFFSET, val);
+ ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_BASE_MSB_OFFSET(ab), val);
val = u32_encode_bits(srng->entry_size, HAL_REO1_RING_ID_ENTRY_SIZE);
ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_ID_OFFSET(ab), val);
diff --git a/drivers/net/wireless/ath/ath12k/hal.h b/drivers/net/wireless/ath/ath12k/hal.h
index 94e2e8735958..1ce97f9a92ac 100644
--- a/drivers/net/wireless/ath/ath12k/hal.h
+++ b/drivers/net/wireless/ath/ath12k/hal.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef ATH12K_HAL_H
@@ -44,10 +44,14 @@ struct ath12k_base;
#define HAL_SEQ_WCSS_UMAC_OFFSET 0x00a00000
#define HAL_SEQ_WCSS_UMAC_REO_REG 0x00a38000
#define HAL_SEQ_WCSS_UMAC_TCL_REG 0x00a44000
-#define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG 0x01b80000
-#define HAL_SEQ_WCSS_UMAC_CE0_DST_REG 0x01b81000
-#define HAL_SEQ_WCSS_UMAC_CE1_SRC_REG 0x01b82000
-#define HAL_SEQ_WCSS_UMAC_CE1_DST_REG 0x01b83000
+#define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) \
+ ((ab)->hw_params->regs->hal_umac_ce0_src_reg_base)
+#define HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) \
+ ((ab)->hw_params->regs->hal_umac_ce0_dest_reg_base)
+#define HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) \
+ ((ab)->hw_params->regs->hal_umac_ce1_src_reg_base)
+#define HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) \
+ ((ab)->hw_params->regs->hal_umac_ce1_dest_reg_base)
#define HAL_SEQ_WCSS_UMAC_WBM_REG 0x00a34000
#define HAL_CE_WFSS_CE_REG_BASE 0x01b80000
@@ -57,8 +61,10 @@ struct ath12k_base;
/* SW2TCL(x) R0 ring configuration address */
#define HAL_TCL1_RING_CMN_CTRL_REG 0x00000020
#define HAL_TCL1_RING_DSCP_TID_MAP 0x00000240
-#define HAL_TCL1_RING_BASE_LSB 0x00000900
-#define HAL_TCL1_RING_BASE_MSB 0x00000904
+#define HAL_TCL1_RING_BASE_LSB(ab) \
+ ((ab)->hw_params->regs->hal_tcl1_ring_base_lsb)
+#define HAL_TCL1_RING_BASE_MSB(ab) \
+ ((ab)->hw_params->regs->hal_tcl1_ring_base_msb)
#define HAL_TCL1_RING_ID(ab) ((ab)->hw_params->regs->hal_tcl1_ring_id)
#define HAL_TCL1_RING_MISC(ab) \
((ab)->hw_params->regs->hal_tcl1_ring_misc)
@@ -76,30 +82,31 @@ struct ath12k_base;
((ab)->hw_params->regs->hal_tcl1_ring_msi1_base_msb)
#define HAL_TCL1_RING_MSI1_DATA(ab) \
((ab)->hw_params->regs->hal_tcl1_ring_msi1_data)
-#define HAL_TCL2_RING_BASE_LSB 0x00000978
+#define HAL_TCL2_RING_BASE_LSB(ab) \
+ ((ab)->hw_params->regs->hal_tcl2_ring_base_lsb)
#define HAL_TCL_RING_BASE_LSB(ab) \
((ab)->hw_params->regs->hal_tcl_ring_base_lsb)
-#define HAL_TCL1_RING_MSI1_BASE_LSB_OFFSET(ab) \
- (HAL_TCL1_RING_MSI1_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_MSI1_BASE_MSB_OFFSET(ab) \
- (HAL_TCL1_RING_MSI1_BASE_MSB(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_MSI1_DATA_OFFSET(ab) \
- (HAL_TCL1_RING_MSI1_DATA(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_BASE_MSB_OFFSET \
- (HAL_TCL1_RING_BASE_MSB - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_ID_OFFSET(ab) \
- (HAL_TCL1_RING_ID(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_CONSR_INT_SETUP_IX0_OFFSET(ab) \
- (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX0(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_CONSR_INT_SETUP_IX1_OFFSET(ab) \
- (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX1(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_TP_ADDR_LSB_OFFSET(ab) \
- (HAL_TCL1_RING_TP_ADDR_LSB(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_TP_ADDR_MSB_OFFSET(ab) \
- (HAL_TCL1_RING_TP_ADDR_MSB(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_MISC_OFFSET(ab) \
- (HAL_TCL1_RING_MISC(ab) - HAL_TCL1_RING_BASE_LSB)
+#define HAL_TCL1_RING_MSI1_BASE_LSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_MSI1_BASE_LSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_MSI1_BASE_MSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_MSI1_BASE_MSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_MSI1_DATA_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_MSI1_DATA(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_BASE_MSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_BASE_MSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_ID_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_ID(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_CONSR_INT_SETUP_IX0_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX0(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_CONSR_INT_SETUP_IX1_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX1(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_TP_ADDR_LSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_TP_ADDR_LSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_TP_ADDR_MSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_TP_ADDR_MSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_MISC_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_MISC(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
/* SW2TCL(x) R2 ring pointers (head/tail) address */
#define HAL_TCL1_RING_HP 0x00002000
diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c
index a106ebed7870..4c9d6c42fbb9 100644
--- a/drivers/net/wireless/ath/ath12k/hw.c
+++ b/drivers/net/wireless/ath/ath12k/hw.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/types.h>
@@ -619,6 +619,9 @@ static const struct ath12k_hw_regs qcn9274_v1_regs = {
.hal_tcl1_ring_msi1_base_msb = 0x0000094c,
.hal_tcl1_ring_msi1_data = 0x00000950,
.hal_tcl_ring_base_lsb = 0x00000b58,
+ .hal_tcl1_ring_base_lsb = 0x00000900,
+ .hal_tcl1_ring_base_msb = 0x00000904,
+ .hal_tcl2_ring_base_lsb = 0x00000978,
/* TCL STATUS ring address */
.hal_tcl_status_ring_base_lsb = 0x00000d38,
@@ -681,6 +684,12 @@ static const struct ath12k_hw_regs qcn9274_v1_regs = {
/* REO status ring address */
.hal_reo_status_ring_base = 0x00000a84,
+
+ /* CE base address */
+ .hal_umac_ce0_src_reg_base = 0x01b80000,
+ .hal_umac_ce0_dest_reg_base = 0x01b81000,
+ .hal_umac_ce1_src_reg_base = 0x01b82000,
+ .hal_umac_ce1_dest_reg_base = 0x01b83000,
};
static const struct ath12k_hw_regs qcn9274_v2_regs = {
@@ -695,6 +704,9 @@ static const struct ath12k_hw_regs qcn9274_v2_regs = {
.hal_tcl1_ring_msi1_base_msb = 0x0000094c,
.hal_tcl1_ring_msi1_data = 0x00000950,
.hal_tcl_ring_base_lsb = 0x00000b58,
+ .hal_tcl1_ring_base_lsb = 0x00000900,
+ .hal_tcl1_ring_base_msb = 0x00000904,
+ .hal_tcl2_ring_base_lsb = 0x00000978,
/* TCL STATUS ring address */
.hal_tcl_status_ring_base_lsb = 0x00000d38,
@@ -761,6 +773,12 @@ static const struct ath12k_hw_regs qcn9274_v2_regs = {
/* REO status ring address */
.hal_reo_status_ring_base = 0x00000aa0,
+
+ /* CE base address */
+ .hal_umac_ce0_src_reg_base = 0x01b80000,
+ .hal_umac_ce0_dest_reg_base = 0x01b81000,
+ .hal_umac_ce1_src_reg_base = 0x01b82000,
+ .hal_umac_ce1_dest_reg_base = 0x01b83000,
};
static const struct ath12k_hw_regs wcn7850_regs = {
@@ -775,6 +793,9 @@ static const struct ath12k_hw_regs wcn7850_regs = {
.hal_tcl1_ring_msi1_base_msb = 0x0000094c,
.hal_tcl1_ring_msi1_data = 0x00000950,
.hal_tcl_ring_base_lsb = 0x00000b58,
+ .hal_tcl1_ring_base_lsb = 0x00000900,
+ .hal_tcl1_ring_base_msb = 0x00000904,
+ .hal_tcl2_ring_base_lsb = 0x00000978,
/* TCL STATUS ring address */
.hal_tcl_status_ring_base_lsb = 0x00000d38,
@@ -837,6 +858,12 @@ static const struct ath12k_hw_regs wcn7850_regs = {
/* REO status ring address */
.hal_reo_status_ring_base = 0x00000a84,
+
+ /* CE base address */
+ .hal_umac_ce0_src_reg_base = 0x01b80000,
+ .hal_umac_ce0_dest_reg_base = 0x01b81000,
+ .hal_umac_ce1_src_reg_base = 0x01b82000,
+ .hal_umac_ce1_dest_reg_base = 0x01b83000,
};
static const struct ath12k_hw_hal_params ath12k_hw_hal_params_qcn9274 = {
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index 8d52182e28ae..acb81b5798ac 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef ATH12K_HW_H
@@ -293,6 +293,9 @@ struct ath12k_hw_regs {
u32 hal_tcl1_ring_msi1_base_msb;
u32 hal_tcl1_ring_msi1_data;
u32 hal_tcl_ring_base_lsb;
+ u32 hal_tcl1_ring_base_lsb;
+ u32 hal_tcl1_ring_base_msb;
+ u32 hal_tcl2_ring_base_lsb;
u32 hal_tcl_status_ring_base_lsb;
@@ -316,6 +319,11 @@ struct ath12k_hw_regs {
u32 pcie_qserdes_sysclk_en_sel;
u32 pcie_pcs_osc_dtct_config_base;
+ u32 hal_umac_ce0_src_reg_base;
+ u32 hal_umac_ce0_dest_reg_base;
+ u32 hal_umac_ce1_src_reg_base;
+ u32 hal_umac_ce1_dest_reg_base;
+
u32 hal_ppe_rel_ring_base;
u32 hal_reo2_ring_base;
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v5 04/13] wifi: ath12k: add ath12k_hw_params for IPQ5332
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (2 preceding siblings ...)
2025-01-30 4:34 ` [PATCH v5 03/13] wifi: ath12k: refactor ath12k_hw_regs structure Raj Kumar Bhagat
@ 2025-01-30 4:34 ` Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 05/13] wifi: ath12k: avoid m3 firmware download in AHB device IPQ5332 Raj Kumar Bhagat
` (8 subsequent siblings)
12 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:34 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Balamurugan S, P Praneesh, Raj Kumar Bhagat
From: Balamurugan S <quic_bselvara@quicinc.com>
Add ath12k_hw_params for new ath12k AHB based WiFi device IPQ5332.
Some hardware parameters like hw_ops, wmi_init & hal_ops are same
between IPQ5332 and QCN9274, hence use these same parameters for
IPQ5332.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ce.c | 92 +++++-
drivers/net/wireless/ath/ath12k/ce.h | 1 +
drivers/net/wireless/ath/ath12k/core.h | 3 +-
drivers/net/wireless/ath/ath12k/hw.c | 415 +++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/qmi.h | 3 +-
5 files changed, 511 insertions(+), 3 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/ce.c b/drivers/net/wireless/ath/ath12k/ce.c
index be0d669d31fc..7a5656aceebe 100644
--- a/drivers/net/wireless/ath/ath12k/ce.c
+++ b/drivers/net/wireless/ath/ath12k/ce.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "dp_rx.h"
@@ -219,6 +219,96 @@ const struct ce_attr ath12k_host_ce_config_wcn7850[] = {
};
+const struct ce_attr ath12k_host_ce_config_ipq5332[] = {
+ /* CE0: host->target HTC control and raw streams */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 16,
+ .src_sz_max = 2048,
+ .dest_nentries = 0,
+ },
+ /* CE1: target->host HTT + HTC control */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 0,
+ .src_sz_max = 2048,
+ .dest_nentries = 512,
+ .recv_cb = ath12k_htc_rx_completion_handler,
+ },
+ /* CE2: target->host WMI */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 0,
+ .src_sz_max = 2048,
+ .dest_nentries = 128,
+ .recv_cb = ath12k_htc_rx_completion_handler,
+ },
+ /* CE3: host->target WMI */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 32,
+ .src_sz_max = 2048,
+ .dest_nentries = 0,
+ },
+ /* CE4: host->target HTT */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 2048,
+ .src_sz_max = 256,
+ .dest_nentries = 0,
+ },
+ /* CE5: target -> host PKTLOG */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 0,
+ .src_sz_max = 2048,
+ .dest_nentries = 512,
+ .recv_cb = ath12k_dp_htt_htc_t2h_msg_handler,
+ },
+ /* CE6: Target autonomous HIF_memcpy */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+ /* CE7: CV Prefetch */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+ /* CE8: Target HIF memcpy (Generic HIF memcypy) */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+ /* CE9: WMI logging/CFR/Spectral/Radar */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 0,
+ .src_sz_max = 2048,
+ .dest_nentries = 128,
+ },
+ /* CE10: Unused */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+ /* CE11: Unused */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+};
+
static int ath12k_ce_rx_buf_enqueue_pipe(struct ath12k_ce_pipe *pipe,
struct sk_buff *skb, dma_addr_t paddr)
{
diff --git a/drivers/net/wireless/ath/ath12k/ce.h b/drivers/net/wireless/ath/ath12k/ce.h
index f85188af5de2..8007a94cec5d 100644
--- a/drivers/net/wireless/ath/ath12k/ce.h
+++ b/drivers/net/wireless/ath/ath12k/ce.h
@@ -164,6 +164,7 @@ struct ath12k_ce {
extern const struct ce_attr ath12k_host_ce_config_qcn9274[];
extern const struct ce_attr ath12k_host_ce_config_wcn7850[];
+extern const struct ce_attr ath12k_host_ce_config_ipq5332[];
void ath12k_ce_cleanup_pipes(struct ath12k_base *ab);
void ath12k_ce_rx_replenish_retry(struct timer_list *t);
diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h
index 28db100cfac0..353dce22682a 100644
--- a/drivers/net/wireless/ath/ath12k/core.h
+++ b/drivers/net/wireless/ath/ath12k/core.h
@@ -148,7 +148,8 @@ struct ath12k_skb_rxcb {
enum ath12k_hw_rev {
ATH12K_HW_QCN9274_HW10,
ATH12K_HW_QCN9274_HW20,
- ATH12K_HW_WCN7850_HW20
+ ATH12K_HW_WCN7850_HW20,
+ ATH12K_HW_IPQ5332_HW10,
};
enum ath12k_firmware_mode {
diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c
index 4c9d6c42fbb9..86c4ce143169 100644
--- a/drivers/net/wireless/ath/ath12k/hw.c
+++ b/drivers/net/wireless/ath/ath12k/hw.c
@@ -535,6 +535,217 @@ static const struct service_to_pipe ath12k_target_service_to_ce_map_wlan_wcn7850
},
};
+static const struct ce_pipe_config ath12k_target_ce_config_wlan_ipq5332[] = {
+ /* host->target HTC control and raw streams */
+ {
+ .pipenum = __cpu_to_le32(0),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* target->host HTT */
+ {
+ .pipenum = __cpu_to_le32(1),
+ .pipedir = __cpu_to_le32(PIPEDIR_IN),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* target->host WMI + HTC control */
+ {
+ .pipenum = __cpu_to_le32(2),
+ .pipedir = __cpu_to_le32(PIPEDIR_IN),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* host->target WMI */
+ {
+ .pipenum = __cpu_to_le32(3),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* host->target HTT */
+ {
+ .pipenum = __cpu_to_le32(4),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(256),
+ .nbytes_max = __cpu_to_le32(256),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS | CE_ATTR_DIS_INTR),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* Target -> host PKTLOG */
+ {
+ .pipenum = __cpu_to_le32(5),
+ .pipedir = __cpu_to_le32(PIPEDIR_IN),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* Reserved for target autonomous HIF_memcpy */
+ {
+ .pipenum = __cpu_to_le32(6),
+ .pipedir = __cpu_to_le32(PIPEDIR_INOUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(16384),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* CE7 Reserved for CV Prefetch */
+ {
+ .pipenum = __cpu_to_le32(7),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* CE8 Reserved for target generic HIF memcpy */
+ {
+ .pipenum = __cpu_to_le32(8),
+ .pipedir = __cpu_to_le32(PIPEDIR_INOUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(16384),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* CE9 WMI logging/CFR/Spectral/Radar/ */
+ {
+ .pipenum = __cpu_to_le32(9),
+ .pipedir = __cpu_to_le32(PIPEDIR_IN),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* Unused TBD */
+ {
+ .pipenum = __cpu_to_le32(10),
+ .pipedir = __cpu_to_le32(PIPEDIR_NONE),
+ .nentries = __cpu_to_le32(0),
+ .nbytes_max = __cpu_to_le32(0),
+ .flags = __cpu_to_le32(0),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* Unused TBD */
+ {
+ .pipenum = __cpu_to_le32(11),
+ .pipedir = __cpu_to_le32(PIPEDIR_NONE),
+ .nentries = __cpu_to_le32(0),
+ .nbytes_max = __cpu_to_le32(0),
+ .flags = __cpu_to_le32(0),
+ .reserved = __cpu_to_le32(0),
+ },
+};
+
+static const struct service_to_pipe ath12k_target_service_to_ce_map_wlan_ipq5332[] = {
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VO),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VO),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BK),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BK),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BE),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BE),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VI),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VI),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_RSVD_CTRL),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(0),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_RSVD_CTRL),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(1),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_TEST_RAW_STREAMS),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(0),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_TEST_RAW_STREAMS),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(1),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_HTT_DATA_MSG),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(4),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_HTT_DATA_MSG),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(1),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_PKT_LOG),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(5),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL_DIAG),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(9),
+ },
+ /* (Additions here) */
+
+ { /* must be last */
+ __cpu_to_le32(0),
+ __cpu_to_le32(0),
+ __cpu_to_le32(0),
+ },
+};
+
static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_qcn9274 = {
.tx = {
ATH12K_TX_RING_MASK_0,
@@ -577,6 +788,46 @@ static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_qcn9274 = {
},
};
+static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_ipq5332 = {
+ .tx = {
+ ATH12K_TX_RING_MASK_0,
+ ATH12K_TX_RING_MASK_1,
+ ATH12K_TX_RING_MASK_2,
+ ATH12K_TX_RING_MASK_3,
+ },
+ .rx_mon_dest = {
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ ATH12K_RX_MON_RING_MASK_0,
+ },
+ .rx = {
+ 0, 0, 0, 0,
+ ATH12K_RX_RING_MASK_0,
+ ATH12K_RX_RING_MASK_1,
+ ATH12K_RX_RING_MASK_2,
+ ATH12K_RX_RING_MASK_3,
+ },
+ .rx_err = {
+ 0, 0, 0,
+ ATH12K_RX_ERR_RING_MASK_0,
+ },
+ .rx_wbm_rel = {
+ 0, 0, 0,
+ ATH12K_RX_WBM_REL_RING_MASK_0,
+ },
+ .reo_status = {
+ 0, 0, 0,
+ ATH12K_REO_STATUS_RING_MASK_0,
+ },
+ .host2rxdma = {
+ 0, 0, 0,
+ ATH12K_HOST2RXDMA_RING_MASK_0,
+ },
+ .tx_mon_dest = {
+ ATH12K_TX_MON_RING_MASK_0,
+ ATH12K_TX_MON_RING_MASK_1,
+ },
+};
+
static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_wcn7850 = {
.tx = {
ATH12K_TX_RING_MASK_0,
@@ -781,6 +1032,90 @@ static const struct ath12k_hw_regs qcn9274_v2_regs = {
.hal_umac_ce1_dest_reg_base = 0x01b83000,
};
+static const struct ath12k_hw_regs ipq5332_regs = {
+ /* SW2TCL(x) R0 ring configuration address */
+ .hal_tcl1_ring_id = 0x00000918,
+ .hal_tcl1_ring_misc = 0x00000920,
+ .hal_tcl1_ring_tp_addr_lsb = 0x0000092c,
+ .hal_tcl1_ring_tp_addr_msb = 0x00000930,
+ .hal_tcl1_ring_consumer_int_setup_ix0 = 0x00000940,
+ .hal_tcl1_ring_consumer_int_setup_ix1 = 0x00000944,
+ .hal_tcl1_ring_msi1_base_lsb = 0x00000958,
+ .hal_tcl1_ring_msi1_base_msb = 0x0000095c,
+ .hal_tcl1_ring_base_lsb = 0x00000910,
+ .hal_tcl1_ring_base_msb = 0x00000914,
+ .hal_tcl1_ring_msi1_data = 0x00000960,
+ .hal_tcl2_ring_base_lsb = 0x00000988,
+ .hal_tcl_ring_base_lsb = 0x00000b68,
+
+ /* TCL STATUS ring address */
+ .hal_tcl_status_ring_base_lsb = 0x00000d48,
+
+ /* REO DEST ring address */
+ .hal_reo2_ring_base = 0x00000578,
+ .hal_reo1_misc_ctrl_addr = 0x00000b9c,
+ .hal_reo1_sw_cookie_cfg0 = 0x0000006c,
+ .hal_reo1_sw_cookie_cfg1 = 0x00000070,
+ .hal_reo1_qdesc_lut_base0 = 0x00000074,
+ .hal_reo1_qdesc_lut_base1 = 0x00000078,
+ .hal_reo1_ring_base_lsb = 0x00000500,
+ .hal_reo1_ring_base_msb = 0x00000504,
+ .hal_reo1_ring_id = 0x00000508,
+ .hal_reo1_ring_misc = 0x00000510,
+ .hal_reo1_ring_hp_addr_lsb = 0x00000514,
+ .hal_reo1_ring_hp_addr_msb = 0x00000518,
+ .hal_reo1_ring_producer_int_setup = 0x00000524,
+ .hal_reo1_ring_msi1_base_lsb = 0x00000548,
+ .hal_reo1_ring_msi1_base_msb = 0x0000054C,
+ .hal_reo1_ring_msi1_data = 0x00000550,
+ .hal_reo1_aging_thres_ix0 = 0x00000B28,
+ .hal_reo1_aging_thres_ix1 = 0x00000B2C,
+ .hal_reo1_aging_thres_ix2 = 0x00000B30,
+ .hal_reo1_aging_thres_ix3 = 0x00000B34,
+
+ /* REO Exception ring address */
+ .hal_reo2_sw0_ring_base = 0x000008c0,
+
+ /* REO Reinject ring address */
+ .hal_sw2reo_ring_base = 0x00000320,
+ .hal_sw2reo1_ring_base = 0x00000398,
+
+ /* REO cmd ring address */
+ .hal_reo_cmd_ring_base = 0x000002A8,
+
+ /* REO status ring address */
+ .hal_reo_status_ring_base = 0x00000aa0,
+
+ /* WBM idle link ring address */
+ .hal_wbm_idle_ring_base_lsb = 0x00000d3c,
+ .hal_wbm_idle_ring_misc_addr = 0x00000d4c,
+ .hal_wbm_r0_idle_list_cntl_addr = 0x00000240,
+ .hal_wbm_r0_idle_list_size_addr = 0x00000244,
+ .hal_wbm_scattered_ring_base_lsb = 0x00000250,
+ .hal_wbm_scattered_ring_base_msb = 0x00000254,
+ .hal_wbm_scattered_desc_head_info_ix0 = 0x00000260,
+ .hal_wbm_scattered_desc_head_info_ix1 = 0x00000264,
+ .hal_wbm_scattered_desc_tail_info_ix0 = 0x00000270,
+ .hal_wbm_scattered_desc_tail_info_ix1 = 0x00000274,
+ .hal_wbm_scattered_desc_ptr_hp_addr = 0x0000027c,
+
+ /* SW2WBM release ring address */
+ .hal_wbm_sw_release_ring_base_lsb = 0x0000037c,
+
+ /* WBM2SW release ring address */
+ .hal_wbm0_release_ring_base_lsb = 0x00000e08,
+ .hal_wbm1_release_ring_base_lsb = 0x00000e80,
+
+ /* PPE release ring address */
+ .hal_ppe_rel_ring_base = 0x0000046c,
+
+ /* CE address */
+ .hal_umac_ce0_src_reg_base = 0x00740000,
+ .hal_umac_ce0_dest_reg_base = 0x00741000,
+ .hal_umac_ce1_src_reg_base = 0x00742000,
+ .hal_umac_ce1_dest_reg_base = 0x00743000,
+};
+
static const struct ath12k_hw_regs wcn7850_regs = {
/* SW2TCL(x) R0 ring configuration address */
.hal_tcl1_ring_id = 0x00000908,
@@ -883,6 +1218,15 @@ static const struct ath12k_hw_hal_params ath12k_hw_hal_params_wcn7850 = {
HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW4_EN,
};
+static const struct ath12k_hw_hal_params ath12k_hw_hal_params_ipq5332 = {
+ .rx_buf_rbm = HAL_RX_BUF_RBM_SW3_BM,
+ .wbm2sw_cc_enable = HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW0_EN |
+ HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW1_EN |
+ HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW2_EN |
+ HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW3_EN |
+ HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW4_EN,
+};
+
static const struct ath12k_hw_params ath12k_hw_params[] = {
{
.name = "qcn9274 hw1.0",
@@ -1116,6 +1460,77 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.supports_aspm = false,
},
+ {
+ .name = "ipq5332 hw1.0",
+ .hw_rev = ATH12K_HW_IPQ5332_HW10,
+ .fw = {
+ .dir = "IPQ5332/hw1.0",
+ .board_size = 256 * 1024,
+ .cal_offset = 128 * 1024,
+ },
+ .max_radios = 1,
+ .single_pdev_only = false,
+ .qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ5332,
+ .internal_sleep_clock = false,
+
+ .hw_ops = &qcn9274_ops,
+ .regs = &ipq5332_regs,
+ .ring_mask = &ath12k_hw_ring_mask_ipq5332,
+
+ .host_ce_config = ath12k_host_ce_config_ipq5332,
+ .ce_count = 12,
+ .target_ce_config = ath12k_target_ce_config_wlan_ipq5332,
+ .target_ce_count = 12,
+ .svc_to_ce_map = ath12k_target_service_to_ce_map_wlan_ipq5332,
+ .svc_to_ce_map_len = 18,
+
+ .hal_params = &ath12k_hw_hal_params_ipq5332,
+
+ .rxdma1_enable = false,
+ .num_rxdma_per_pdev = 1,
+ .num_rxdma_dst_ring = 0,
+ .rx_mac_buf_ring = false,
+ .vdev_start_delay = false,
+
+ .interface_modes = BIT(NL80211_IFTYPE_STATION) |
+ BIT(NL80211_IFTYPE_AP) |
+ BIT(NL80211_IFTYPE_MESH_POINT),
+ .supports_monitor = false,
+
+ .idle_ps = false,
+ .download_calib = true,
+ .supports_suspend = false,
+ .tcl_ring_retry = true,
+ .reoq_lut_support = false,
+ .supports_shadow_regs = false,
+
+ .num_tcl_banks = 48,
+ .max_tx_ring = 4,
+
+ .wmi_init = &ath12k_wmi_init_qcn9274,
+
+ .hal_ops = &hal_qcn9274_ops,
+
+ .qmi_cnss_feature_bitmap = BIT(CNSS_QDSS_CFG_MISS_V01),
+
+ .rfkill_pin = 0,
+ .rfkill_cfg = 0,
+ .rfkill_on_level = 0,
+
+ .rddm_size = 0,
+
+ .def_num_link = 0,
+ .max_mlo_peer = 256,
+
+ .otp_board_id_register = 0,
+
+ .supports_sta_ps = false,
+
+ .acpi_guid = NULL,
+ .supports_dynamic_smps_6ghz = false,
+ .iova_mask = 0,
+ .supports_aspm = false,
+ },
};
int ath12k_hw_init(struct ath12k_base *ab)
diff --git a/drivers/net/wireless/ath/ath12k/qmi.h b/drivers/net/wireless/ath/ath12k/qmi.h
index 45d7c3fcafdd..7c44ced22c6f 100644
--- a/drivers/net/wireless/ath/ath12k/qmi.h
+++ b/drivers/net/wireless/ath/ath12k/qmi.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef ATH12K_QMI_H
@@ -21,6 +21,7 @@
#define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_WCN7850 0x1
#define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9274 0x07
+#define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ5332 0x2
#define ATH12K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32
#define ATH12K_QMI_RESP_LEN_MAX 8192
#define ATH12K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01 52
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v5 05/13] wifi: ath12k: avoid m3 firmware download in AHB device IPQ5332
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (3 preceding siblings ...)
2025-01-30 4:34 ` [PATCH v5 04/13] wifi: ath12k: add ath12k_hw_params for IPQ5332 Raj Kumar Bhagat
@ 2025-01-30 4:35 ` Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 06/13] wifi: ath12k: Add hw_params to remap CE register space for IPQ5332 Raj Kumar Bhagat
` (7 subsequent siblings)
12 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:35 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Balamurugan S, P Praneesh, Raj Kumar Bhagat
From: Balamurugan S <quic_bselvara@quicinc.com>
Current ath12k devices, QCN9274 and WCN7850, supports m3.bin firmware
download through ath12k driver. The new ath12k AHB based device
IPQ5332 supports m3 firmware download through remoteproc driver.
Hence, add new parameter (fw.m3_loader) in ath12k_hw_params to avoid
m3 firmware download in IPQ5332.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/hw.c | 4 ++++
drivers/net/wireless/ath/ath12k/hw.h | 6 ++++++
drivers/net/wireless/ath/ath12k/qmi.c | 30 ++++++++++++++++-----------
3 files changed, 28 insertions(+), 12 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c
index 86c4ce143169..84f542c02c94 100644
--- a/drivers/net/wireless/ath/ath12k/hw.c
+++ b/drivers/net/wireless/ath/ath12k/hw.c
@@ -1235,6 +1235,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.dir = "QCN9274/hw1.0",
.board_size = 256 * 1024,
.cal_offset = 128 * 1024,
+ .m3_loader = ath12k_m3_fw_loader_driver,
},
.max_radios = 1,
.single_pdev_only = false,
@@ -1312,6 +1313,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.dir = "WCN7850/hw2.0",
.board_size = 256 * 1024,
.cal_offset = 256 * 1024,
+ .m3_loader = ath12k_m3_fw_loader_driver,
},
.max_radios = 1,
@@ -1391,6 +1393,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.dir = "QCN9274/hw2.0",
.board_size = 256 * 1024,
.cal_offset = 128 * 1024,
+ .m3_loader = ath12k_m3_fw_loader_driver,
},
.max_radios = 2,
.single_pdev_only = false,
@@ -1467,6 +1470,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.dir = "IPQ5332/hw1.0",
.board_size = 256 * 1024,
.cal_offset = 128 * 1024,
+ .m3_loader = ath12k_m3_fw_loader_remoteproc,
},
.max_radios = 1,
.single_pdev_only = false,
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index acb81b5798ac..fbe1aec475ce 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -146,6 +146,11 @@ struct ath12k_hw_hal_params {
u32 wbm2sw_cc_enable;
};
+enum ath12k_m3_fw_loaders {
+ ath12k_m3_fw_loader_driver,
+ ath12k_m3_fw_loader_remoteproc,
+};
+
struct ath12k_hw_params {
const char *name;
u16 hw_rev;
@@ -154,6 +159,7 @@ struct ath12k_hw_params {
const char *dir;
size_t board_size;
size_t cal_offset;
+ enum ath12k_m3_fw_loaders m3_loader;
} fw;
u8 max_radios;
diff --git a/drivers/net/wireless/ath/ath12k/qmi.c b/drivers/net/wireless/ath/ath12k/qmi.c
index 5c3563383fab..3d1f5309c962 100644
--- a/drivers/net/wireless/ath/ath12k/qmi.c
+++ b/drivers/net/wireless/ath/ath12k/qmi.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/elf.h>
@@ -2169,10 +2169,12 @@ int ath12k_qmi_host_cap_send(struct ath12k_base *ab)
req.bdf_support_valid = 1;
req.bdf_support = 1;
- req.m3_support_valid = 1;
- req.m3_support = 1;
- req.m3_cache_support_valid = 1;
- req.m3_cache_support = 1;
+ if (ab->hw_params->fw.m3_loader == ath12k_m3_fw_loader_driver) {
+ req.m3_support_valid = 1;
+ req.m3_support = 1;
+ req.m3_cache_support_valid = 1;
+ req.m3_cache_support = 1;
+ }
req.cal_done_valid = 1;
req.cal_done = ab->qmi.cal_done;
@@ -2936,6 +2938,9 @@ static void ath12k_qmi_m3_free(struct ath12k_base *ab)
{
struct m3_mem_region *m3_mem = &ab->qmi.m3_mem;
+ if (ab->hw_params->fw.m3_loader == ath12k_m3_fw_loader_remoteproc)
+ return;
+
if (!m3_mem->vaddr)
return;
@@ -3016,15 +3021,16 @@ int ath12k_qmi_wlanfw_m3_info_send(struct ath12k_base *ab)
struct qmi_txn txn;
int ret = 0;
- ret = ath12k_qmi_m3_load(ab);
- if (ret) {
- ath12k_err(ab, "failed to load m3 firmware: %d", ret);
- return ret;
+ if (ab->hw_params->fw.m3_loader == ath12k_m3_fw_loader_driver) {
+ ret = ath12k_qmi_m3_load(ab);
+ if (ret) {
+ ath12k_err(ab, "failed to load m3 firmware: %d", ret);
+ return ret;
+ }
+ req.addr = m3_mem->paddr;
+ req.size = m3_mem->size;
}
- req.addr = m3_mem->paddr;
- req.size = m3_mem->size;
-
ret = qmi_txn_init(&ab->qmi.handle, &txn,
qmi_wlanfw_m3_info_resp_msg_v01_ei, &resp);
if (ret < 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v5 06/13] wifi: ath12k: Add hw_params to remap CE register space for IPQ5332
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (4 preceding siblings ...)
2025-01-30 4:35 ` [PATCH v5 05/13] wifi: ath12k: avoid m3 firmware download in AHB device IPQ5332 Raj Kumar Bhagat
@ 2025-01-30 4:35 ` Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 07/13] wifi: ath12k: add support for fixed QMI firmware memory Raj Kumar Bhagat
` (6 subsequent siblings)
12 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:35 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Balamurugan S, P Praneesh, Raj Kumar Bhagat
From: Balamurugan S <quic_bselvara@quicinc.com>
For IPQ5332 CE register space is moved out of WCSS region and the
space is not contiguous. Hence, add hardware params (ce_ie_addr &
ce_remap) for IPQ5332. These parameters would be used by Ath12k
AHB driver (in subsequent patches) to remap the CE registers to a
new space for accessing them.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ce.h | 11 ++++++++
drivers/net/wireless/ath/ath12k/core.h | 4 +++
drivers/net/wireless/ath/ath12k/hal.h | 4 +++
drivers/net/wireless/ath/ath12k/hw.c | 35 +++++++++++++++++++++++---
drivers/net/wireless/ath/ath12k/hw.h | 3 +++
5 files changed, 53 insertions(+), 4 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/ce.h b/drivers/net/wireless/ath/ath12k/ce.h
index 8007a94cec5d..57f75899ee03 100644
--- a/drivers/net/wireless/ath/ath12k/ce.h
+++ b/drivers/net/wireless/ath/ath12k/ce.h
@@ -76,6 +76,17 @@ struct ce_pipe_config {
__le32 reserved;
};
+struct ce_ie_addr {
+ u32 ie1_reg_addr;
+ u32 ie2_reg_addr;
+ u32 ie3_reg_addr;
+};
+
+struct ce_remap {
+ u32 base;
+ u32 size;
+};
+
struct ce_attr {
/* CE_ATTR_* values */
unsigned int flags;
diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h
index 353dce22682a..22ade838b99f 100644
--- a/drivers/net/wireless/ath/ath12k/core.h
+++ b/drivers/net/wireless/ath/ath12k/core.h
@@ -912,6 +912,10 @@ struct ath12k_base {
void __iomem *mem;
unsigned long mem_len;
+ void __iomem *mem_ce;
+ u32 ce_remap_base_addr;
+ bool ce_remap;
+
struct {
enum ath12k_bus bus;
const struct ath12k_hif_ops *ops;
diff --git a/drivers/net/wireless/ath/ath12k/hal.h b/drivers/net/wireless/ath/ath12k/hal.h
index 1ce97f9a92ac..47ff0b1bfdf4 100644
--- a/drivers/net/wireless/ath/ath12k/hal.h
+++ b/drivers/net/wireless/ath/ath12k/hal.h
@@ -11,6 +11,7 @@
#include "rx_desc.h"
struct ath12k_base;
+#define HAL_CE_REMAP_REG_BASE (ab->ce_remap_base_addr)
#define HAL_LINK_DESC_SIZE (32 << 2)
#define HAL_LINK_DESC_ALIGN 128
@@ -372,6 +373,9 @@ struct ath12k_base;
* ath12k_hal_rx_desc_get_err().
*/
+#define HAL_IPQ5332_CE_WFSS_REG_BASE 0x740000
+#define HAL_IPQ5332_CE_SIZE 0x100000
+
enum hal_srng_ring_id {
HAL_SRNG_RING_ID_REO2SW0 = 0,
HAL_SRNG_RING_ID_REO2SW1,
diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c
index 84f542c02c94..91aecca566a4 100644
--- a/drivers/net/wireless/ath/ath12k/hw.c
+++ b/drivers/net/wireless/ath/ath12k/hw.c
@@ -1110,10 +1110,14 @@ static const struct ath12k_hw_regs ipq5332_regs = {
.hal_ppe_rel_ring_base = 0x0000046c,
/* CE address */
- .hal_umac_ce0_src_reg_base = 0x00740000,
- .hal_umac_ce0_dest_reg_base = 0x00741000,
- .hal_umac_ce1_src_reg_base = 0x00742000,
- .hal_umac_ce1_dest_reg_base = 0x00743000,
+ .hal_umac_ce0_src_reg_base = 0x00740000 -
+ HAL_IPQ5332_CE_WFSS_REG_BASE,
+ .hal_umac_ce0_dest_reg_base = 0x00741000 -
+ HAL_IPQ5332_CE_WFSS_REG_BASE,
+ .hal_umac_ce1_src_reg_base = 0x00742000 -
+ HAL_IPQ5332_CE_WFSS_REG_BASE,
+ .hal_umac_ce1_dest_reg_base = 0x00743000 -
+ HAL_IPQ5332_CE_WFSS_REG_BASE,
};
static const struct ath12k_hw_regs wcn7850_regs = {
@@ -1227,6 +1231,17 @@ static const struct ath12k_hw_hal_params ath12k_hw_hal_params_ipq5332 = {
HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW4_EN,
};
+static const struct ce_ie_addr ath12k_ce_ie_addr_ipq5332 = {
+ .ie1_reg_addr = CE_HOST_IE_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
+ .ie2_reg_addr = CE_HOST_IE_2_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
+ .ie3_reg_addr = CE_HOST_IE_3_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
+};
+
+static const struct ce_remap ath12k_ce_remap_ipq5332 = {
+ .base = HAL_IPQ5332_CE_WFSS_REG_BASE,
+ .size = HAL_IPQ5332_CE_SIZE,
+};
+
static const struct ath12k_hw_params ath12k_hw_params[] = {
{
.name = "qcn9274 hw1.0",
@@ -1304,6 +1319,9 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.iova_mask = 0,
.supports_aspm = false,
+
+ .ce_ie_addr = NULL,
+ .ce_remap = NULL,
},
{
.name = "wcn7850 hw2.0",
@@ -1385,6 +1403,9 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.iova_mask = ATH12K_PCIE_MAX_PAYLOAD_SIZE - 1,
.supports_aspm = true,
+
+ .ce_ie_addr = NULL,
+ .ce_remap = NULL,
},
{
.name = "qcn9274 hw2.0",
@@ -1462,6 +1483,9 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.iova_mask = 0,
.supports_aspm = false,
+
+ .ce_ie_addr = NULL,
+ .ce_remap = NULL,
},
{
.name = "ipq5332 hw1.0",
@@ -1534,6 +1558,9 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.supports_dynamic_smps_6ghz = false,
.iova_mask = 0,
.supports_aspm = false,
+
+ .ce_ie_addr = &ath12k_ce_ie_addr_ipq5332,
+ .ce_remap = &ath12k_ce_remap_ipq5332,
},
};
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index fbe1aec475ce..6a75af093f31 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -226,6 +226,9 @@ struct ath12k_hw_params {
bool supports_dynamic_smps_6ghz;
u32 iova_mask;
+
+ const struct ce_ie_addr *ce_ie_addr;
+ const struct ce_remap *ce_remap;
};
struct ath12k_hw_ops {
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v5 07/13] wifi: ath12k: add support for fixed QMI firmware memory
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (5 preceding siblings ...)
2025-01-30 4:35 ` [PATCH v5 06/13] wifi: ath12k: Add hw_params to remap CE register space for IPQ5332 Raj Kumar Bhagat
@ 2025-01-30 4:35 ` Raj Kumar Bhagat
2025-01-30 7:46 ` Krzysztof Kozlowski
2025-01-30 4:35 ` [PATCH v5 08/13] wifi: ath12k: add AHB driver support for IPQ5332 Raj Kumar Bhagat
` (5 subsequent siblings)
12 siblings, 1 reply; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:35 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Raj Kumar Bhagat
IPQ5332 firmware supports only fixed QMI firmware memory.
Hence, add support to read reserved fixed memory region from
device-tree and provide the reserved memory segments for
firmware to use during QMI firmware memory request.
Note that the ability to set the fixed memory will be introduced in
a subsequent patch. Currently, the flag remains unset by default,
ensuring that existing chipsets are unaffected.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/core.c | 24 ++++
drivers/net/wireless/ath/ath12k/core.h | 3 +
drivers/net/wireless/ath/ath12k/hw.c | 4 +
drivers/net/wireless/ath/ath12k/hw.h | 1 +
drivers/net/wireless/ath/ath12k/qmi.c | 188 ++++++++++++++++++++++---
5 files changed, 204 insertions(+), 16 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/core.c b/drivers/net/wireless/ath/ath12k/core.c
index 60c077b016b4..cbe4d6274768 100644
--- a/drivers/net/wireless/ath/ath12k/core.c
+++ b/drivers/net/wireless/ath/ath12k/core.c
@@ -609,6 +609,30 @@ u32 ath12k_core_get_max_num_tids(struct ath12k_base *ab)
return TARGET_NUM_TIDS(SINGLE);
}
+struct device_node *ath12k_core_get_reserved_mem_by_name(struct ath12k_base *ab,
+ const char *name)
+{
+ struct device *dev = ab->dev;
+ struct device_node *mem_np;
+ int index;
+
+ index = of_property_match_string(dev->of_node, "memory-region-names", name);
+ if (index < 0) {
+ ath12k_dbg(ab, ATH12K_DBG_BOOT,
+ "memory region %s not found\n", name);
+ return NULL;
+ }
+
+ mem_np = of_parse_phandle(dev->of_node, "memory-region", index);
+ if (!mem_np) {
+ ath12k_dbg(ab, ATH12K_DBG_BOOT,
+ "failed to parse memory region %s\n", name);
+ return NULL;
+ }
+
+ return mem_np;
+}
+
static void ath12k_core_stop(struct ath12k_base *ab)
{
ath12k_core_stopped(ab);
diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h
index 22ade838b99f..fa2eadd60c44 100644
--- a/drivers/net/wireless/ath/ath12k/core.h
+++ b/drivers/net/wireless/ath/ath12k/core.h
@@ -239,6 +239,7 @@ enum ath12k_dev_flags {
ATH12K_FLAG_EXT_IRQ_ENABLED,
ATH12K_FLAG_QMI_FW_READY_COMPLETE,
ATH12K_FLAG_FTM_SEGMENTED,
+ ATH12K_FLAG_FIXED_MEM_REGION,
};
struct ath12k_tx_conf {
@@ -1203,6 +1204,8 @@ u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab);
u32 ath12k_core_get_max_num_tids(struct ath12k_base *ab);
void ath12k_core_hw_group_set_mlo_capable(struct ath12k_hw_group *ag);
+struct device_node *ath12k_core_get_reserved_mem_by_name(struct ath12k_base *ab,
+ const char *name);
static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state)
{
diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c
index 91aecca566a4..b4d5651973b7 100644
--- a/drivers/net/wireless/ath/ath12k/hw.c
+++ b/drivers/net/wireless/ath/ath12k/hw.c
@@ -1322,6 +1322,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.ce_ie_addr = NULL,
.ce_remap = NULL,
+ .bdf_addr_offset = 0,
},
{
.name = "wcn7850 hw2.0",
@@ -1406,6 +1407,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.ce_ie_addr = NULL,
.ce_remap = NULL,
+ .bdf_addr_offset = 0,
},
{
.name = "qcn9274 hw2.0",
@@ -1486,6 +1488,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.ce_ie_addr = NULL,
.ce_remap = NULL,
+ .bdf_addr_offset = 0,
},
{
.name = "ipq5332 hw1.0",
@@ -1561,6 +1564,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.ce_ie_addr = &ath12k_ce_ie_addr_ipq5332,
.ce_remap = &ath12k_ce_remap_ipq5332,
+ .bdf_addr_offset = 0xC00000,
},
};
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index 6a75af093f31..5123d2f51865 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -229,6 +229,7 @@ struct ath12k_hw_params {
const struct ce_ie_addr *ce_ie_addr;
const struct ce_remap *ce_remap;
+ u32 bdf_addr_offset;
};
struct ath12k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath12k/qmi.c b/drivers/net/wireless/ath/ath12k/qmi.c
index 3d1f5309c962..d75769ae03bb 100644
--- a/drivers/net/wireless/ath/ath12k/qmi.c
+++ b/drivers/net/wireless/ath/ath12k/qmi.c
@@ -11,6 +11,8 @@
#include "debug.h"
#include <linux/of.h>
#include <linux/firmware.h>
+#include <linux/of_address.h>
+#include <linux/ioport.h>
#define SLEEP_CLOCK_SELECT_INTERNAL_BIT 0x02
#define HOST_CSTATE_BIT 0x04
@@ -2384,7 +2386,8 @@ int ath12k_qmi_respond_fw_mem_request(struct ath12k_base *ab)
* failure to firmware and firmware then request multiple blocks of
* small chunk size memory.
*/
- if (ab->qmi.target_mem_delayed) {
+ if (!test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags) &&
+ ab->qmi.target_mem_delayed) {
delayed = true;
ath12k_dbg(ab, ATH12K_DBG_QMI, "qmi delays mem_request %d\n",
ab->qmi.mem_seg_count);
@@ -2448,6 +2451,7 @@ static void ath12k_qmi_free_mlo_mem_chunk(struct ath12k_base *ab,
{
struct ath12k_hw_group *ag = ab->ag;
struct target_mem_chunk *mlo_chunk;
+ bool fixed_mem;
lockdep_assert_held(&ag->mutex);
@@ -2459,8 +2463,13 @@ static void ath12k_qmi_free_mlo_mem_chunk(struct ath12k_base *ab,
return;
}
+ fixed_mem = test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags);
mlo_chunk = &ag->mlo_mem.chunk[idx];
- if (mlo_chunk->v.addr) {
+
+ if (fixed_mem && mlo_chunk->v.ioaddr) {
+ iounmap(mlo_chunk->v.ioaddr);
+ mlo_chunk->v.ioaddr = NULL;
+ } else if (mlo_chunk->v.addr) {
dma_free_coherent(ab->dev,
mlo_chunk->size,
mlo_chunk->v.addr,
@@ -2470,7 +2479,10 @@ static void ath12k_qmi_free_mlo_mem_chunk(struct ath12k_base *ab,
mlo_chunk->paddr = 0;
mlo_chunk->size = 0;
- chunk->v.addr = NULL;
+ if (fixed_mem)
+ chunk->v.ioaddr = NULL;
+ else
+ chunk->v.addr = NULL;
chunk->paddr = 0;
chunk->size = 0;
}
@@ -2481,19 +2493,24 @@ static void ath12k_qmi_free_target_mem_chunk(struct ath12k_base *ab)
int i, mlo_idx;
for (i = 0, mlo_idx = 0; i < ab->qmi.mem_seg_count; i++) {
- if (!ab->qmi.target_mem[i].v.addr)
- continue;
-
if (ab->qmi.target_mem[i].type == MLO_GLOBAL_MEM_REGION_TYPE) {
ath12k_qmi_free_mlo_mem_chunk(ab,
&ab->qmi.target_mem[i],
mlo_idx++);
} else {
- dma_free_coherent(ab->dev,
- ab->qmi.target_mem[i].prev_size,
- ab->qmi.target_mem[i].v.addr,
- ab->qmi.target_mem[i].paddr);
- ab->qmi.target_mem[i].v.addr = NULL;
+ if (test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags) &&
+ ab->qmi.target_mem[i].v.ioaddr) {
+ iounmap(ab->qmi.target_mem[i].v.ioaddr);
+ ab->qmi.target_mem[i].v.ioaddr = NULL;
+ } else {
+ if (!ab->qmi.target_mem[i].v.addr)
+ continue;
+ dma_free_coherent(ab->dev,
+ ab->qmi.target_mem[i].prev_size,
+ ab->qmi.target_mem[i].v.addr,
+ ab->qmi.target_mem[i].paddr);
+ ab->qmi.target_mem[i].v.addr = NULL;
+ }
}
}
@@ -2646,6 +2663,136 @@ static int ath12k_qmi_alloc_target_mem_chunk(struct ath12k_base *ab)
return ret;
}
+static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab)
+{
+ struct device_node *mem_node;
+ struct resource res, m3_res;
+ u32 bdf_start_addr;
+ int i, idx, ret;
+
+ for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) {
+ switch (ab->qmi.target_mem[i].type) {
+ case HOST_DDR_REGION_TYPE:
+ mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
+ if (!mem_node || of_address_to_resource(mem_node, 0, &res)) {
+ ath12k_dbg(ab, ATH12K_DBG_QMI,
+ "q6-region is not defined in device-tree\n");
+ ret = -ENODEV;
+ goto out;
+ }
+ of_node_put(mem_node);
+
+ if (res.end - res.start + 1 < ab->qmi.target_mem[i].size) {
+ ath12k_dbg(ab, ATH12K_DBG_QMI,
+ "failed to assign mem type %d req size %d avail size %lld\n",
+ ab->qmi.target_mem[i].type,
+ ab->qmi.target_mem[i].size,
+ (res.end - res.start + 1));
+ ret = -EINVAL;
+ goto out;
+ }
+
+ ab->qmi.target_mem[idx].paddr = res.start;
+ ab->qmi.target_mem[idx].v.ioaddr =
+ ioremap(ab->qmi.target_mem[idx].paddr,
+ ab->qmi.target_mem[i].size);
+ if (!ab->qmi.target_mem[idx].v.ioaddr) {
+ ret = -EIO;
+ goto out;
+ }
+ ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size;
+ ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type;
+ idx++;
+ break;
+ case BDF_MEM_REGION_TYPE:
+ mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
+ if (!mem_node || of_address_to_resource(mem_node, 0, &res)) {
+ ath12k_dbg(ab, ATH12K_DBG_QMI,
+ "q6-region is not defined to calculate BDF mem in DT\n");
+ ret = -ENODEV;
+ goto out;
+ }
+ of_node_put(mem_node);
+
+ bdf_start_addr = res.start + ab->hw_params->bdf_addr_offset;
+ if (res.end - bdf_start_addr + 1 < ab->qmi.target_mem[i].size) {
+ ath12k_dbg(ab, ATH12K_DBG_QMI,
+ "failed to assign mem type %d req size %d avail size %lld\n",
+ ab->qmi.target_mem[i].type,
+ ab->qmi.target_mem[i].size,
+ (res.end - bdf_start_addr + 1));
+ ret = -EINVAL;
+ goto out;
+ }
+ ab->qmi.target_mem[idx].paddr = bdf_start_addr;
+ ab->qmi.target_mem[idx].v.ioaddr =
+ ioremap(ab->qmi.target_mem[idx].paddr,
+ ab->qmi.target_mem[i].size);
+ if (!ab->qmi.target_mem[idx].v.ioaddr) {
+ ret = -EIO;
+ goto out;
+ }
+ ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size;
+ ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type;
+ idx++;
+ break;
+ case CALDB_MEM_REGION_TYPE:
+ /* Cold boot calibration is not enabled in Ath12k. Hence,
+ * assign paddr = 0.
+ * Once cold boot calibration is enabled add support to
+ * assign reserved memory from DT.
+ */
+ ab->qmi.target_mem[idx].paddr = 0;
+ ab->qmi.target_mem[idx].v.ioaddr = NULL;
+ ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size;
+ ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type;
+ idx++;
+ break;
+ case M3_DUMP_REGION_TYPE:
+ mem_node = ath12k_core_get_reserved_mem_by_name(ab, "m3-dump");
+ if (!mem_node || of_address_to_resource(mem_node, 0, &m3_res)) {
+ ath12k_err(ab, "m3_dump not defined in device-tree\n");
+ ret = -EINVAL;
+ goto out;
+ }
+ of_node_put(mem_node);
+
+ if (m3_res.end - m3_res.start + 1 < ab->qmi.target_mem[i].size) {
+ ath12k_dbg(ab, ATH12K_DBG_QMI,
+ "failed to assign mem type %d req size %d avail size %lld\n",
+ ab->qmi.target_mem[i].type,
+ ab->qmi.target_mem[i].size,
+ (m3_res.end - m3_res.start + 1));
+ ret = -EINVAL;
+ goto out;
+ }
+
+ ab->qmi.target_mem[idx].paddr = m3_res.start;
+ ab->qmi.target_mem[idx].v.ioaddr =
+ ioremap(ab->qmi.target_mem[idx].paddr,
+ ab->qmi.target_mem[i].size);
+ if (!ab->qmi.target_mem[idx].v.ioaddr) {
+ ret = -EIO;
+ goto out;
+ }
+ ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size;
+ ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type;
+ idx++;
+ break;
+ default:
+ ath12k_warn(ab, "qmi ignore invalid mem req type %d\n",
+ ab->qmi.target_mem[i].type);
+ break;
+ }
+ }
+ ab->qmi.mem_seg_count = idx;
+
+ return 0;
+out:
+ ath12k_qmi_free_target_mem_chunk(ab);
+ return ret;
+}
+
/* clang stack usage explodes if this is inlined */
static noinline_for_stack
int ath12k_qmi_request_target_cap(struct ath12k_base *ab)
@@ -3480,11 +3627,20 @@ static void ath12k_qmi_msg_mem_request_cb(struct qmi_handle *qmi_hdl,
msg->mem_seg[i].type, msg->mem_seg[i].size);
}
- ret = ath12k_qmi_alloc_target_mem_chunk(ab);
- if (ret) {
- ath12k_warn(ab, "qmi failed to alloc target memory: %d\n",
- ret);
- return;
+ if (test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags)) {
+ ret = ath12k_qmi_assign_target_mem_chunk(ab);
+ if (ret) {
+ ath12k_warn(ab, "failed to assign qmi target memory: %d\n",
+ ret);
+ return;
+ }
+ } else {
+ ret = ath12k_qmi_alloc_target_mem_chunk(ab);
+ if (ret) {
+ ath12k_warn(ab, "qmi failed to alloc target memory: %d\n",
+ ret);
+ return;
+ }
}
ath12k_qmi_driver_event_post(qmi, ATH12K_QMI_EVENT_REQUEST_MEM, NULL);
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v5 08/13] wifi: ath12k: add AHB driver support for IPQ5332
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (6 preceding siblings ...)
2025-01-30 4:35 ` [PATCH v5 07/13] wifi: ath12k: add support for fixed QMI firmware memory Raj Kumar Bhagat
@ 2025-01-30 4:35 ` Raj Kumar Bhagat
2025-01-30 7:57 ` Krzysztof Kozlowski
2025-01-30 4:35 ` [PATCH v5 09/13] wifi: ath12k: Power up root PD Raj Kumar Bhagat
` (4 subsequent siblings)
12 siblings, 1 reply; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:35 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Balamurugan S, P Praneesh, Raj Kumar Bhagat
From: Balamurugan S <quic_bselvara@quicinc.com>
Add Initial Ath12k AHB driver support for IPQ5332. IPQ5332 is AHB
based IEEE802.11be 2 GHz 2x2 WiFi device.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Co-developed-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ahb.c | 867 +++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/ahb.h | 37 ++
drivers/net/wireless/ath/ath12k/core.h | 4 +
drivers/net/wireless/ath/ath12k/hal.h | 1 +
drivers/net/wireless/ath/ath12k/hw.h | 1 +
5 files changed, 910 insertions(+)
create mode 100644 drivers/net/wireless/ath/ath12k/ahb.c
create mode 100644 drivers/net/wireless/ath/ath12k/ahb.h
diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c
new file mode 100644
index 000000000000..f4c15e0451bd
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/ahb.c
@@ -0,0 +1,867 @@
+// SPDX-License-Identifier: BSD-3-Clause-Clear
+/*
+ * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <linux/dma-mapping.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include "ahb.h"
+#include "debug.h"
+#include "hif.h"
+
+static const struct of_device_id ath12k_ahb_of_match[] = {
+ { .compatible = "qcom,ipq5332-wifi",
+ .data = (void *)ATH12K_HW_IPQ5332_HW10,
+ },
+ { }
+};
+
+MODULE_DEVICE_TABLE(of, ath12k_ahb_of_match);
+
+#define ATH12K_IRQ_CE0_OFFSET 4
+
+static const char *irq_name[ATH12K_IRQ_NUM_MAX] = {
+ "misc-pulse1",
+ "misc-latch",
+ "sw-exception",
+ "watchdog",
+ "ce0",
+ "ce1",
+ "ce2",
+ "ce3",
+ "ce4",
+ "ce5",
+ "ce6",
+ "ce7",
+ "ce8",
+ "ce9",
+ "ce10",
+ "ce11",
+ "host2wbm-desc-feed",
+ "host2reo-re-injection",
+ "host2reo-command",
+ "host2rxdma-monitor-ring3",
+ "host2rxdma-monitor-ring2",
+ "host2rxdma-monitor-ring1",
+ "reo2ost-exception",
+ "wbm2host-rx-release",
+ "reo2host-status",
+ "reo2host-destination-ring4",
+ "reo2host-destination-ring3",
+ "reo2host-destination-ring2",
+ "reo2host-destination-ring1",
+ "rxdma2host-monitor-destination-mac3",
+ "rxdma2host-monitor-destination-mac2",
+ "rxdma2host-monitor-destination-mac1",
+ "ppdu-end-interrupts-mac3",
+ "ppdu-end-interrupts-mac2",
+ "ppdu-end-interrupts-mac1",
+ "rxdma2host-monitor-status-ring-mac3",
+ "rxdma2host-monitor-status-ring-mac2",
+ "rxdma2host-monitor-status-ring-mac1",
+ "host2rxdma-host-buf-ring-mac3",
+ "host2rxdma-host-buf-ring-mac2",
+ "host2rxdma-host-buf-ring-mac1",
+ "rxdma2host-destination-ring-mac3",
+ "rxdma2host-destination-ring-mac2",
+ "rxdma2host-destination-ring-mac1",
+ "host2tcl-input-ring4",
+ "host2tcl-input-ring3",
+ "host2tcl-input-ring2",
+ "host2tcl-input-ring1",
+ "wbm2host-tx-completions-ring4",
+ "wbm2host-tx-completions-ring3",
+ "wbm2host-tx-completions-ring2",
+ "wbm2host-tx-completions-ring1",
+ "tcl2host-status-ring",
+};
+
+enum ext_irq_num {
+ host2wbm_desc_feed = 16,
+ host2reo_re_injection,
+ host2reo_command,
+ host2rxdma_monitor_ring3,
+ host2rxdma_monitor_ring2,
+ host2rxdma_monitor_ring1,
+ reo2host_exception,
+ wbm2host_rx_release,
+ reo2host_status,
+ reo2host_destination_ring4,
+ reo2host_destination_ring3,
+ reo2host_destination_ring2,
+ reo2host_destination_ring1,
+ rxdma2host_monitor_destination_mac3,
+ rxdma2host_monitor_destination_mac2,
+ rxdma2host_monitor_destination_mac1,
+ ppdu_end_interrupts_mac3,
+ ppdu_end_interrupts_mac2,
+ ppdu_end_interrupts_mac1,
+ rxdma2host_monitor_status_ring_mac3,
+ rxdma2host_monitor_status_ring_mac2,
+ rxdma2host_monitor_status_ring_mac1,
+ host2rxdma_host_buf_ring_mac3,
+ host2rxdma_host_buf_ring_mac2,
+ host2rxdma_host_buf_ring_mac1,
+ rxdma2host_destination_ring_mac3,
+ rxdma2host_destination_ring_mac2,
+ rxdma2host_destination_ring_mac1,
+ host2tcl_input_ring4,
+ host2tcl_input_ring3,
+ host2tcl_input_ring2,
+ host2tcl_input_ring1,
+ wbm2host_tx_completions_ring4,
+ wbm2host_tx_completions_ring3,
+ wbm2host_tx_completions_ring2,
+ wbm2host_tx_completions_ring1,
+ tcl2host_status_ring,
+};
+
+static u32 ath12k_ahb_read32(struct ath12k_base *ab, u32 offset)
+{
+ if (ab->ce_remap && offset < HAL_SEQ_WCSS_CMEM_OFFSET)
+ return ioread32(ab->mem_ce + offset);
+ return ioread32(ab->mem + offset);
+}
+
+static void ath12k_ahb_write32(struct ath12k_base *ab, u32 offset,
+ u32 value)
+{
+ if (ab->ce_remap && offset < HAL_SEQ_WCSS_CMEM_OFFSET)
+ iowrite32(value, ab->mem_ce + offset);
+ else
+ iowrite32(value, ab->mem + offset);
+}
+
+static void ath12k_ahb_cancel_workqueue(struct ath12k_base *ab)
+{
+ int i;
+
+ for (i = 0; i < ab->hw_params->ce_count; i++) {
+ struct ath12k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i];
+
+ if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
+ continue;
+
+ cancel_work_sync(&ce_pipe->intr_wq);
+ }
+}
+
+static void ath12k_ahb_ext_grp_disable(struct ath12k_ext_irq_grp *irq_grp)
+{
+ int i;
+
+ for (i = 0; i < irq_grp->num_irq; i++)
+ disable_irq_nosync(irq_grp->ab->irq_num[irq_grp->irqs[i]]);
+}
+
+static void __ath12k_ahb_ext_irq_disable(struct ath12k_base *ab)
+{
+ int i;
+
+ for (i = 0; i < ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) {
+ struct ath12k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];
+
+ ath12k_ahb_ext_grp_disable(irq_grp);
+ if (irq_grp->napi_enabled) {
+ napi_synchronize(&irq_grp->napi);
+ napi_disable(&irq_grp->napi);
+ irq_grp->napi_enabled = false;
+ }
+ }
+}
+
+static void ath12k_ahb_ext_grp_enable(struct ath12k_ext_irq_grp *irq_grp)
+{
+ int i;
+
+ for (i = 0; i < irq_grp->num_irq; i++)
+ enable_irq(irq_grp->ab->irq_num[irq_grp->irqs[i]]);
+}
+
+static void ath12k_ahb_setbit32(struct ath12k_base *ab, u8 bit, u32 offset)
+{
+ u32 val;
+
+ val = ath12k_ahb_read32(ab, offset);
+ ath12k_ahb_write32(ab, offset, val | BIT(bit));
+}
+
+static void ath12k_ahb_clearbit32(struct ath12k_base *ab, u8 bit, u32 offset)
+{
+ u32 val;
+
+ val = ath12k_ahb_read32(ab, offset);
+ ath12k_ahb_write32(ab, offset, val & ~BIT(bit));
+}
+
+static void ath12k_ahb_ce_irq_enable(struct ath12k_base *ab, u16 ce_id)
+{
+ const struct ce_attr *ce_attr;
+ const struct ce_ie_addr *ce_ie_addr = ab->hw_params->ce_ie_addr;
+ u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
+
+ ie1_reg_addr = ce_ie_addr->ie1_reg_addr;
+ ie2_reg_addr = ce_ie_addr->ie2_reg_addr;
+ ie3_reg_addr = ce_ie_addr->ie3_reg_addr;
+
+ ce_attr = &ab->hw_params->host_ce_config[ce_id];
+ if (ce_attr->src_nentries)
+ ath12k_ahb_setbit32(ab, ce_id, ie1_reg_addr);
+
+ if (ce_attr->dest_nentries) {
+ ath12k_ahb_setbit32(ab, ce_id, ie2_reg_addr);
+ ath12k_ahb_setbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,
+ ie3_reg_addr);
+ }
+}
+
+static void ath12k_ahb_ce_irq_disable(struct ath12k_base *ab, u16 ce_id)
+{
+ const struct ce_attr *ce_attr;
+ const struct ce_ie_addr *ce_ie_addr = ab->hw_params->ce_ie_addr;
+ u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
+
+ ie1_reg_addr = ce_ie_addr->ie1_reg_addr;
+ ie2_reg_addr = ce_ie_addr->ie2_reg_addr;
+ ie3_reg_addr = ce_ie_addr->ie3_reg_addr;
+
+ ce_attr = &ab->hw_params->host_ce_config[ce_id];
+ if (ce_attr->src_nentries)
+ ath12k_ahb_clearbit32(ab, ce_id, ie1_reg_addr);
+
+ if (ce_attr->dest_nentries) {
+ ath12k_ahb_clearbit32(ab, ce_id, ie2_reg_addr);
+ ath12k_ahb_clearbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,
+ ie3_reg_addr);
+ }
+}
+
+static void ath12k_ahb_sync_ce_irqs(struct ath12k_base *ab)
+{
+ int i;
+ int irq_idx;
+
+ for (i = 0; i < ab->hw_params->ce_count; i++) {
+ if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
+ continue;
+
+ irq_idx = ATH12K_IRQ_CE0_OFFSET + i;
+ synchronize_irq(ab->irq_num[irq_idx]);
+ }
+}
+
+static void ath12k_ahb_sync_ext_irqs(struct ath12k_base *ab)
+{
+ int i, j;
+ int irq_idx;
+
+ for (i = 0; i < ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) {
+ struct ath12k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];
+
+ for (j = 0; j < irq_grp->num_irq; j++) {
+ irq_idx = irq_grp->irqs[j];
+ synchronize_irq(ab->irq_num[irq_idx]);
+ }
+ }
+}
+
+static void ath12k_ahb_ce_irqs_enable(struct ath12k_base *ab)
+{
+ int i;
+
+ for (i = 0; i < ab->hw_params->ce_count; i++) {
+ if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
+ continue;
+ ath12k_ahb_ce_irq_enable(ab, i);
+ }
+}
+
+static void ath12k_ahb_ce_irqs_disable(struct ath12k_base *ab)
+{
+ int i;
+
+ for (i = 0; i < ab->hw_params->ce_count; i++) {
+ if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
+ continue;
+ ath12k_ahb_ce_irq_disable(ab, i);
+ }
+}
+
+static int ath12k_ahb_start(struct ath12k_base *ab)
+{
+ ath12k_ahb_ce_irqs_enable(ab);
+ ath12k_ce_rx_post_buf(ab);
+
+ return 0;
+}
+
+static void ath12k_ahb_ext_irq_enable(struct ath12k_base *ab)
+{
+ struct ath12k_ext_irq_grp *irq_grp;
+ int i;
+
+ for (i = 0; i < ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) {
+ irq_grp = &ab->ext_irq_grp[i];
+ if (!irq_grp->napi_enabled) {
+ napi_enable(&irq_grp->napi);
+ irq_grp->napi_enabled = true;
+ }
+ ath12k_ahb_ext_grp_enable(irq_grp);
+ }
+}
+
+static void ath12k_ahb_ext_irq_disable(struct ath12k_base *ab)
+{
+ __ath12k_ahb_ext_irq_disable(ab);
+ ath12k_ahb_sync_ext_irqs(ab);
+}
+
+static void ath12k_ahb_stop(struct ath12k_base *ab)
+{
+ if (!test_bit(ATH12K_FLAG_CRASH_FLUSH, &ab->dev_flags))
+ ath12k_ahb_ce_irqs_disable(ab);
+ ath12k_ahb_sync_ce_irqs(ab);
+ ath12k_ahb_cancel_workqueue(ab);
+ del_timer_sync(&ab->rx_replenish_retry);
+ ath12k_ce_cleanup_pipes(ab);
+}
+
+static void ath12k_ahb_init_qmi_ce_config(struct ath12k_base *ab)
+{
+ struct ath12k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
+
+ cfg->tgt_ce_len = ab->hw_params->target_ce_count;
+ cfg->tgt_ce = ab->hw_params->target_ce_config;
+ cfg->svc_to_ce_map_len = ab->hw_params->svc_to_ce_map_len;
+ cfg->svc_to_ce_map = ab->hw_params->svc_to_ce_map;
+ ab->qmi.service_ins_id = ab->hw_params->qmi_service_ins_id;
+}
+
+static void ath12k_ahb_ce_workqueue(struct work_struct *work)
+{
+ struct ath12k_ce_pipe *ce_pipe = from_work(ce_pipe, work, intr_wq);
+
+ ath12k_ce_per_engine_service(ce_pipe->ab, ce_pipe->pipe_num);
+
+ ath12k_ahb_ce_irq_enable(ce_pipe->ab, ce_pipe->pipe_num);
+}
+
+static irqreturn_t ath12k_ahb_ce_interrupt_handler(int irq, void *arg)
+{
+ struct ath12k_ce_pipe *ce_pipe = arg;
+
+ /* last interrupt received for this CE */
+ ce_pipe->timestamp = jiffies;
+
+ ath12k_ahb_ce_irq_disable(ce_pipe->ab, ce_pipe->pipe_num);
+
+ queue_work(system_bh_wq, &ce_pipe->intr_wq);
+
+ return IRQ_HANDLED;
+}
+
+static int ath12k_ahb_ext_grp_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct ath12k_ext_irq_grp *irq_grp = container_of(napi,
+ struct ath12k_ext_irq_grp,
+ napi);
+ struct ath12k_base *ab = irq_grp->ab;
+ int work_done;
+
+ work_done = ath12k_dp_service_srng(ab, irq_grp, budget);
+ if (work_done < budget) {
+ napi_complete_done(napi, work_done);
+ ath12k_ahb_ext_grp_enable(irq_grp);
+ }
+
+ if (work_done > budget)
+ work_done = budget;
+
+ return work_done;
+}
+
+static irqreturn_t ath12k_ahb_ext_interrupt_handler(int irq, void *arg)
+{
+ struct ath12k_ext_irq_grp *irq_grp = arg;
+
+ /* last interrupt received for this group */
+ irq_grp->timestamp = jiffies;
+
+ ath12k_ahb_ext_grp_disable(irq_grp);
+
+ napi_schedule(&irq_grp->napi);
+
+ return IRQ_HANDLED;
+}
+
+static int ath12k_ahb_config_ext_irq(struct ath12k_base *ab)
+{
+ const struct ath12k_hw_ring_mask *ring_mask;
+ struct ath12k_ext_irq_grp *irq_grp;
+ const struct hal_ops *hal_ops;
+ int i, j, irq, irq_idx, ret;
+ u32 num_irq;
+
+ ring_mask = ab->hw_params->ring_mask;
+ hal_ops = ab->hw_params->hal_ops;
+ for (i = 0; i < ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) {
+ irq_grp = &ab->ext_irq_grp[i];
+ num_irq = 0;
+
+ irq_grp->ab = ab;
+ irq_grp->grp_id = i;
+
+ irq_grp->napi_ndev = alloc_netdev_dummy(0);
+ if (!irq_grp->napi_ndev)
+ return -ENOMEM;
+
+ netif_napi_add(irq_grp->napi_ndev, &irq_grp->napi,
+ ath12k_ahb_ext_grp_napi_poll);
+
+ for (j = 0; j < ATH12K_EXT_IRQ_NUM_MAX; j++) {
+ /* For TX ring, ensure that the ring mask and the
+ * tcl_to_wbm_rbm_map point to the same ring number.
+ */
+ if (ring_mask->tx[i] &
+ BIT(hal_ops->tcl_to_wbm_rbm_map[j].wbm_ring_num)) {
+ irq_grp->irqs[num_irq++] =
+ wbm2host_tx_completions_ring1 - j;
+ }
+
+ if (ring_mask->rx[i] & BIT(j)) {
+ irq_grp->irqs[num_irq++] =
+ reo2host_destination_ring1 - j;
+ }
+
+ if (ring_mask->rx_err[i] & BIT(j))
+ irq_grp->irqs[num_irq++] = reo2host_exception;
+
+ if (ring_mask->rx_wbm_rel[i] & BIT(j))
+ irq_grp->irqs[num_irq++] = wbm2host_rx_release;
+
+ if (ring_mask->reo_status[i] & BIT(j))
+ irq_grp->irqs[num_irq++] = reo2host_status;
+
+ if (ring_mask->rx_mon_dest[i] & BIT(j))
+ irq_grp->irqs[num_irq++] =
+ rxdma2host_monitor_destination_mac1;
+ }
+
+ irq_grp->num_irq = num_irq;
+
+ for (j = 0; j < irq_grp->num_irq; j++) {
+ irq_idx = irq_grp->irqs[j];
+
+ irq = platform_get_irq_byname(ab->pdev,
+ irq_name[irq_idx]);
+ ab->irq_num[irq_idx] = irq;
+ irq_set_status_flags(irq, IRQ_NOAUTOEN | IRQ_DISABLE_UNLAZY);
+ ret = devm_request_irq(ab->dev, irq,
+ ath12k_ahb_ext_interrupt_handler,
+ IRQF_TRIGGER_RISING,
+ irq_name[irq_idx], irq_grp);
+ if (ret)
+ ath12k_warn(ab, "failed request_irq for %d\n", irq);
+ }
+ }
+
+ return 0;
+}
+
+static int ath12k_ahb_config_irq(struct ath12k_base *ab)
+{
+ int irq, irq_idx, i;
+ int ret;
+
+ /* Configure CE irqs */
+ for (i = 0; i < ab->hw_params->ce_count; i++) {
+ struct ath12k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i];
+
+ if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
+ continue;
+
+ irq_idx = ATH12K_IRQ_CE0_OFFSET + i;
+
+ INIT_WORK(&ce_pipe->intr_wq, ath12k_ahb_ce_workqueue);
+ irq = platform_get_irq_byname(ab->pdev, irq_name[irq_idx]);
+ ret = devm_request_irq(ab->dev, irq, ath12k_ahb_ce_interrupt_handler,
+ IRQF_TRIGGER_RISING, irq_name[irq_idx],
+ ce_pipe);
+ if (ret)
+ return ret;
+
+ ab->irq_num[irq_idx] = irq;
+ }
+
+ /* Configure external interrupts */
+ ret = ath12k_ahb_config_ext_irq(ab);
+
+ return ret;
+}
+
+static int ath12k_ahb_map_service_to_pipe(struct ath12k_base *ab, u16 service_id,
+ u8 *ul_pipe, u8 *dl_pipe)
+{
+ const struct service_to_pipe *entry;
+ bool ul_set = false, dl_set = false;
+ u32 pipedir;
+ int i;
+
+ for (i = 0; i < ab->hw_params->svc_to_ce_map_len; i++) {
+ entry = &ab->hw_params->svc_to_ce_map[i];
+
+ if (__le32_to_cpu(entry->service_id) != service_id)
+ continue;
+
+ pipedir = __le32_to_cpu(entry->pipedir);
+ if (pipedir == PIPEDIR_IN || pipedir == PIPEDIR_INOUT) {
+ WARN_ON(dl_set);
+ *dl_pipe = __le32_to_cpu(entry->pipenum);
+ dl_set = true;
+ }
+
+ if (pipedir == PIPEDIR_OUT || pipedir == PIPEDIR_INOUT) {
+ WARN_ON(ul_set);
+ *ul_pipe = __le32_to_cpu(entry->pipenum);
+ ul_set = true;
+ }
+ }
+
+ if (WARN_ON(!ul_set || !dl_set))
+ return -ENOENT;
+
+ return 0;
+}
+
+static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {
+ .start = ath12k_ahb_start,
+ .stop = ath12k_ahb_stop,
+ .read32 = ath12k_ahb_read32,
+ .write32 = ath12k_ahb_write32,
+ .irq_enable = ath12k_ahb_ext_irq_enable,
+ .irq_disable = ath12k_ahb_ext_irq_disable,
+ .map_service_to_pipe = ath12k_ahb_map_service_to_pipe,
+};
+
+static int ath12k_ahb_clock_init(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ int ret;
+
+ ab_ahb->xo_clk = devm_clk_get(ab->dev, "xo");
+ if (IS_ERR_OR_NULL(ab_ahb->xo_clk)) {
+ ret = ab_ahb->xo_clk ? PTR_ERR(ab_ahb->xo_clk) : -ENODEV;
+ return dev_err_probe(&ab->pdev->dev, ret, "failed to get xo clock\n");
+ }
+
+ return 0;
+}
+
+static void ath12k_ahb_clock_deinit(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+
+ devm_clk_put(ab->dev, ab_ahb->xo_clk);
+ ab_ahb->xo_clk = NULL;
+}
+
+static int ath12k_ahb_clock_enable(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ int ret;
+
+ if (IS_ERR_OR_NULL(ab_ahb->xo_clk)) {
+ ath12k_err(ab, "clock is not initialized\n");
+ return -EIO;
+ }
+
+ ret = clk_prepare_enable(ab_ahb->xo_clk);
+ if (ret) {
+ ath12k_err(ab, "failed to enable gcc_xo_clk: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void ath12k_ahb_clock_disable(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+
+ clk_disable_unprepare(ab_ahb->xo_clk);
+}
+
+static int ath12k_ahb_resource_init(struct ath12k_base *ab)
+{
+ struct platform_device *pdev = ab->pdev;
+ struct resource *mem_res;
+ int ret;
+
+ ab->mem = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
+ if (IS_ERR(ab->mem)) {
+ ret = dev_err_probe(&pdev->dev, PTR_ERR(ab->mem), "ioremap error\n");
+ goto out;
+ }
+
+ ab->mem_len = resource_size(mem_res);
+
+ if (ab->hw_params->ce_remap) {
+ const struct ce_remap *ce_remap = ab->hw_params->ce_remap;
+ /* CE register space is moved out of WCSS and the space is not
+ * contiguous, hence remapping the CE registers to a new space
+ * for accessing them.
+ */
+ ab->mem_ce = ioremap(ce_remap->base, ce_remap->size);
+ if (IS_ERR(ab->mem_ce)) {
+ dev_err(&pdev->dev, "ce ioremap error\n");
+ ret = -ENOMEM;
+ goto err_mem_unmap;
+ }
+ ab->ce_remap = true;
+ ab->ce_remap_base_addr = HAL_IPQ5332_CE_WFSS_REG_BASE;
+ }
+
+ ret = ath12k_ahb_clock_init(ab);
+ if (ret)
+ goto err_mem_ce_unmap;
+
+ ret = ath12k_ahb_clock_enable(ab);
+ if (ret)
+ goto err_clock_deinit;
+
+ return 0;
+
+err_clock_deinit:
+ ath12k_ahb_clock_deinit(ab);
+
+err_mem_ce_unmap:
+ if (ab->hw_params->ce_remap)
+ iounmap(ab->mem_ce);
+
+err_mem_unmap:
+ ab->mem_ce = NULL;
+ devm_iounmap(ab->dev, ab->mem);
+
+out:
+ ab->mem = NULL;
+ return ret;
+}
+
+static void ath12k_ahb_resource_deinit(struct ath12k_base *ab)
+{
+ if (ab->mem)
+ devm_iounmap(ab->dev, ab->mem);
+
+ if (ab->mem_ce)
+ iounmap(ab->mem_ce);
+
+ ab->mem = NULL;
+ ab->mem_ce = NULL;
+
+ ath12k_ahb_clock_disable(ab);
+ ath12k_ahb_clock_deinit(ab);
+}
+
+static enum ath12k_hw_rev ath12k_ahb_get_hw_rev(struct platform_device *pdev)
+{
+ const struct of_device_id *of_id;
+
+ of_id = of_match_device(ath12k_ahb_of_match, &pdev->dev);
+ if (!of_id) {
+ dev_err(&pdev->dev, "Failed to find matching device tree id\n");
+ return -EINVAL;
+ }
+
+ return (enum ath12k_hw_rev)of_id->data;
+}
+
+static int ath12k_ahb_probe(struct platform_device *pdev)
+{
+ struct ath12k_base *ab;
+ const struct ath12k_hif_ops *hif_ops;
+ struct device_node *mem_node;
+ enum ath12k_hw_rev hw_rev;
+ u32 addr;
+ int ret;
+
+ hw_rev = ath12k_ahb_get_hw_rev(pdev);
+ switch (hw_rev) {
+ case ATH12K_HW_IPQ5332_HW10:
+ hif_ops = &ath12k_ahb_hif_ops_ipq5332;
+ break;
+ default:
+ return -EOPNOTSUPP;
+ }
+
+ ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to set 32-bit coherent dma\n");
+ return ret;
+ }
+
+ ab = ath12k_core_alloc(&pdev->dev, sizeof(struct ath12k_ahb),
+ ATH12K_BUS_AHB);
+ if (!ab) {
+ dev_err(&pdev->dev, "failed to allocate ath12k base\n");
+ return -ENOMEM;
+ }
+
+ ab->hif.ops = hif_ops;
+ ab->pdev = pdev;
+ ab->hw_rev = hw_rev;
+ platform_set_drvdata(pdev, ab);
+
+ /* Set fixed_mem_region to true for platforms that support fixed memory
+ * reservation from DT. If memory is reserved from DT for FW, ath12k driver
+ * need not to allocate memory.
+ */
+ if (!of_property_read_u32(ab->dev->of_node, "memory-region", &addr)) {
+ set_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags);
+
+ /* If the platform supports fixed memory, then it should define/
+ * reserve MLO global memory in DT to support Multi Link Operation
+ * (IEEE 802.11be).
+ * If MLO global memory is not reserved in fixed memory mode, then
+ * MLO cannot be supported.
+ */
+ mem_node = ath12k_core_get_reserved_mem_by_name(ab, "mlo-global-mem");
+ if (!mem_node)
+ ab->single_chip_mlo_supp = false;
+ else
+ of_node_put(mem_node);
+ }
+
+ ret = ath12k_core_pre_init(ab);
+ if (ret)
+ goto err_core_free;
+
+ ret = ath12k_ahb_resource_init(ab);
+ if (ret)
+ goto err_core_free;
+
+ ret = ath12k_hal_srng_init(ab);
+ if (ret)
+ goto err_resource_deinit;
+
+ ret = ath12k_ce_alloc_pipes(ab);
+ if (ret) {
+ ath12k_err(ab, "failed to allocate ce pipes: %d\n", ret);
+ goto err_hal_srng_deinit;
+ }
+
+ ath12k_ahb_init_qmi_ce_config(ab);
+
+ ret = ath12k_ahb_config_irq(ab);
+ if (ret) {
+ ath12k_err(ab, "failed to configure irq: %d\n", ret);
+ goto err_ce_free;
+ }
+
+ ret = ath12k_core_init(ab);
+ if (ret) {
+ ath12k_err(ab, "failed to init core: %d\n", ret);
+ goto err_ce_free;
+ }
+
+ return 0;
+
+err_ce_free:
+ ath12k_ce_free_pipes(ab);
+
+err_hal_srng_deinit:
+ ath12k_hal_srng_deinit(ab);
+
+err_resource_deinit:
+ ath12k_ahb_resource_deinit(ab);
+
+err_core_free:
+ ath12k_core_free(ab);
+ platform_set_drvdata(pdev, NULL);
+
+ return ret;
+}
+
+static void ath12k_ahb_remove_prepare(struct ath12k_base *ab)
+{
+ unsigned long left;
+
+ if (test_bit(ATH12K_FLAG_RECOVERY, &ab->dev_flags)) {
+ left = wait_for_completion_timeout(&ab->driver_recovery,
+ ATH12K_AHB_RECOVERY_TIMEOUT);
+ if (!left)
+ ath12k_warn(ab, "failed to receive recovery response completion\n");
+ }
+
+ set_bit(ATH12K_FLAG_UNREGISTERING, &ab->dev_flags);
+ cancel_work_sync(&ab->restart_work);
+ cancel_work_sync(&ab->qmi.event_work);
+}
+
+static void ath12k_ahb_free_resources(struct ath12k_base *ab)
+{
+ struct platform_device *pdev = ab->pdev;
+
+ ath12k_hal_srng_deinit(ab);
+ ath12k_ce_free_pipes(ab);
+ ath12k_ahb_resource_deinit(ab);
+ ath12k_core_free(ab);
+ platform_set_drvdata(pdev, NULL);
+}
+
+static void ath12k_ahb_remove(struct platform_device *pdev)
+{
+ struct ath12k_base *ab = platform_get_drvdata(pdev);
+
+ if (test_bit(ATH12K_FLAG_QMI_FAIL, &ab->dev_flags)) {
+ ath12k_qmi_deinit_service(ab);
+ goto qmi_fail;
+ }
+
+ ath12k_ahb_remove_prepare(ab);
+ ath12k_core_deinit(ab);
+
+qmi_fail:
+ ath12k_ahb_free_resources(ab);
+}
+
+static void ath12k_ahb_shutdown(struct platform_device *pdev)
+{
+ struct ath12k_base *ab = platform_get_drvdata(pdev);
+
+ /* platform shutdown() & remove() are mutually exclusive.
+ * remove() is invoked during rmmod & shutdown() during
+ * system reboot/shutdown.
+ */
+ ath12k_ahb_remove_prepare(ab);
+
+ if (!(test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)))
+ goto free_resources;
+
+ ath12k_core_deinit(ab);
+
+free_resources:
+ ath12k_ahb_free_resources(ab);
+}
+
+static struct platform_driver ath12k_ahb_driver = {
+ .driver = {
+ .name = "ath12k_ahb",
+ .of_match_table = ath12k_ahb_of_match,
+ },
+ .probe = ath12k_ahb_probe,
+ .remove = ath12k_ahb_remove,
+ .shutdown = ath12k_ahb_shutdown,
+};
+
+int ath12k_ahb_init(void)
+{
+ return platform_driver_register(&ath12k_ahb_driver);
+}
+
+void ath12k_ahb_exit(void)
+{
+ platform_driver_unregister(&ath12k_ahb_driver);
+}
diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
new file mode 100644
index 000000000000..64f0696588c0
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/ahb.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: BSD-3-Clause-Clear */
+/*
+ * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022-2025, Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+#ifndef ATH12K_AHB_H
+#define ATH12K_AHB_H
+
+#include <linux/clk.h>
+#include "core.h"
+
+#define ATH12K_AHB_RECOVERY_TIMEOUT (3 * HZ)
+
+#define ATH12K_AHB_SMP2P_SMEM_MSG GENMASK(15, 0)
+#define ATH12K_AHB_SMP2P_SMEM_SEQ_NO GENMASK(31, 16)
+#define ATH12K_AHB_SMP2P_SMEM_VALUE_MASK 0xFFFFFFFF
+#define ATH12K_PCI_CE_WAKE_IRQ 2
+#define ATH12K_PCI_IRQ_CE0_OFFSET 3
+
+enum ath12k_ahb_smp2p_msg_id {
+ ATH12K_AHB_POWER_SAVE_ENTER = 1,
+ ATH12K_AHB_POWER_SAVE_EXIT,
+};
+
+struct ath12k_base;
+
+struct ath12k_ahb {
+ struct rproc *tgt_rproc;
+ struct clk *xo_clk;
+};
+
+static inline struct ath12k_ahb *ath12k_ab_to_ahb(struct ath12k_base *ab)
+{
+ return (struct ath12k_ahb *)ab->drv_priv;
+}
+
+#endif
diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h
index fa2eadd60c44..297e01d191ab 100644
--- a/drivers/net/wireless/ath/ath12k/core.h
+++ b/drivers/net/wireless/ath/ath12k/core.h
@@ -162,6 +162,7 @@ enum ath12k_firmware_mode {
#define ATH12K_IRQ_NUM_MAX 57
#define ATH12K_EXT_IRQ_NUM_MAX 16
+#define ATH12K_MAX_TCL_RING_NUM 3
struct ath12k_ext_irq_grp {
struct ath12k_base *ab;
@@ -169,6 +170,7 @@ struct ath12k_ext_irq_grp {
u32 num_irq;
u32 grp_id;
u64 timestamp;
+ bool napi_enabled;
struct napi_struct napi;
struct net_device *napi_ndev;
};
@@ -1275,6 +1277,8 @@ static inline const char *ath12k_bus_str(enum ath12k_bus bus)
switch (bus) {
case ATH12K_BUS_PCI:
return "pci";
+ case ATH12K_BUS_AHB:
+ return "ahb";
}
return "unknown";
diff --git a/drivers/net/wireless/ath/ath12k/hal.h b/drivers/net/wireless/ath/ath12k/hal.h
index 47ff0b1bfdf4..9f12ed84a653 100644
--- a/drivers/net/wireless/ath/ath12k/hal.h
+++ b/drivers/net/wireless/ath/ath12k/hal.h
@@ -42,6 +42,7 @@ struct ath12k_base;
#define HAL_SHADOW_REG(x) (HAL_SHADOW_BASE_ADDR + (4 * (x)))
/* WCSS Relative address */
+#define HAL_SEQ_WCSS_CMEM_OFFSET 0x00100000
#define HAL_SEQ_WCSS_UMAC_OFFSET 0x00a00000
#define HAL_SEQ_WCSS_UMAC_REO_REG 0x00a38000
#define HAL_SEQ_WCSS_UMAC_TCL_REG 0x00a44000
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index 5123d2f51865..a4332588b117 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -121,6 +121,7 @@ enum ath12k_hw_rate_ofdm {
enum ath12k_bus {
ATH12K_BUS_PCI,
+ ATH12K_BUS_AHB,
};
#define ATH12K_EXT_IRQ_GRP_NUM_MAX 11
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v5 09/13] wifi: ath12k: Power up root PD
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (7 preceding siblings ...)
2025-01-30 4:35 ` [PATCH v5 08/13] wifi: ath12k: add AHB driver support for IPQ5332 Raj Kumar Bhagat
@ 2025-01-30 4:35 ` Raj Kumar Bhagat
2025-01-30 7:58 ` Krzysztof Kozlowski
2025-01-30 4:35 ` [PATCH v5 10/13] wifi: ath12k: Register various userPD interrupts and save SMEM entries Raj Kumar Bhagat
` (3 subsequent siblings)
12 siblings, 1 reply; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:35 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Sowmiya Sree Elavalagan, Raj Kumar Bhagat
From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Q6 processor acts as rootPD, other hardware like IPQ5332 which are
attached to Q6 act as userPDs. WCSS driver handles loading and booting
of rootPD, while the ath12k driver boots the userPD.
Get the rproc handle from the DTS entry and boot the rootPD if it
is not already powered on. Register to the rproc notifier to monitor
the rproc state, this allows ath12k driver to know power up/down
sequence of the rootPD. Power up the rootPD and wait for a power-up
notification from the notifier callback before powering up the userPDs.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ahb.c | 125 ++++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/ahb.h | 7 ++
2 files changed, 132 insertions(+)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c
index f4c15e0451bd..8f03eaeac88f 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.c
+++ b/drivers/net/wireless/ath/ath12k/ahb.c
@@ -8,6 +8,7 @@
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
+#include <linux/remoteproc.h>
#include "ahb.h"
#include "debug.h"
#include "hif.h"
@@ -546,6 +547,122 @@ static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {
.map_service_to_pipe = ath12k_ahb_map_service_to_pipe,
};
+static int ath12k_ahb_root_pd_state_notifier(struct notifier_block *nb,
+ const unsigned long event, void *data)
+{
+ struct ath12k_ahb *ab_ahb = container_of(nb, struct ath12k_ahb, root_pd_nb);
+ struct ath12k_base *ab = ab_ahb->ab;
+
+ if (event == ATH12K_RPROC_AFTER_POWERUP) {
+ ath12k_dbg(ab, ATH12K_DBG_AHB, "Root PD is UP\n");
+ complete(&ab_ahb->rootpd_ready);
+ }
+
+ return 0;
+}
+
+static int ath12k_ahb_register_rproc_notifier(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+
+ ab_ahb->root_pd_nb.notifier_call = ath12k_ahb_root_pd_state_notifier;
+ init_completion(&ab_ahb->rootpd_ready);
+
+ ab_ahb->root_pd_notifier = qcom_register_ssr_notifier(ab_ahb->tgt_rproc->name,
+ &ab_ahb->root_pd_nb);
+ if (IS_ERR(ab_ahb->root_pd_notifier))
+ return PTR_ERR(ab_ahb->root_pd_notifier);
+
+ return 0;
+}
+
+static void ath12k_ahb_unregister_rproc_notifier(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+
+ if (!ab_ahb->root_pd_notifier) {
+ ath12k_err(ab, "Rproc notifier not registered\n");
+ return;
+ }
+
+ qcom_unregister_ssr_notifier(ab_ahb->root_pd_notifier,
+ &ab_ahb->root_pd_nb);
+ ab_ahb->root_pd_notifier = NULL;
+}
+
+static int ath12k_ahb_get_rproc(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ struct device *dev = ab->dev;
+ struct device_node *np;
+ struct rproc *prproc;
+
+ np = of_parse_phandle(dev->of_node, "qcom,rproc", 0);
+ if (!np) {
+ ath12k_err(ab, "failed to get q6_rproc handle\n");
+ return -ENOENT;
+ }
+
+ prproc = rproc_get_by_phandle(np->phandle);
+ if (!prproc)
+ return dev_err_probe(&ab->pdev->dev, -EPROBE_DEFER,
+ "failed to get rproc\n");
+
+ ab_ahb->tgt_rproc = prproc;
+
+ return 0;
+}
+
+static int ath12k_ahb_boot_root_pd(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ unsigned long time_left;
+ int ret;
+
+ ret = rproc_boot(ab_ahb->tgt_rproc);
+ if (ret < 0) {
+ ath12k_err(ab, "RootPD boot failed\n");
+ return ret;
+ }
+
+ time_left = wait_for_completion_timeout(&ab_ahb->rootpd_ready,
+ ATH12K_ROOTPD_READY_TIMEOUT);
+ if (!time_left) {
+ ath12k_err(ab, "RootPD ready wait timed out\n");
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
+static int ath12k_ahb_configure_rproc(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ int ret;
+
+ ret = ath12k_ahb_get_rproc(ab);
+ if (ret < 0)
+ return ret;
+
+ ret = ath12k_ahb_register_rproc_notifier(ab);
+ if (ret < 0)
+ return dev_err_probe(&ab->pdev->dev, ret,
+ "failed to register rproc notifier\n");
+
+ if (ab_ahb->tgt_rproc->state != RPROC_RUNNING) {
+ ret = ath12k_ahb_boot_root_pd(ab);
+ if (ret < 0) {
+ ath12k_err(ab, "failed to boot the remote processor Q6\n");
+ goto unreg_notifier;
+ }
+ }
+ return 0;
+
+unreg_notifier:
+ ath12k_ahb_unregister_rproc_notifier(ab);
+ return ret;
+}
+
static int ath12k_ahb_clock_init(struct ath12k_base *ab)
{
struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
@@ -683,6 +800,7 @@ static int ath12k_ahb_probe(struct platform_device *pdev)
struct ath12k_base *ab;
const struct ath12k_hif_ops *hif_ops;
struct device_node *mem_node;
+ struct ath12k_ahb *ab_ahb;
enum ath12k_hw_rev hw_rev;
u32 addr;
int ret;
@@ -713,6 +831,8 @@ static int ath12k_ahb_probe(struct platform_device *pdev)
ab->pdev = pdev;
ab->hw_rev = hw_rev;
platform_set_drvdata(pdev, ab);
+ ab_ahb = ath12k_ab_to_ahb(ab);
+ ab_ahb->ab = ab;
/* Set fixed_mem_region to true for platforms that support fixed memory
* reservation from DT. If memory is reserved from DT for FW, ath12k driver
@@ -754,6 +874,10 @@ static int ath12k_ahb_probe(struct platform_device *pdev)
ath12k_ahb_init_qmi_ce_config(ab);
+ ret = ath12k_ahb_configure_rproc(ab);
+ if (ret)
+ goto err_ce_free;
+
ret = ath12k_ahb_config_irq(ab);
if (ret) {
ath12k_err(ab, "failed to configure irq: %d\n", ret);
@@ -798,6 +922,7 @@ static void ath12k_ahb_remove_prepare(struct ath12k_base *ab)
set_bit(ATH12K_FLAG_UNREGISTERING, &ab->dev_flags);
cancel_work_sync(&ab->restart_work);
cancel_work_sync(&ab->qmi.event_work);
+ ath12k_ahb_unregister_rproc_notifier(ab);
}
static void ath12k_ahb_free_resources(struct ath12k_base *ab)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
index 64f0696588c0..1105473917ce 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.h
+++ b/drivers/net/wireless/ath/ath12k/ahb.h
@@ -7,6 +7,7 @@
#define ATH12K_AHB_H
#include <linux/clk.h>
+#include <linux/remoteproc/qcom_rproc.h>
#include "core.h"
#define ATH12K_AHB_RECOVERY_TIMEOUT (3 * HZ)
@@ -16,6 +17,8 @@
#define ATH12K_AHB_SMP2P_SMEM_VALUE_MASK 0xFFFFFFFF
#define ATH12K_PCI_CE_WAKE_IRQ 2
#define ATH12K_PCI_IRQ_CE0_OFFSET 3
+#define ATH12K_ROOTPD_READY_TIMEOUT (5 * HZ)
+#define ATH12K_RPROC_AFTER_POWERUP QCOM_SSR_AFTER_POWERUP
enum ath12k_ahb_smp2p_msg_id {
ATH12K_AHB_POWER_SAVE_ENTER = 1,
@@ -25,8 +28,12 @@ enum ath12k_ahb_smp2p_msg_id {
struct ath12k_base;
struct ath12k_ahb {
+ struct ath12k_base *ab;
struct rproc *tgt_rproc;
struct clk *xo_clk;
+ struct completion rootpd_ready;
+ struct notifier_block root_pd_nb;
+ void *root_pd_notifier;
};
static inline struct ath12k_ahb *ath12k_ab_to_ahb(struct ath12k_base *ab)
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v5 10/13] wifi: ath12k: Register various userPD interrupts and save SMEM entries
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (8 preceding siblings ...)
2025-01-30 4:35 ` [PATCH v5 09/13] wifi: ath12k: Power up root PD Raj Kumar Bhagat
@ 2025-01-30 4:35 ` Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 11/13] wifi: ath12k: Power up userPD Raj Kumar Bhagat
` (2 subsequent siblings)
12 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:35 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Sowmiya Sree Elavalagan, Raj Kumar Bhagat
From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Q6 and ath12k driver communicates using SMEM and IRQs. Spawn interrupt
is triggered once the userPD thread is spawned. Ready interrupts denotes
userPD is completely powered up and ready. Stop-ack is to acknowledge
the ath12k driver that userPD is stopped. Ath12k driver needs to set spawn
bit in SMEM to instruct Q6 to spawn a userPD. Similarly stop bit is
set when userPD needs to be stopped.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ahb.c | 79 ++++++++++++++++++++++++++-
drivers/net/wireless/ath/ath12k/ahb.h | 16 ++++++
drivers/net/wireless/ath/ath12k/hw.h | 1 +
3 files changed, 94 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c
index 8f03eaeac88f..2048da6e1b11 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.c
+++ b/drivers/net/wireless/ath/ath12k/ahb.c
@@ -9,6 +9,7 @@
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/remoteproc.h>
+#include <linux/soc/qcom/smem_state.h>
#include "ahb.h"
#include "debug.h"
#include "hif.h"
@@ -23,6 +24,11 @@ static const struct of_device_id ath12k_ahb_of_match[] = {
MODULE_DEVICE_TABLE(of, ath12k_ahb_of_match);
#define ATH12K_IRQ_CE0_OFFSET 4
+#define ATH12K_MAX_UPDS 1
+#define ATH12K_UPD_IRQ_WRD_LEN 18
+static const char ath12k_userpd_irq[][9] = {"spawn",
+ "ready",
+ "stop-ack"};
static const char *irq_name[ATH12K_IRQ_NUM_MAX] = {
"misc-pulse1",
@@ -547,6 +553,72 @@ static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {
.map_service_to_pipe = ath12k_ahb_map_service_to_pipe,
};
+static irqreturn_t ath12k_userpd_irq_handler(int irq, void *data)
+{
+ struct ath12k_base *ab = data;
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+
+ if (irq == ab_ahb->userpd_irq_num[ATH12K_USERPD_SPAWN_IRQ]) {
+ complete(&ab_ahb->userpd_spawned);
+ } else if (irq == ab_ahb->userpd_irq_num[ATH12K_USERPD_READY_IRQ]) {
+ complete(&ab_ahb->userpd_ready);
+ } else if (irq == ab_ahb->userpd_irq_num[ATH12K_USERPD_STOP_ACK_IRQ]) {
+ complete(&ab_ahb->userpd_stopped);
+ } else {
+ ath12k_err(ab, "Invalid userpd interrupt\n");
+ return IRQ_NONE;
+ }
+
+ return IRQ_HANDLED;
+}
+
+static int ath12k_ahb_config_rproc_irq(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ int i, ret;
+ char *upd_irq_name;
+
+ for (i = 0; i < ATH12K_USERPD_MAX_IRQ; i++) {
+ ab_ahb->userpd_irq_num[i] = platform_get_irq_byname(ab->pdev,
+ ath12k_userpd_irq[i]);
+ if (ab_ahb->userpd_irq_num[i] < 0)
+ return ab_ahb->userpd_irq_num[i];
+
+ upd_irq_name = devm_kzalloc(&ab->pdev->dev, ATH12K_UPD_IRQ_WRD_LEN,
+ GFP_KERNEL);
+ if (!upd_irq_name)
+ return -ENOMEM;
+
+ scnprintf(upd_irq_name, ATH12K_UPD_IRQ_WRD_LEN, "UserPD%u-%s",
+ ab_ahb->userpd_id, ath12k_userpd_irq[i]);
+ ret = devm_request_threaded_irq(&ab->pdev->dev, ab_ahb->userpd_irq_num[i],
+ NULL, ath12k_userpd_irq_handler,
+ IRQF_TRIGGER_RISING | IRQF_ONESHOT,
+ upd_irq_name, ab);
+ if (ret)
+ return dev_err_probe(&ab->pdev->dev, ret,
+ "Request %s irq failed: %d\n",
+ ath12k_userpd_irq[i], ret);
+ }
+
+ ab_ahb->spawn_state = devm_qcom_smem_state_get(&ab->pdev->dev, "spawn",
+ &ab_ahb->spawn_bit);
+ if (IS_ERR(ab_ahb->spawn_state))
+ return dev_err_probe(&ab->pdev->dev, PTR_ERR(ab_ahb->spawn_state),
+ "Failed to acquire spawn state\n");
+
+ ab_ahb->stop_state = devm_qcom_smem_state_get(&ab->pdev->dev, "stop",
+ &ab_ahb->stop_bit);
+ if (IS_ERR(ab_ahb->stop_state))
+ return dev_err_probe(&ab->pdev->dev, PTR_ERR(ab_ahb->stop_state),
+ "Failed to acquire stop state\n");
+
+ init_completion(&ab_ahb->userpd_spawned);
+ init_completion(&ab_ahb->userpd_ready);
+ init_completion(&ab_ahb->userpd_stopped);
+ return 0;
+}
+
static int ath12k_ahb_root_pd_state_notifier(struct notifier_block *nb,
const unsigned long event, void *data)
{
@@ -656,7 +728,8 @@ static int ath12k_ahb_configure_rproc(struct ath12k_base *ab)
goto unreg_notifier;
}
}
- return 0;
+
+ return ath12k_ahb_config_rproc_irq(ab);
unreg_notifier:
ath12k_ahb_unregister_rproc_notifier(ab);
@@ -802,13 +875,14 @@ static int ath12k_ahb_probe(struct platform_device *pdev)
struct device_node *mem_node;
struct ath12k_ahb *ab_ahb;
enum ath12k_hw_rev hw_rev;
- u32 addr;
+ u32 addr, userpd_id;
int ret;
hw_rev = ath12k_ahb_get_hw_rev(pdev);
switch (hw_rev) {
case ATH12K_HW_IPQ5332_HW10:
hif_ops = &ath12k_ahb_hif_ops_ipq5332;
+ userpd_id = ATH12K_IPQ5332_USERPD_ID;
break;
default:
return -EOPNOTSUPP;
@@ -833,6 +907,7 @@ static int ath12k_ahb_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, ab);
ab_ahb = ath12k_ab_to_ahb(ab);
ab_ahb->ab = ab;
+ ab_ahb->userpd_id = userpd_id;
/* Set fixed_mem_region to true for platforms that support fixed memory
* reservation from DT. If memory is reserved from DT for FW, ath12k driver
diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
index 1105473917ce..b17e7693b31a 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.h
+++ b/drivers/net/wireless/ath/ath12k/ahb.h
@@ -25,6 +25,13 @@ enum ath12k_ahb_smp2p_msg_id {
ATH12K_AHB_POWER_SAVE_EXIT,
};
+enum ath12k_ahb_userpd_irq {
+ ATH12K_USERPD_SPAWN_IRQ,
+ ATH12K_USERPD_READY_IRQ,
+ ATH12K_USERPD_STOP_ACK_IRQ,
+ ATH12K_USERPD_MAX_IRQ,
+};
+
struct ath12k_base;
struct ath12k_ahb {
@@ -34,6 +41,15 @@ struct ath12k_ahb {
struct completion rootpd_ready;
struct notifier_block root_pd_nb;
void *root_pd_notifier;
+ struct qcom_smem_state *spawn_state;
+ struct qcom_smem_state *stop_state;
+ struct completion userpd_spawned;
+ struct completion userpd_ready;
+ struct completion userpd_stopped;
+ u32 userpd_id;
+ u32 spawn_bit;
+ u32 stop_bit;
+ int userpd_irq_num[ATH12K_USERPD_MAX_IRQ];
};
static inline struct ath12k_ahb *ath12k_ab_to_ahb(struct ath12k_base *ab)
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index a4332588b117..d4a2e47169d9 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -97,6 +97,7 @@
#define ATH12K_REGDB_FILE_NAME "regdb.bin"
#define ATH12K_PCIE_MAX_PAYLOAD_SIZE 128
+#define ATH12K_IPQ5332_USERPD_ID 1
enum ath12k_hw_rate_cck {
ATH12K_HW_RATE_CCK_LP_11M = 0,
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v5 11/13] wifi: ath12k: Power up userPD
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (9 preceding siblings ...)
2025-01-30 4:35 ` [PATCH v5 10/13] wifi: ath12k: Register various userPD interrupts and save SMEM entries Raj Kumar Bhagat
@ 2025-01-30 4:35 ` Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 12/13] wifi: ath12k: Power down userPD Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 13/13] wifi: ath12k: enable ath12k AHB support Raj Kumar Bhagat
12 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:35 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Sowmiya Sree Elavalagan, Raj Kumar Bhagat
From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
UserPD firmware image is loaded and booted by ath12k driver. Get the userPD
memory region from DTS and load the firmware for userPD from pre-defined
path into io-remapped address of this region. Authenticate this image
using pasid which is a peripheral ID. Set the spawn bit to instruct Q6
to spawn userPD thread. Wait for userPD to spawn which is indicated by
spawn interrupt. Ready interrupt is triggered once the userPD is powered
up completely.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ahb.c | 137 ++++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/ahb.h | 9 ++
2 files changed, 146 insertions(+)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c
index 2048da6e1b11..bd2180d18e8d 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.c
+++ b/drivers/net/wireless/ath/ath12k/ahb.c
@@ -5,10 +5,13 @@
*/
#include <linux/dma-mapping.h>
+#include <linux/firmware/qcom/qcom_scm.h>
#include <linux/of.h>
#include <linux/of_device.h>
+#include <linux/of_reserved_mem.h>
#include <linux/platform_device.h>
#include <linux/remoteproc.h>
+#include <linux/soc/qcom/mdt_loader.h>
#include <linux/soc/qcom/smem_state.h>
#include "ahb.h"
#include "debug.h"
@@ -336,6 +339,139 @@ static void ath12k_ahb_stop(struct ath12k_base *ab)
ath12k_ce_cleanup_pipes(ab);
}
+static int ath12k_ahb_power_up(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ char fw_name[ATH12K_USERPD_FW_NAME_LEN];
+ char fw2_name[ATH12K_USERPD_FW_NAME_LEN];
+ struct device *dev = ab->dev;
+ const struct firmware *fw, *fw2;
+ struct device_node *fw_mem_node;
+ struct reserved_mem *rmem = NULL;
+ unsigned long time_left;
+ phys_addr_t mem_phys;
+ void *mem_region;
+ size_t mem_size;
+ u32 pasid;
+ int ret;
+
+ fw_mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
+ if (fw_mem_node)
+ rmem = of_reserved_mem_lookup(fw_mem_node);
+
+ of_node_put(fw_mem_node);
+
+ if (!rmem) {
+ ath12k_err(ab, "Failed to acquire Q6 memory-region\n");
+ return -EINVAL;
+ }
+
+ mem_phys = rmem->base;
+ mem_size = rmem->size;
+ mem_region = (void *)devm_ioremap_wc(dev, mem_phys, mem_size);
+ if (!mem_region) {
+ ath12k_err(ab, "unable to map memory region: %pa+%pa\n",
+ &rmem->base, &rmem->size);
+ return -ENOMEM;
+ }
+
+ snprintf(fw_name, sizeof(fw_name), "%s/%s/%s%d%s", ATH12K_FW_DIR,
+ ab->hw_params->fw.dir, ATH12K_AHB_FW_PREFIX, ab_ahb->userpd_id,
+ ATH12K_AHB_FW_SUFFIX);
+
+ ret = request_firmware(&fw, fw_name, dev);
+ if (ret < 0) {
+ ath12k_err(ab, "request_firmware failed\n");
+ return ret;
+ }
+
+ ath12k_dbg(ab, ATH12K_DBG_AHB, "Booting fw image %s, size %zd\n", fw_name,
+ fw->size);
+
+ if (!fw->size) {
+ ath12k_err(ab, "Invalid firmware size\n");
+ ret = -EINVAL;
+ goto err_fw;
+ }
+
+ pasid = (u32_encode_bits(ab_ahb->userpd_id, ATH12K_USERPD_ID_MASK)) |
+ ATH12K_AHB_UPD_SWID;
+
+ /* Load FW image to a reserved memory location */
+ ret = qcom_mdt_load(dev, fw, fw_name, pasid, mem_region, mem_phys, mem_size,
+ &mem_phys);
+ if (ret) {
+ ath12k_err(ab, "Failed to load MDT segments: %d\n", ret);
+ goto err_fw;
+ }
+
+ snprintf(fw2_name, sizeof(fw2_name), "%s/%s/%s", ATH12K_FW_DIR,
+ ab->hw_params->fw.dir, ATH12K_AHB_FW2);
+
+ ret = request_firmware(&fw2, fw2_name, dev);
+ if (ret < 0) {
+ ath12k_err(ab, "request_firmware failed\n");
+ goto err_fw;
+ }
+
+ ath12k_dbg(ab, ATH12K_DBG_AHB, "Booting fw image %s, size %zd\n", fw2_name,
+ fw2->size);
+
+ if (!fw2->size) {
+ ath12k_err(ab, "Invalid firmware size\n");
+ ret = -EINVAL;
+ goto err_fw2;
+ }
+
+ ret = qcom_mdt_load_no_init(dev, fw2, fw2_name, pasid, mem_region, mem_phys,
+ mem_size, &mem_phys);
+ if (ret) {
+ ath12k_err(ab, "Failed to load MDT segments: %d\n", ret);
+ goto err_fw2;
+ }
+
+ /* Authenticate FW image using peripheral ID */
+ ret = qcom_scm_pas_auth_and_reset(pasid);
+ if (ret) {
+ ath12k_err(ab, "failed to boot the remote processor %d\n", ret);
+ goto err_fw2;
+ }
+
+ /* Instruct Q6 to spawn userPD thread */
+ ret = qcom_smem_state_update_bits(ab_ahb->spawn_state, BIT(ab_ahb->spawn_bit),
+ BIT(ab_ahb->spawn_bit));
+ if (ret) {
+ ath12k_err(ab, "Failed to update spawn state %d\n", ret);
+ goto err_fw2;
+ }
+
+ time_left = wait_for_completion_timeout(&ab_ahb->userpd_spawned,
+ ATH12K_USERPD_SPAWN_TIMEOUT);
+ if (!time_left) {
+ ath12k_err(ab, "UserPD spawn wait timed out\n");
+ ret = -ETIMEDOUT;
+ goto err_fw2;
+ }
+
+ time_left = wait_for_completion_timeout(&ab_ahb->userpd_ready,
+ ATH12K_USERPD_READY_TIMEOUT);
+ if (!time_left) {
+ ath12k_err(ab, "UserPD ready wait timed out\n");
+ ret = -ETIMEDOUT;
+ goto err_fw2;
+ }
+
+ qcom_smem_state_update_bits(ab_ahb->spawn_state, BIT(ab_ahb->spawn_bit), 0);
+
+ ath12k_dbg(ab, ATH12K_DBG_AHB, "UserPD%d is now UP\n", ab_ahb->userpd_id);
+
+err_fw2:
+ release_firmware(fw2);
+err_fw:
+ release_firmware(fw);
+ return ret;
+}
+
static void ath12k_ahb_init_qmi_ce_config(struct ath12k_base *ab)
{
struct ath12k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
@@ -551,6 +687,7 @@ static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {
.irq_enable = ath12k_ahb_ext_irq_enable,
.irq_disable = ath12k_ahb_ext_irq_disable,
.map_service_to_pipe = ath12k_ahb_map_service_to_pipe,
+ .power_up = ath12k_ahb_power_up,
};
static irqreturn_t ath12k_userpd_irq_handler(int irq, void *data)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
index b17e7693b31a..f8a5c43075c1 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.h
+++ b/drivers/net/wireless/ath/ath12k/ahb.h
@@ -19,6 +19,15 @@
#define ATH12K_PCI_IRQ_CE0_OFFSET 3
#define ATH12K_ROOTPD_READY_TIMEOUT (5 * HZ)
#define ATH12K_RPROC_AFTER_POWERUP QCOM_SSR_AFTER_POWERUP
+#define ATH12K_AHB_FW_PREFIX "q6_fw"
+#define ATH12K_AHB_FW_SUFFIX ".mdt"
+#define ATH12K_AHB_FW2 "iu_fw.mdt"
+#define ATH12K_AHB_UPD_SWID 0x12
+#define ATH12K_USERPD_SPAWN_TIMEOUT (5 * HZ)
+#define ATH12K_USERPD_READY_TIMEOUT (10 * HZ)
+#define ATH12K_USERPD_STOP_TIMEOUT (5 * HZ)
+#define ATH12K_USERPD_ID_MASK GENMASK(9, 8)
+#define ATH12K_USERPD_FW_NAME_LEN 35
enum ath12k_ahb_smp2p_msg_id {
ATH12K_AHB_POWER_SAVE_ENTER = 1,
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v5 12/13] wifi: ath12k: Power down userPD
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (10 preceding siblings ...)
2025-01-30 4:35 ` [PATCH v5 11/13] wifi: ath12k: Power up userPD Raj Kumar Bhagat
@ 2025-01-30 4:35 ` Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 13/13] wifi: ath12k: enable ath12k AHB support Raj Kumar Bhagat
12 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:35 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Sowmiya Sree Elavalagan, Raj Kumar Bhagat
From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Set the stop bit in SMEM to power down the userPD. Wait for stop-ack IRQ
to indicate power down completion. Release the userPD firmware using its
peripheral ID.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ahb.c | 30 +++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c
index bd2180d18e8d..0dbee14fbe90 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.c
+++ b/drivers/net/wireless/ath/ath12k/ahb.c
@@ -472,6 +472,34 @@ static int ath12k_ahb_power_up(struct ath12k_base *ab)
return ret;
}
+static void ath12k_ahb_power_down(struct ath12k_base *ab, bool is_suspend)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ unsigned long time_left;
+ u32 pasid;
+ int ret;
+
+ qcom_smem_state_update_bits(ab_ahb->stop_state, BIT(ab_ahb->stop_bit),
+ BIT(ab_ahb->stop_bit));
+
+ time_left = wait_for_completion_timeout(&ab_ahb->userpd_stopped,
+ ATH12K_USERPD_STOP_TIMEOUT);
+ if (!time_left) {
+ ath12k_err(ab, "UserPD stop wait timed out\n");
+ return;
+ }
+
+ qcom_smem_state_update_bits(ab_ahb->stop_state, BIT(ab_ahb->stop_bit), 0);
+
+ pasid = (u32_encode_bits(ab_ahb->userpd_id, ATH12K_USERPD_ID_MASK)) |
+ ATH12K_AHB_UPD_SWID;
+ /* Release the firmware */
+ ret = qcom_scm_pas_shutdown(pasid);
+ if (ret)
+ ath12k_err(ab, "scm pas shutdown failed for userPD%d: %d\n",
+ ab_ahb->userpd_id, ret);
+}
+
static void ath12k_ahb_init_qmi_ce_config(struct ath12k_base *ab)
{
struct ath12k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
@@ -688,6 +716,7 @@ static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {
.irq_disable = ath12k_ahb_ext_irq_disable,
.map_service_to_pipe = ath12k_ahb_map_service_to_pipe,
.power_up = ath12k_ahb_power_up,
+ .power_down = ath12k_ahb_power_down,
};
static irqreturn_t ath12k_userpd_irq_handler(int irq, void *data)
@@ -1153,6 +1182,7 @@ static void ath12k_ahb_remove(struct platform_device *pdev)
struct ath12k_base *ab = platform_get_drvdata(pdev);
if (test_bit(ATH12K_FLAG_QMI_FAIL, &ab->dev_flags)) {
+ ath12k_ahb_power_down(ab, false);
ath12k_qmi_deinit_service(ab);
goto qmi_fail;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v5 13/13] wifi: ath12k: enable ath12k AHB support
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (11 preceding siblings ...)
2025-01-30 4:35 ` [PATCH v5 12/13] wifi: ath12k: Power down userPD Raj Kumar Bhagat
@ 2025-01-30 4:35 ` Raj Kumar Bhagat
12 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-30 4:35 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Balamurugan S, P Praneesh, Raj Kumar Bhagat
From: Balamurugan S <quic_bselvara@quicinc.com>
Currently only PCI devices are supported in Ath12k driver. Refactor
Ath12k module_init and module_exit to include Ath12k AHB support.
Add Ath12k AHB support in Kconfig with dependency on Remoteproc
driver. Ath12k AHB support relies on remoteproc driver for firmware
download, power up/down etc.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/Kconfig | 6 ++++
drivers/net/wireless/ath/ath12k/Makefile | 1 +
drivers/net/wireless/ath/ath12k/ahb.h | 11 ++++++++
drivers/net/wireless/ath/ath12k/core.c | 35 ++++++++++++++++++++++--
drivers/net/wireless/ath/ath12k/pci.c | 10 ++-----
drivers/net/wireless/ath/ath12k/pci.h | 4 ++-
6 files changed, 55 insertions(+), 12 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/Kconfig b/drivers/net/wireless/ath/ath12k/Kconfig
index 52a1bb19e3da..b2bfcaca00b3 100644
--- a/drivers/net/wireless/ath/ath12k/Kconfig
+++ b/drivers/net/wireless/ath/ath12k/Kconfig
@@ -15,6 +15,12 @@ config ATH12K
If you choose to build a module, it'll be called ath12k.
+config ATH12K_AHB
+ bool "QTI ath12k AHB support"
+ depends on ATH12K && REMOTEPROC && QCOM_Q6V5_WCSS_SEC
+ help
+ Enable support for Ath12k AHB bus chipsets, example IPQ5332.
+
config ATH12K_DEBUG
bool "ath12k debugging"
depends on ATH12K
diff --git a/drivers/net/wireless/ath/ath12k/Makefile b/drivers/net/wireless/ath/ath12k/Makefile
index 4a7f5e87384c..95f4b6ca1f77 100644
--- a/drivers/net/wireless/ath/ath12k/Makefile
+++ b/drivers/net/wireless/ath/ath12k/Makefile
@@ -23,6 +23,7 @@ ath12k-y += core.o \
fw.o \
p2p.o
+ath12k-$(CONFIG_ATH12K_AHB) += ahb.o
ath12k-$(CONFIG_ATH12K_DEBUGFS) += debugfs.o debugfs_htt_stats.o
ath12k-$(CONFIG_ACPI) += acpi.o
ath12k-$(CONFIG_ATH12K_TRACING) += trace.o
diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
index f8a5c43075c1..d56244b20a6a 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.h
+++ b/drivers/net/wireless/ath/ath12k/ahb.h
@@ -66,4 +66,15 @@ static inline struct ath12k_ahb *ath12k_ab_to_ahb(struct ath12k_base *ab)
return (struct ath12k_ahb *)ab->drv_priv;
}
+#ifdef CONFIG_ATH12K_AHB
+int ath12k_ahb_init(void);
+void ath12k_ahb_exit(void);
+#else
+static inline int ath12k_ahb_init(void)
+{
+ return 0;
+}
+
+static inline void ath12k_ahb_exit(void) {};
+#endif
#endif
diff --git a/drivers/net/wireless/ath/ath12k/core.c b/drivers/net/wireless/ath/ath12k/core.c
index cbe4d6274768..62327b1dcc70 100644
--- a/drivers/net/wireless/ath/ath12k/core.c
+++ b/drivers/net/wireless/ath/ath12k/core.c
@@ -10,15 +10,18 @@
#include <linux/firmware.h>
#include <linux/of.h>
#include <linux/of_graph.h>
+#include "ahb.h"
#include "core.h"
#include "dp_tx.h"
#include "dp_rx.h"
#include "debug.h"
-#include "hif.h"
-#include "fw.h"
#include "debugfs.h"
+#include "fw.h"
+#include "hif.h"
+#include "pci.h"
#include "wow.h"
+static int ahb_err, pci_err;
unsigned int ath12k_debug_mask;
module_param_named(debug_mask, ath12k_debug_mask, uint, 0644);
MODULE_PARM_DESC(debug_mask, "Debugging mask");
@@ -1992,5 +1995,31 @@ struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size,
return NULL;
}
-MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11be wireless LAN cards.");
+static int ath12k_init(void)
+{
+ ahb_err = ath12k_ahb_init();
+ if (ahb_err)
+ pr_warn("Failed to initialize ath12k AHB device: %d\n", ahb_err);
+
+ pci_err = ath12k_pci_init();
+ if (pci_err)
+ pr_warn("Failed to initialize ath12k PCI device: %d\n", pci_err);
+
+ /* If both failed, return one of the failures (arbitrary) */
+ return ahb_err && pci_err ? ahb_err : 0;
+}
+
+static void ath12k_exit(void)
+{
+ if (!pci_err)
+ ath12k_pci_exit();
+
+ if (!ahb_err)
+ ath12k_ahb_exit();
+}
+
+module_init(ath12k_init)
+module_exit(ath12k_exit)
+
+MODULE_DESCRIPTION("Driver support for Qualcomm Technologies 802.11be WLAN devices");
MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/ath/ath12k/pci.c b/drivers/net/wireless/ath/ath12k/pci.c
index 6c6a3cabab32..b4b7201e1b53 100644
--- a/drivers/net/wireless/ath/ath12k/pci.c
+++ b/drivers/net/wireless/ath/ath12k/pci.c
@@ -1822,7 +1822,7 @@ static struct pci_driver ath12k_pci_driver = {
.driver.pm = &ath12k_pci_pm_ops,
};
-static int ath12k_pci_init(void)
+int ath12k_pci_init(void)
{
int ret;
@@ -1835,14 +1835,8 @@ static int ath12k_pci_init(void)
return 0;
}
-module_init(ath12k_pci_init);
-static void ath12k_pci_exit(void)
+void ath12k_pci_exit(void)
{
pci_unregister_driver(&ath12k_pci_driver);
}
-
-module_exit(ath12k_pci_exit);
-
-MODULE_DESCRIPTION("Driver support for Qualcomm Technologies PCIe 802.11be WLAN devices");
-MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/ath/ath12k/pci.h b/drivers/net/wireless/ath/ath12k/pci.h
index 31584a7ad80e..521fa72333bb 100644
--- a/drivers/net/wireless/ath/ath12k/pci.h
+++ b/drivers/net/wireless/ath/ath12k/pci.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef ATH12K_PCI_H
#define ATH12K_PCI_H
@@ -145,4 +145,6 @@ void ath12k_pci_stop(struct ath12k_base *ab);
int ath12k_pci_start(struct ath12k_base *ab);
int ath12k_pci_power_up(struct ath12k_base *ab);
void ath12k_pci_power_down(struct ath12k_base *ab, bool is_suspend);
+int ath12k_pci_init(void);
+void ath12k_pci_exit(void);
#endif /* ATH12K_PCI_H */
--
2.34.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH v5 07/13] wifi: ath12k: add support for fixed QMI firmware memory
2025-01-30 4:35 ` [PATCH v5 07/13] wifi: ath12k: add support for fixed QMI firmware memory Raj Kumar Bhagat
@ 2025-01-30 7:46 ` Krzysztof Kozlowski
2025-02-03 9:44 ` Raj Kumar Bhagat
0 siblings, 1 reply; 35+ messages in thread
From: Krzysztof Kozlowski @ 2025-01-30 7:46 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel
On 30/01/2025 05:35, Raj Kumar Bhagat wrote:
> @@ -2646,6 +2663,136 @@ static int ath12k_qmi_alloc_target_mem_chunk(struct ath12k_base *ab)
> return ret;
> }
>
> +static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab)
> +{
> + struct device_node *mem_node;
> + struct resource res, m3_res;
> + u32 bdf_start_addr;
> + int i, idx, ret;
> +
> + for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) {
> + switch (ab->qmi.target_mem[i].type) {
> + case HOST_DDR_REGION_TYPE:
> + mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
Why cannot you use existing API for reserved memory -
of_reserved_mem_lookup()?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 08/13] wifi: ath12k: add AHB driver support for IPQ5332
2025-01-30 4:35 ` [PATCH v5 08/13] wifi: ath12k: add AHB driver support for IPQ5332 Raj Kumar Bhagat
@ 2025-01-30 7:57 ` Krzysztof Kozlowski
2025-02-04 15:45 ` Raj Kumar Bhagat
0 siblings, 1 reply; 35+ messages in thread
From: Krzysztof Kozlowski @ 2025-01-30 7:57 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Balamurugan S, P Praneesh
On 30/01/2025 05:35, Raj Kumar Bhagat wrote:
> +static int ath12k_ahb_clock_init(struct ath12k_base *ab)
> +{
> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
> + int ret;
> +
> + ab_ahb->xo_clk = devm_clk_get(ab->dev, "xo");
> + if (IS_ERR_OR_NULL(ab_ahb->xo_clk)) {
No, you are not supposed to use IS_ERR_OR_NULL(). That's indication of bug.
> + ret = ab_ahb->xo_clk ? PTR_ERR(ab_ahb->xo_clk) : -ENODEV;
I don't understand this. It's the third time you are reimplementing
standard code in some odd way, different than all other drivers.
Read the description of this function. Can clk_get return NULL? Of
course not. This is so overcomplicated for no reason, I wonder if it is
actually buggy here.
> + return dev_err_probe(&ab->pdev->dev, ret, "failed to get xo clock\n");
> + }
> +
> + return 0;
> +}
> +
> +static void ath12k_ahb_clock_deinit(struct ath12k_base *ab)
> +{
> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
> +
> + devm_clk_put(ab->dev, ab_ahb->xo_clk);
> + ab_ahb->xo_clk = NULL;
> +}
> +
> +static int ath12k_ahb_clock_enable(struct ath12k_base *ab)
> +{
> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
> + int ret;
> +
> + if (IS_ERR_OR_NULL(ab_ahb->xo_clk)) {
> + ath12k_err(ab, "clock is not initialized\n");
NAK.
Sorry, this code makes no sense. This is some random code. This code
cannot be executed before probe. If it can: your driver is buggy, so fix
your driver.
After the probe(), this is never NULL as an error. Either you have here
valid pointer or you failed the probe.
This driver fails on basics of driver probing.
> + return -EIO;
> + }
> +
> + ret = clk_prepare_enable(ab_ahb->xo_clk);
> + if (ret) {
> + ath12k_err(ab, "failed to enable gcc_xo_clk: %d\n", ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static void ath12k_ahb_clock_disable(struct ath12k_base *ab)
> +{
> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
> +
> + clk_disable_unprepare(ab_ahb->xo_clk);
Don't create such wrappers for single clock. Does not help.
> +}
> +
> +static int ath12k_ahb_resource_init(struct ath12k_base *ab)
> +{
> + struct platform_device *pdev = ab->pdev;
> + struct resource *mem_res;
> + int ret;
> +
> + ab->mem = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
> + if (IS_ERR(ab->mem)) {
> + ret = dev_err_probe(&pdev->dev, PTR_ERR(ab->mem), "ioremap error\n");
> + goto out;
> + }
> +
> + ab->mem_len = resource_size(mem_res);
> +
> + if (ab->hw_params->ce_remap) {
> + const struct ce_remap *ce_remap = ab->hw_params->ce_remap;
> + /* CE register space is moved out of WCSS and the space is not
> + * contiguous, hence remapping the CE registers to a new space
> + * for accessing them.
> + */
> + ab->mem_ce = ioremap(ce_remap->base, ce_remap->size);
> + if (IS_ERR(ab->mem_ce)) {
> + dev_err(&pdev->dev, "ce ioremap error\n");
> + ret = -ENOMEM;
> + goto err_mem_unmap;
> + }
> + ab->ce_remap = true;
> + ab->ce_remap_base_addr = HAL_IPQ5332_CE_WFSS_REG_BASE;
> + }
> +
> + ret = ath12k_ahb_clock_init(ab);
> + if (ret)
> + goto err_mem_ce_unmap;
> +
> + ret = ath12k_ahb_clock_enable(ab);
> + if (ret)
> + goto err_clock_deinit;
> +
> + return 0;
> +
> +err_clock_deinit:
> + ath12k_ahb_clock_deinit(ab);
> +
> +err_mem_ce_unmap:
> + if (ab->hw_params->ce_remap)
> + iounmap(ab->mem_ce);
> +
> +err_mem_unmap:
> + ab->mem_ce = NULL;
> + devm_iounmap(ab->dev, ab->mem);
> +
> +out:
> + ab->mem = NULL;
> + return ret;
> +}
> +
> +static void ath12k_ahb_resource_deinit(struct ath12k_base *ab)
> +{
> + if (ab->mem)
> + devm_iounmap(ab->dev, ab->mem);
> +
> + if (ab->mem_ce)
> + iounmap(ab->mem_ce);
> +
> + ab->mem = NULL;
> + ab->mem_ce = NULL;
> +
> + ath12k_ahb_clock_disable(ab);
> + ath12k_ahb_clock_deinit(ab);
> +}
> +
> +static enum ath12k_hw_rev ath12k_ahb_get_hw_rev(struct platform_device *pdev)
> +{
> + const struct of_device_id *of_id;
> +
> + of_id = of_match_device(ath12k_ahb_of_match, &pdev->dev);
> + if (!of_id) {
> + dev_err(&pdev->dev, "Failed to find matching device tree id\n");
> + return -EINVAL;
> + }
> +
> + return (enum ath12k_hw_rev)of_id->data;
You just open-coded of_device_get_match_data().
> +}
> +
> +static int ath12k_ahb_probe(struct platform_device *pdev)
> +{
> + struct ath12k_base *ab;
> + const struct ath12k_hif_ops *hif_ops;
> + struct device_node *mem_node;
> + enum ath12k_hw_rev hw_rev;
> + u32 addr;
> + int ret;
> +
> + hw_rev = ath12k_ahb_get_hw_rev(pdev);
> + switch (hw_rev) {
> + case ATH12K_HW_IPQ5332_HW10:
> + hif_ops = &ath12k_ahb_hif_ops_ipq5332;
> + break;
> + default:
> + return -EOPNOTSUPP;
> + }
> +
> + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
> + if (ret) {
> + dev_err(&pdev->dev, "Failed to set 32-bit coherent dma\n");
> + return ret;
> + }
> +
> + ab = ath12k_core_alloc(&pdev->dev, sizeof(struct ath12k_ahb),
> + ATH12K_BUS_AHB);
> + if (!ab) {
> + dev_err(&pdev->dev, "failed to allocate ath12k base\n");
No, driver never prints allocation errors. You are duplicating existing
core printk.
> + return -ENOMEM;
> + }
> +
> + ab->hif.ops = hif_ops;
> + ab->pdev = pdev;
> + ab->hw_rev = hw_rev;
> + platform_set_drvdata(pdev, ab);
> +
> + /* Set fixed_mem_region to true for platforms that support fixed memory
> + * reservation from DT. If memory is reserved from DT for FW, ath12k driver
> + * need not to allocate memory.
> + */
> + if (!of_property_read_u32(ab->dev->of_node, "memory-region", &addr)) {
> + set_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags);
> +
> + /* If the platform supports fixed memory, then it should define/
> + * reserve MLO global memory in DT to support Multi Link Operation
> + * (IEEE 802.11be).
> + * If MLO global memory is not reserved in fixed memory mode, then
> + * MLO cannot be supported.
> + */
> + mem_node = ath12k_core_get_reserved_mem_by_name(ab, "mlo-global-mem");
> + if (!mem_node)
> + ab->single_chip_mlo_supp = false;
> + else
> + of_node_put(mem_node);
> + }
> +
> + ret = ath12k_core_pre_init(ab);
> + if (ret)
> + goto err_core_free;
> +
> + ret = ath12k_ahb_resource_init(ab);
> + if (ret)
> + goto err_core_free;
> +
> + ret = ath12k_hal_srng_init(ab);
> + if (ret)
> + goto err_resource_deinit;
> +
> + ret = ath12k_ce_alloc_pipes(ab);
> + if (ret) {
> + ath12k_err(ab, "failed to allocate ce pipes: %d\n", ret);
> + goto err_hal_srng_deinit;
> + }
> +
> + ath12k_ahb_init_qmi_ce_config(ab);
> +
> + ret = ath12k_ahb_config_irq(ab);
> + if (ret) {
> + ath12k_err(ab, "failed to configure irq: %d\n", ret);
> + goto err_ce_free;
> + }
> +
> + ret = ath12k_core_init(ab);
> + if (ret) {
> + ath12k_err(ab, "failed to init core: %d\n", ret);
> + goto err_ce_free;
> + }
> +
> + return 0;
> +
> +err_ce_free:
> + ath12k_ce_free_pipes(ab);
> +
> +err_hal_srng_deinit:
> + ath12k_hal_srng_deinit(ab);
> +
> +err_resource_deinit:
> + ath12k_ahb_resource_deinit(ab);
> +
> +err_core_free:
> + ath12k_core_free(ab);
> + platform_set_drvdata(pdev, NULL);
> +
> + return ret;
> +}
> +
> +static void ath12k_ahb_remove_prepare(struct ath12k_base *ab)
> +{
> + unsigned long left;
> +
> + if (test_bit(ATH12K_FLAG_RECOVERY, &ab->dev_flags)) {
> + left = wait_for_completion_timeout(&ab->driver_recovery,
> + ATH12K_AHB_RECOVERY_TIMEOUT);
> + if (!left)
> + ath12k_warn(ab, "failed to receive recovery response completion\n");
> + }
> +
> + set_bit(ATH12K_FLAG_UNREGISTERING, &ab->dev_flags);
> + cancel_work_sync(&ab->restart_work);
> + cancel_work_sync(&ab->qmi.event_work);
> +}
> +
> +static void ath12k_ahb_free_resources(struct ath12k_base *ab)
> +{
> + struct platform_device *pdev = ab->pdev;
> +
> + ath12k_hal_srng_deinit(ab);
> + ath12k_ce_free_pipes(ab);
> + ath12k_ahb_resource_deinit(ab);
> + ath12k_core_free(ab);
> + platform_set_drvdata(pdev, NULL);
> +}
> +
> +static void ath12k_ahb_remove(struct platform_device *pdev)
> +{
> + struct ath12k_base *ab = platform_get_drvdata(pdev);
> +
> + if (test_bit(ATH12K_FLAG_QMI_FAIL, &ab->dev_flags)) {
> + ath12k_qmi_deinit_service(ab);
> + goto qmi_fail;
> + }
> +
> + ath12k_ahb_remove_prepare(ab);
> + ath12k_core_deinit(ab);
> +
> +qmi_fail:
> + ath12k_ahb_free_resources(ab);
> +}
> +
> +static void ath12k_ahb_shutdown(struct platform_device *pdev)
> +{
> + struct ath12k_base *ab = platform_get_drvdata(pdev);
> +
> + /* platform shutdown() & remove() are mutually exclusive.
> + * remove() is invoked during rmmod & shutdown() during
> + * system reboot/shutdown.
> + */
You should rather explain why you cannot use one callback for both. Why
this has to be duplicated?
> + ath12k_ahb_remove_prepare(ab);
> +
> + if (!(test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)))
> + goto free_resources;
> +
> + ath12k_core_deinit(ab);
And why this is actually different order than remove().
You
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 09/13] wifi: ath12k: Power up root PD
2025-01-30 4:35 ` [PATCH v5 09/13] wifi: ath12k: Power up root PD Raj Kumar Bhagat
@ 2025-01-30 7:58 ` Krzysztof Kozlowski
2025-02-04 16:16 ` Raj Kumar Bhagat
0 siblings, 1 reply; 35+ messages in thread
From: Krzysztof Kozlowski @ 2025-01-30 7:58 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Sowmiya Sree Elavalagan
On 30/01/2025 05:35, Raj Kumar Bhagat wrote:
> +
> +static void ath12k_ahb_unregister_rproc_notifier(struct ath12k_base *ab)
> +{
> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
> +
> + if (!ab_ahb->root_pd_notifier) {
> + ath12k_err(ab, "Rproc notifier not registered\n");
> + return;
> + }
> +
> + qcom_unregister_ssr_notifier(ab_ahb->root_pd_notifier,
> + &ab_ahb->root_pd_nb);
> + ab_ahb->root_pd_notifier = NULL;
> +}
> +
> +static int ath12k_ahb_get_rproc(struct ath12k_base *ab)
> +{
> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
> + struct device *dev = ab->dev;
> + struct device_node *np;
> + struct rproc *prproc;
> +
> + np = of_parse_phandle(dev->of_node, "qcom,rproc", 0);
> + if (!np) {
> + ath12k_err(ab, "failed to get q6_rproc handle\n");
> + return -ENOENT;
> + }
> +
> + prproc = rproc_get_by_phandle(np->phandle);
> + if (!prproc)
Nothing improved here - you still leak the reference.
> + return dev_err_probe(&ab->pdev->dev, -EPROBE_DEFER,
> + "failed to get rproc\n");
> +
> + ab_ahb->tgt_rproc = prproc;
And here.
> +
> + return 0;
> +}
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2025-01-30 4:34 ` [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module Raj Kumar Bhagat
@ 2025-01-30 8:28 ` Krzysztof Kozlowski
2025-01-30 8:40 ` Krzysztof Kozlowski
2025-02-03 9:05 ` Raj Kumar Bhagat
2025-01-30 19:07 ` Jeff Johnson
1 sibling, 2 replies; 35+ messages in thread
From: Krzysztof Kozlowski @ 2025-01-30 8:28 UTC (permalink / raw)
To: Raj Kumar Bhagat
Cc: ath12k, linux-wireless, Kalle Valo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jeff Johnson, devicetree,
linux-kernel
On Thu, Jan 30, 2025 at 10:04:56AM +0530, Raj Kumar Bhagat wrote:
> Add device-tree bindings for the ATH12K module found in the IPQ5332
> device.
>
> Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
> ---
> .../net/wireless/qcom,ath12k-ahb.yaml | 319 ++++++++++++++++++
> 1 file changed, 319 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
> new file mode 100644
> index 000000000000..bd953a028dc3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
Filename should match compatible. This binding does not look like
supporting more devices, so there is no much benefit calling it by generic name.
> @@ -0,0 +1,319 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/wireless/qcom,ath12k-ahb.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Technologies ath12k wireless devices (AHB)
> +
> +maintainers:
> + - Kalle Valo <kvalo@kernel.org>
> + - Jeff Johnson <jjohnson@kernel.org>
> +
> +description:
> + Qualcomm Technologies IEEE 802.11be AHB devices.
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,ipq5332-wifi
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: XO clock used for copy engine
> +
> + clock-names:
> + items:
> + - const: xo
> +
> + interrupts:
> + items:
> + - description: Fatal interrupt
> + - description: Ready interrupt
> + - description: Spawn acknowledge interrupt
> + - description: Stop acknowledge interrupt
> + - description: misc-pulse1 interrupt events
> + - description: misc-latch interrupt events
> + - description: sw exception interrupt events
> + - description: interrupt event for ring CE0
> + - description: interrupt event for ring CE1
> + - description: interrupt event for ring CE2
> + - description: interrupt event for ring CE3
> + - description: interrupt event for ring CE4
> + - description: interrupt event for ring CE5
> + - description: interrupt event for ring CE6
> + - description: interrupt event for ring CE7
> + - description: interrupt event for ring CE8
> + - description: interrupt event for ring CE9
> + - description: interrupt event for ring CE10
> + - description: interrupt event for ring CE11
> + - description: interrupt event for ring host2wbm-desc-feed
> + - description: interrupt event for ring host2reo-re-injection
> + - description: interrupt event for ring host2reo-command
> + - description: interrupt event for ring host2rxdma-monitor-ring1
> + - description: interrupt event for ring reo2ost-exception
> + - description: interrupt event for ring wbm2host-rx-release
> + - description: interrupt event for ring reo2host-status
> + - description: interrupt event for ring reo2host-destination-ring4
> + - description: interrupt event for ring reo2host-destination-ring3
> + - description: interrupt event for ring reo2host-destination-ring2
> + - description: interrupt event for ring reo2host-destination-ring1
> + - description: interrupt event for ring rxdma2host-monitor-destination-mac3
> + - description: interrupt event for ring rxdma2host-monitor-destination-mac2
> + - description: interrupt event for ring rxdma2host-monitor-destination-mac1
> + - description: interrupt event for ring host2rxdma-host-buf-ring-mac3
> + - description: interrupt event for ring host2rxdma-host-buf-ring-mac2
> + - description: interrupt event for ring host2rxdma-host-buf-ring-mac1
> + - description: interrupt event for ring host2tcl-input-ring4
> + - description: interrupt event for ring host2tcl-input-ring3
> + - description: interrupt event for ring host2tcl-input-ring2
> + - description: interrupt event for ring host2tcl-input-ring1
> + - description: interrupt event for ring wbm2host-tx-completions-ring4
> + - description: interrupt event for ring wbm2host-tx-completions-ring3
> + - description: interrupt event for ring wbm2host-tx-completions-ring2
> + - description: interrupt event for ring wbm2host-tx-completions-ring1
> + - description: interrupt event for ring host2tx-monitor-ring1
> + - description: interrupt event for ring txmon2host-monitor-destination-mac3
> + - description: interrupt event for ring txmon2host-monitor-destination-mac2
> + - description: interrupt event for ring txmon2host-monitor-destination-mac1
> + - description: interrupt event for umac-reset
> +
> + interrupt-names:
> + items:
> + - const: fatal
> + - const: ready
> + - const: spawn
> + - const: stop-ack
> + - const: misc-pulse1
> + - const: misc-latch
> + - const: sw-exception
> + - const: ce0
> + - const: ce1
> + - const: ce2
> + - const: ce3
> + - const: ce4
> + - const: ce5
> + - const: ce6
> + - const: ce7
> + - const: ce8
> + - const: ce9
> + - const: ce10
> + - const: ce11
> + - const: host2wbm-desc-feed
> + - const: host2reo-re-injection
> + - const: host2reo-command
> + - const: host2rxdma-monitor-ring1
> + - const: reo2ost-exception
> + - const: wbm2host-rx-release
> + - const: reo2host-status
> + - const: reo2host-destination-ring4
> + - const: reo2host-destination-ring3
> + - const: reo2host-destination-ring2
> + - const: reo2host-destination-ring1
> + - const: rxdma2host-monitor-destination-mac3
> + - const: rxdma2host-monitor-destination-mac2
> + - const: rxdma2host-monitor-destination-mac1
> + - const: host2rxdma-host-buf-ring-mac3
> + - const: host2rxdma-host-buf-ring-mac2
> + - const: host2rxdma-host-buf-ring-mac1
> + - const: host2tcl-input-ring4
> + - const: host2tcl-input-ring3
> + - const: host2tcl-input-ring2
> + - const: host2tcl-input-ring1
> + - const: wbm2host-tx-completions-ring4
> + - const: wbm2host-tx-completions-ring3
> + - const: wbm2host-tx-completions-ring2
> + - const: wbm2host-tx-completions-ring1
> + - const: host2tx-monitor-ring1
> + - const: txmon2host-monitor-destination-mac3
> + - const: txmon2host-monitor-destination-mac2
> + - const: txmon2host-monitor-destination-mac1
> + - const: umac-reset
> +
> + memory-region:
> + description:
> + phandle to a node describing reserved memory (System RAM memory)
> + used by ath12k firmware (see bindings/reserved-memory/reserved-memory.txt)
Do not say what DT syntax is, so "phandle to a node" is redundant,
reserved-memory.txt is redundant. The only useful part here is "used by
ath12k firmware", so based on this none of below are used by the driver
and driver just passes them to the firmware?
> + items:
> + - description: Q6 memory region
> + - description: m3 dump memory region
> + - description: Q6 caldata memory region
> + - description: Multi Link Operation (MLO) Global memory region
> +
> + memory-region-names:
> + description:
> + Name of the reserved memory region used by ath12k firmware
Drop description.
> + items:
> + - const: q6-region
> + - const: m3-dump
> + - const: q6-caldb
> + - const: mlo-global-mem
> +
> + qcom,ath12k-calibration-variant:
> + $ref: /schemas/types.yaml#/definitions/string
Why this is named after ath12k? Why this is just not
"qcom,calibration-variant"? None of the other properties have ath12k in
their names, so why this one in the WSI schema was named like that?
> + description:
> + String to uniquely identify variant of the calibration data for designs
> + with colliding bus and device ids
I don't think this property is here possible. How could you have on the
same SoC different devices?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2025-01-30 8:28 ` Krzysztof Kozlowski
@ 2025-01-30 8:40 ` Krzysztof Kozlowski
2025-02-03 8:43 ` Raj Kumar Bhagat
2025-02-03 9:05 ` Raj Kumar Bhagat
1 sibling, 1 reply; 35+ messages in thread
From: Krzysztof Kozlowski @ 2025-01-30 8:40 UTC (permalink / raw)
To: Raj Kumar Bhagat
Cc: ath12k, linux-wireless, Kalle Valo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jeff Johnson, devicetree,
linux-kernel
On 30/01/2025 09:28, Krzysztof Kozlowski wrote:
> On Thu, Jan 30, 2025 at 10:04:56AM +0530, Raj Kumar Bhagat wrote:
>> Add device-tree bindings for the ATH12K module found in the IPQ5332
>> device.
>>
>> Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
>> ---
>> .../net/wireless/qcom,ath12k-ahb.yaml | 319 ++++++++++++++++++
>> 1 file changed, 319 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>> new file mode 100644
>> index 000000000000..bd953a028dc3
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>
> Filename should match compatible. This binding does not look like
> supporting more devices, so there is no much benefit calling it by generic name.
I saw now your other patchset, so you have here two devices, but I still
do not understand why this cannot follow standard naming practice like
most bindings supporting one or more devices. Like every review we give.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2025-01-30 4:34 ` [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module Raj Kumar Bhagat
2025-01-30 8:28 ` Krzysztof Kozlowski
@ 2025-01-30 19:07 ` Jeff Johnson
2025-02-03 9:07 ` Raj Kumar Bhagat
1 sibling, 1 reply; 35+ messages in thread
From: Jeff Johnson @ 2025-01-30 19:07 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel
On 1/29/2025 8:34 PM, Raj Kumar Bhagat wrote:
> Add device-tree bindings for the ATH12K module found in the IPQ5332
> device.
>
> Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
> ---
> .../net/wireless/qcom,ath12k-ahb.yaml | 319 ++++++++++++++++++
> 1 file changed, 319 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
> new file mode 100644
> index 000000000000..bd953a028dc3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
> @@ -0,0 +1,319 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/wireless/qcom,ath12k-ahb.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Technologies ath12k wireless devices (AHB)
> +
> +maintainers:
> + - Kalle Valo <kvalo@kernel.org>
sadly, you should remove Kalle since he resigned as a maintainer this week
> + - Jeff Johnson <jjohnson@kernel.org>
> +
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2025-01-30 8:40 ` Krzysztof Kozlowski
@ 2025-02-03 8:43 ` Raj Kumar Bhagat
2025-02-03 10:05 ` Krzysztof Kozlowski
0 siblings, 1 reply; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-02-03 8:43 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: ath12k, linux-wireless, Kalle Valo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jeff Johnson, devicetree,
linux-kernel
On 1/30/2025 2:10 PM, Krzysztof Kozlowski wrote:
> On 30/01/2025 09:28, Krzysztof Kozlowski wrote:
>> On Thu, Jan 30, 2025 at 10:04:56AM +0530, Raj Kumar Bhagat wrote:
>>> Add device-tree bindings for the ATH12K module found in the IPQ5332
>>> device.
>>>
>>> Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
>>> ---
>>> .../net/wireless/qcom,ath12k-ahb.yaml | 319 ++++++++++++++++++
>>> 1 file changed, 319 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>>> new file mode 100644
>>> index 000000000000..bd953a028dc3
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>>
>> Filename should match compatible. This binding does not look like
>> supporting more devices, so there is no much benefit calling it by generic name.
>
>
> I saw now your other patchset, so you have here two devices, but I still
> do not understand why this cannot follow standard naming practice like
> most bindings supporting one or more devices. Like every review we give.
>
Sure, we can rename the filename to match the compatibles - "qcom,ipq5x-wifi.yaml".
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2025-01-30 8:28 ` Krzysztof Kozlowski
2025-01-30 8:40 ` Krzysztof Kozlowski
@ 2025-02-03 9:05 ` Raj Kumar Bhagat
2025-02-03 10:09 ` Krzysztof Kozlowski
1 sibling, 1 reply; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-02-03 9:05 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: ath12k, linux-wireless, Kalle Valo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jeff Johnson, devicetree,
linux-kernel
On 1/30/2025 1:58 PM, Krzysztof Kozlowski wrote:
>> + memory-region:
>> + description:
>> + phandle to a node describing reserved memory (System RAM memory)
>> + used by ath12k firmware (see bindings/reserved-memory/reserved-memory.txt)
> Do not say what DT syntax is, so "phandle to a node" is redundant,
> reserved-memory.txt is redundant. The only useful part here is "used by
> ath12k firmware", so based on this none of below are used by the driver
> and driver just passes them to the firmware?
>
Sure, will rephrase the description.
These reserved memory-regions are utilized by the ath12k firmware. The ath12k driver
stores these memory addresses solely for the purpose of collecting crash dumps
(RAM dumps) when the firmware encounters a crash.
>> + items:
>> + - description: Q6 memory region
>> + - description: m3 dump memory region
>> + - description: Q6 caldata memory region
>> + - description: Multi Link Operation (MLO) Global memory region
>> +
>> + memory-region-names:
>> + description:
>> + Name of the reserved memory region used by ath12k firmware
> Drop description.
>
Sure.
>> + items:
>> + - const: q6-region
>> + - const: m3-dump
>> + - const: q6-caldb
>> + - const: mlo-global-mem
>> +
>> + qcom,ath12k-calibration-variant:
>> + $ref: /schemas/types.yaml#/definitions/string
> Why this is named after ath12k? Why this is just not
> "qcom,calibration-variant"? None of the other properties have ath12k in
> their names, so why this one in the WSI schema was named like that?
>
This property is added after the below comment.
https://lore.kernel.org/all/qzjgpwemwaknwbs3dwils6kaa5c3inabfvkaryvc32kblzfhy3@6yduooj4dk63/
This `ath12k` in the name of this property is inherited from the 'qcom,ath10k.yaml' and
'qcom,ath11k.yaml'. Same was followed for WSI schema as well.
>> + description:
>> + String to uniquely identify variant of the calibration data for designs
>> + with colliding bus and device ids
> I don't think this property is here possible. How could you have on the
> same SoC different devices?
The WiFi controller in the SoC includes an internal or external Front-End Module (FEM).
These FEMs can vary and require different calibration data. This property uniquely
identify the variant of calibration data required by a FEM.
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2025-01-30 19:07 ` Jeff Johnson
@ 2025-02-03 9:07 ` Raj Kumar Bhagat
0 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-02-03 9:07 UTC (permalink / raw)
To: Jeff Johnson, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel
On 1/31/2025 12:37 AM, Jeff Johnson wrote:
> On 1/29/2025 8:34 PM, Raj Kumar Bhagat wrote:
>> Add device-tree bindings for the ATH12K module found in the IPQ5332
>> device.
>>
>> Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
>> ---
>> .../net/wireless/qcom,ath12k-ahb.yaml | 319 ++++++++++++++++++
>> 1 file changed, 319 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>> new file mode 100644
>> index 000000000000..bd953a028dc3
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>> @@ -0,0 +1,319 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +# Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/net/wireless/qcom,ath12k-ahb.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Technologies ath12k wireless devices (AHB)
>> +
>> +maintainers:
>> + - Kalle Valo <kvalo@kernel.org>
>
> sadly, you should remove Kalle since he resigned as a maintainer this week
>
Will update.
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 07/13] wifi: ath12k: add support for fixed QMI firmware memory
2025-01-30 7:46 ` Krzysztof Kozlowski
@ 2025-02-03 9:44 ` Raj Kumar Bhagat
2025-02-03 10:12 ` Krzysztof Kozlowski
0 siblings, 1 reply; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-02-03 9:44 UTC (permalink / raw)
To: Krzysztof Kozlowski, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel
On 1/30/2025 1:16 PM, Krzysztof Kozlowski wrote:
> On 30/01/2025 05:35, Raj Kumar Bhagat wrote:
>> @@ -2646,6 +2663,136 @@ static int ath12k_qmi_alloc_target_mem_chunk(struct ath12k_base *ab)
>> return ret;
>> }
>>
>> +static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab)
>> +{
>> + struct device_node *mem_node;
>> + struct resource res, m3_res;
>> + u32 bdf_start_addr;
>> + int i, idx, ret;
>> +
>> + for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) {
>> + switch (ab->qmi.target_mem[i].type) {
>> + case HOST_DDR_REGION_TYPE:
>> + mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
>
>
> Why cannot you use existing API for reserved memory -
> of_reserved_mem_lookup()?
>
The of_reserved_mem_lookup() requires reserved memory node to read the memory and
return in the structure "struct reserved_mem".
The of_reserved_mem_lookup() would be used after we get the reserved memory node
using the API - ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
In next version we would use of_reserved_mem_lookup(), Something like below:
mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
struct reserved_mem res = of_reserved_mem_lookup(mem_node)
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2025-02-03 8:43 ` Raj Kumar Bhagat
@ 2025-02-03 10:05 ` Krzysztof Kozlowski
2025-02-03 10:27 ` Raj Kumar Bhagat
0 siblings, 1 reply; 35+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-03 10:05 UTC (permalink / raw)
To: Raj Kumar Bhagat
Cc: ath12k, linux-wireless, Kalle Valo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jeff Johnson, devicetree,
linux-kernel
On 03/02/2025 09:43, Raj Kumar Bhagat wrote:
> On 1/30/2025 2:10 PM, Krzysztof Kozlowski wrote:
>> On 30/01/2025 09:28, Krzysztof Kozlowski wrote:
>>> On Thu, Jan 30, 2025 at 10:04:56AM +0530, Raj Kumar Bhagat wrote:
>>>> Add device-tree bindings for the ATH12K module found in the IPQ5332
>>>> device.
>>>>
>>>> Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
>>>> ---
>>>> .../net/wireless/qcom,ath12k-ahb.yaml | 319 ++++++++++++++++++
>>>> 1 file changed, 319 insertions(+)
>>>> create mode 100644 Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>>>> new file mode 100644
>>>> index 000000000000..bd953a028dc3
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>>>
>>> Filename should match compatible. This binding does not look like
>>> supporting more devices, so there is no much benefit calling it by generic name.
>>
>>
>> I saw now your other patchset, so you have here two devices, but I still
>> do not understand why this cannot follow standard naming practice like
>> most bindings supporting one or more devices. Like every review we give.
>>
>
> Sure, we can rename the filename to match the compatibles - "qcom,ipq5x-wifi.yaml".
No:
>>> Filename should match compatible.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2025-02-03 9:05 ` Raj Kumar Bhagat
@ 2025-02-03 10:09 ` Krzysztof Kozlowski
2025-02-04 5:57 ` Raj Kumar Bhagat
0 siblings, 1 reply; 35+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-03 10:09 UTC (permalink / raw)
To: Raj Kumar Bhagat
Cc: ath12k, linux-wireless, Kalle Valo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jeff Johnson, devicetree,
linux-kernel
On 03/02/2025 10:05, Raj Kumar Bhagat wrote:
>
>>> + items:
>>> + - const: q6-region
>>> + - const: m3-dump
>>> + - const: q6-caldb
>>> + - const: mlo-global-mem
>>> +
>>> + qcom,ath12k-calibration-variant:
>>> + $ref: /schemas/types.yaml#/definitions/string
>> Why this is named after ath12k? Why this is just not
>> "qcom,calibration-variant"? None of the other properties have ath12k in
>> their names, so why this one in the WSI schema was named like that?
>>
>
> This property is added after the below comment.
> https://lore.kernel.org/all/qzjgpwemwaknwbs3dwils6kaa5c3inabfvkaryvc32kblzfhy3@6yduooj4dk63/
>
> This `ath12k` in the name of this property is inherited from the 'qcom,ath10k.yaml' and
> 'qcom,ath11k.yaml'. Same was followed for WSI schema as well.
They do not have ath12k prefix in the name, so I don't understand.
People, start re-using properties, not creating one per each binding.
>
>>> + description:
>>> + String to uniquely identify variant of the calibration data for designs
>>> + with colliding bus and device ids
>> I don't think this property is here possible. How could you have on the
>> same SoC different devices?
>
> The WiFi controller in the SoC includes an internal or external Front-End Module (FEM).
> These FEMs can vary and require different calibration data. This property uniquely
1. So exactly the same SoC package has different FEMs?
2. How does it exactly work? Different bins? Different revisions?
3. How is it supposed to work in practice - you have one board, but
might have different SoCs inside? Which calibration data would you use
in such case?
> identify the variant of calibration data required by a FEM.
>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 07/13] wifi: ath12k: add support for fixed QMI firmware memory
2025-02-03 9:44 ` Raj Kumar Bhagat
@ 2025-02-03 10:12 ` Krzysztof Kozlowski
2025-02-04 9:06 ` Raj Kumar Bhagat
0 siblings, 1 reply; 35+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-03 10:12 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel
On 03/02/2025 10:44, Raj Kumar Bhagat wrote:
> On 1/30/2025 1:16 PM, Krzysztof Kozlowski wrote:
>> On 30/01/2025 05:35, Raj Kumar Bhagat wrote:
>>> @@ -2646,6 +2663,136 @@ static int ath12k_qmi_alloc_target_mem_chunk(struct ath12k_base *ab)
>>> return ret;
>>> }
>>>
>>> +static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab)
>>> +{
>>> + struct device_node *mem_node;
>>> + struct resource res, m3_res;
>>> + u32 bdf_start_addr;
>>> + int i, idx, ret;
>>> +
>>> + for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) {
>>> + switch (ab->qmi.target_mem[i].type) {
>>> + case HOST_DDR_REGION_TYPE:
>>> + mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
>>
>>
>> Why cannot you use existing API for reserved memory -
>> of_reserved_mem_lookup()?
>>
>
> The of_reserved_mem_lookup() requires reserved memory node to read the memory and
> return in the structure "struct reserved_mem".
>
> The of_reserved_mem_lookup() would be used after we get the reserved memory node
> using the API - ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
>
> In next version we would use of_reserved_mem_lookup(), Something like below:
> mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
Then why do you need ath12k_core_get_reserved_mem_by_name() in the first
place? Just use of_reserved_mem_lookup() directly. Why do you need to
parse phandle before of_reserved_mem_lookup()?
> struct reserved_mem res = of_reserved_mem_lookup(mem_node)
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2025-02-03 10:05 ` Krzysztof Kozlowski
@ 2025-02-03 10:27 ` Raj Kumar Bhagat
0 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-02-03 10:27 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: ath12k, linux-wireless, Kalle Valo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jeff Johnson, devicetree,
linux-kernel
On 2/3/2025 3:35 PM, Krzysztof Kozlowski wrote:
> On 03/02/2025 09:43, Raj Kumar Bhagat wrote:
>> On 1/30/2025 2:10 PM, Krzysztof Kozlowski wrote:
>>> On 30/01/2025 09:28, Krzysztof Kozlowski wrote:
>>>> On Thu, Jan 30, 2025 at 10:04:56AM +0530, Raj Kumar Bhagat wrote:
>>>>> Add device-tree bindings for the ATH12K module found in the IPQ5332
>>>>> device.
>>>>>
>>>>> Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
>>>>> ---
>>>>> .../net/wireless/qcom,ath12k-ahb.yaml | 319 ++++++++++++++++++
>>>>> 1 file changed, 319 insertions(+)
>>>>> create mode 100644 Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>>>>> new file mode 100644
>>>>> index 000000000000..bd953a028dc3
>>>>> --- /dev/null
>>>>> +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
>>>>
>>>> Filename should match compatible. This binding does not look like
>>>> supporting more devices, so there is no much benefit calling it by generic name.
>>>
>>>
>>> I saw now your other patchset, so you have here two devices, but I still
>>> do not understand why this cannot follow standard naming practice like
>>> most bindings supporting one or more devices. Like every review we give.
>>>
>>
>> Sure, we can rename the filename to match the compatibles - "qcom,ipq5x-wifi.yaml".
>
> No:
>
>>>> Filename should match compatible.
>
>
Ok, will rename to - "qcom,ipq5332-wifi.yaml"
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2025-02-03 10:09 ` Krzysztof Kozlowski
@ 2025-02-04 5:57 ` Raj Kumar Bhagat
2025-02-04 7:30 ` Krzysztof Kozlowski
0 siblings, 1 reply; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-02-04 5:57 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: ath12k, linux-wireless, Kalle Valo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jeff Johnson, devicetree,
linux-kernel
On 2/3/2025 3:39 PM, Krzysztof Kozlowski wrote:
> On 03/02/2025 10:05, Raj Kumar Bhagat wrote:
>>
>>>> + items:
>>>> + - const: q6-region
>>>> + - const: m3-dump
>>>> + - const: q6-caldb
>>>> + - const: mlo-global-mem
>>>> +
>>>> + qcom,ath12k-calibration-variant:
>>>> + $ref: /schemas/types.yaml#/definitions/string
>>> Why this is named after ath12k? Why this is just not
>>> "qcom,calibration-variant"? None of the other properties have ath12k in
>>> their names, so why this one in the WSI schema was named like that?
>>>
>>
>> This property is added after the below comment.
>> https://lore.kernel.org/all/qzjgpwemwaknwbs3dwils6kaa5c3inabfvkaryvc32kblzfhy3@6yduooj4dk63/
>>
>> This `ath12k` in the name of this property is inherited from the 'qcom,ath10k.yaml' and
>> 'qcom,ath11k.yaml'. Same was followed for WSI schema as well.
>
> They do not have ath12k prefix in the name, so I don't understand.
>
I meant that, 'qcom,ath10k.yaml' has qcom,ath10k-calibration-variant and
'qcom,ath11k.yaml' has qcom,ath11k-calibration-variant. The same name pattern
has been inherited.
> People, start re-using properties, not creating one per each binding.
>
>>
>>>> + description:
>>>> + String to uniquely identify variant of the calibration data for designs
>>>> + with colliding bus and device ids
>>> I don't think this property is here possible. How could you have on the
>>> same SoC different devices?
>>
>> The WiFi controller in the SoC includes an internal or external Front-End Module (FEM).
>> These FEMs can vary and require different calibration data. This property uniquely
>
> 1. So exactly the same SoC package has different FEMs?
>
Yes, the WiFi component of the same SoC package can have different FEMs.
> 2. How does it exactly work? Different bins? Different revisions?
>
The calibration board data for different variant are packed into firmware binary 'board-2.bin'.
Thus, board-2.bin can contain multiple board data for various variants. Ath12k driver selects
the correct board data based on the variant. The "qcom,ath12k-calibration-variant" is used
as one of the parameter to select the correct board data from board-2.bin.
> 3. How is it supposed to work in practice - you have one board, but
> might have different SoCs inside? Which calibration data would you use
> in such case?
>
The SoC in the following statement 'you have one board, but might have different SoCs inside'
, I am assuming SoC to be WiFi controller/component.
Consider, if we have two WiFi (qcom,ipq5332-wifi) controller with different FEM in IPQ5332 board.
Then in the DTS we have two wifi node. Each wifi node in DTS will have different value for
'qcom,ath12k-calibration-variant'. With the help of this property driver will be able to
download the correct calibration board data from board-2.bin.
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2025-02-04 5:57 ` Raj Kumar Bhagat
@ 2025-02-04 7:30 ` Krzysztof Kozlowski
0 siblings, 0 replies; 35+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-04 7:30 UTC (permalink / raw)
To: Raj Kumar Bhagat
Cc: ath12k, linux-wireless, Kalle Valo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jeff Johnson, devicetree,
linux-kernel
On 04/02/2025 06:57, Raj Kumar Bhagat wrote:
>
> The calibration board data for different variant are packed into firmware binary 'board-2.bin'.
> Thus, board-2.bin can contain multiple board data for various variants. Ath12k driver selects
> the correct board data based on the variant. The "qcom,ath12k-calibration-variant" is used
> as one of the parameter to select the correct board data from board-2.bin.
>
>> 3. How is it supposed to work in practice - you have one board, but
>> might have different SoCs inside? Which calibration data would you use
>> in such case?
>>
>
> The SoC in the following statement 'you have one board, but might have different SoCs inside'
> , I am assuming SoC to be WiFi controller/component.
>
> Consider, if we have two WiFi (qcom,ipq5332-wifi) controller with different FEM in IPQ5332 board.
> Then in the DTS we have two wifi node. Each wifi node in DTS will have different value for
> 'qcom,ath12k-calibration-variant'. With the help of this property driver will be able to
> download the correct calibration board data from board-2.bin.
Indeed, that makes sense. Thanks for explanation.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 07/13] wifi: ath12k: add support for fixed QMI firmware memory
2025-02-03 10:12 ` Krzysztof Kozlowski
@ 2025-02-04 9:06 ` Raj Kumar Bhagat
2025-02-05 9:07 ` Krzysztof Kozlowski
0 siblings, 1 reply; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-02-04 9:06 UTC (permalink / raw)
To: Krzysztof Kozlowski, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel
On 2/3/2025 3:42 PM, Krzysztof Kozlowski wrote:
> On 03/02/2025 10:44, Raj Kumar Bhagat wrote:
>> On 1/30/2025 1:16 PM, Krzysztof Kozlowski wrote:
>>> On 30/01/2025 05:35, Raj Kumar Bhagat wrote:
>>>> @@ -2646,6 +2663,136 @@ static int ath12k_qmi_alloc_target_mem_chunk(struct ath12k_base *ab)
>>>> return ret;
>>>> }
>>>>
>>>> +static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab)
>>>> +{
>>>> + struct device_node *mem_node;
>>>> + struct resource res, m3_res;
>>>> + u32 bdf_start_addr;
>>>> + int i, idx, ret;
>>>> +
>>>> + for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) {
>>>> + switch (ab->qmi.target_mem[i].type) {
>>>> + case HOST_DDR_REGION_TYPE:
>>>> + mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
>>>
>>>
>>> Why cannot you use existing API for reserved memory -
>>> of_reserved_mem_lookup()?
>>>
>>
>> The of_reserved_mem_lookup() requires reserved memory node to read the memory and
>> return in the structure "struct reserved_mem".
>>
>> The of_reserved_mem_lookup() would be used after we get the reserved memory node
>> using the API - ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
>>
>> In next version we would use of_reserved_mem_lookup(), Something like below:
>> mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
>
> Then why do you need ath12k_core_get_reserved_mem_by_name() in the first
> place? Just use of_reserved_mem_lookup() directly. Why do you need to
> parse phandle before of_reserved_mem_lookup()?
>
Sorry, I'm having difficulty understanding this.
We have the WiFi node at ab->dev->of_node, but we don't have a node for the reserved-memory
'q6-region'. The of_reserved_mem_lookup() function requires the device node for 'q6-region'.
Could you please suggest how we can use of_reserved_mem_lookup() without obtaining the
'q6-region' node first.
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 08/13] wifi: ath12k: add AHB driver support for IPQ5332
2025-01-30 7:57 ` Krzysztof Kozlowski
@ 2025-02-04 15:45 ` Raj Kumar Bhagat
0 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-02-04 15:45 UTC (permalink / raw)
To: Krzysztof Kozlowski, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Balamurugan S, P Praneesh
On 1/30/2025 1:27 PM, Krzysztof Kozlowski wrote:
> On 30/01/2025 05:35, Raj Kumar Bhagat wrote:
>> +static int ath12k_ahb_clock_init(struct ath12k_base *ab)
>> +{
>> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
>> + int ret;
>> +
>> + ab_ahb->xo_clk = devm_clk_get(ab->dev, "xo");
>> + if (IS_ERR_OR_NULL(ab_ahb->xo_clk)) {
>
> No, you are not supposed to use IS_ERR_OR_NULL(). That's indication of bug.
>
>> + ret = ab_ahb->xo_clk ? PTR_ERR(ab_ahb->xo_clk) : -ENODEV;
>
> I don't understand this. It's the third time you are reimplementing
> standard code in some odd way, different than all other drivers.
>
> Read the description of this function. Can clk_get return NULL? Of
> course not. This is so overcomplicated for no reason, I wonder if it is
> actually buggy here.
>
My bad, will update in next version.
>
>> + return dev_err_probe(&ab->pdev->dev, ret, "failed to get xo clock\n");
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static void ath12k_ahb_clock_deinit(struct ath12k_base *ab)
>> +{
>> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
>> +
>> + devm_clk_put(ab->dev, ab_ahb->xo_clk);
>> + ab_ahb->xo_clk = NULL;
>> +}
>> +
>> +static int ath12k_ahb_clock_enable(struct ath12k_base *ab)
>> +{
>> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
>> + int ret;
>> +
>> + if (IS_ERR_OR_NULL(ab_ahb->xo_clk)) {
>> + ath12k_err(ab, "clock is not initialized\n");
>
> NAK.
>
> Sorry, this code makes no sense. This is some random code. This code
> cannot be executed before probe. If it can: your driver is buggy, so fix
> your driver.
>
> After the probe(), this is never NULL as an error. Either you have here
> valid pointer or you failed the probe.
>
> This driver fails on basics of driver probing.
>
Will remove the above code in next version.
>> + return -EIO;
>> + }
>> +
>> + ret = clk_prepare_enable(ab_ahb->xo_clk);
>> + if (ret) {
>> + ath12k_err(ab, "failed to enable gcc_xo_clk: %d\n", ret);
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static void ath12k_ahb_clock_disable(struct ath12k_base *ab)
>> +{
>> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
>> +
>> + clk_disable_unprepare(ab_ahb->xo_clk);
>
> Don't create such wrappers for single clock. Does not help.
>
Sure, will remove the wrapper.
>> +}
>> +
>> +static int ath12k_ahb_resource_init(struct ath12k_base *ab)
>> +{
>> + struct platform_device *pdev = ab->pdev;
>> + struct resource *mem_res;
>> + int ret;
>> +
>> + ab->mem = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
>> + if (IS_ERR(ab->mem)) {
>> + ret = dev_err_probe(&pdev->dev, PTR_ERR(ab->mem), "ioremap error\n");
>> + goto out;
>> + }
>> +
>> + ab->mem_len = resource_size(mem_res);
>> +
>> + if (ab->hw_params->ce_remap) {
>> + const struct ce_remap *ce_remap = ab->hw_params->ce_remap;
>> + /* CE register space is moved out of WCSS and the space is not
>> + * contiguous, hence remapping the CE registers to a new space
>> + * for accessing them.
>> + */
>> + ab->mem_ce = ioremap(ce_remap->base, ce_remap->size);
>> + if (IS_ERR(ab->mem_ce)) {
>> + dev_err(&pdev->dev, "ce ioremap error\n");
>> + ret = -ENOMEM;
>> + goto err_mem_unmap;
>> + }
>> + ab->ce_remap = true;
>> + ab->ce_remap_base_addr = HAL_IPQ5332_CE_WFSS_REG_BASE;
>> + }
>> +
>> + ret = ath12k_ahb_clock_init(ab);
>> + if (ret)
>> + goto err_mem_ce_unmap;
>> +
>> + ret = ath12k_ahb_clock_enable(ab);
>> + if (ret)
>> + goto err_clock_deinit;
>> +
>> + return 0;
>> +
>> +err_clock_deinit:
>> + ath12k_ahb_clock_deinit(ab);
>> +
>> +err_mem_ce_unmap:
>> + if (ab->hw_params->ce_remap)
>> + iounmap(ab->mem_ce);
>> +
>> +err_mem_unmap:
>> + ab->mem_ce = NULL;
>> + devm_iounmap(ab->dev, ab->mem);
>> +
>> +out:
>> + ab->mem = NULL;
>> + return ret;
>> +}
>> +
>> +static void ath12k_ahb_resource_deinit(struct ath12k_base *ab)
>> +{
>> + if (ab->mem)
>> + devm_iounmap(ab->dev, ab->mem);
>> +
>> + if (ab->mem_ce)
>> + iounmap(ab->mem_ce);
>> +
>> + ab->mem = NULL;
>> + ab->mem_ce = NULL;
>> +
>> + ath12k_ahb_clock_disable(ab);
>> + ath12k_ahb_clock_deinit(ab);
>> +}
>> +
>> +static enum ath12k_hw_rev ath12k_ahb_get_hw_rev(struct platform_device *pdev)
>> +{
>> + const struct of_device_id *of_id;
>> +
>> + of_id = of_match_device(ath12k_ahb_of_match, &pdev->dev);
>> + if (!of_id) {
>> + dev_err(&pdev->dev, "Failed to find matching device tree id\n");
>> + return -EINVAL;
>> + }
>> +
>> + return (enum ath12k_hw_rev)of_id->data;
>
> You just open-coded of_device_get_match_data().
>
Thanks, will use of_device_get_match_data() in next version.
>> +}
>> +
>> +static int ath12k_ahb_probe(struct platform_device *pdev)
>> +{
>> + struct ath12k_base *ab;
>> + const struct ath12k_hif_ops *hif_ops;
>> + struct device_node *mem_node;
>> + enum ath12k_hw_rev hw_rev;
>> + u32 addr;
>> + int ret;
>> +
>> + hw_rev = ath12k_ahb_get_hw_rev(pdev);
>> + switch (hw_rev) {
>> + case ATH12K_HW_IPQ5332_HW10:
>> + hif_ops = &ath12k_ahb_hif_ops_ipq5332;
>> + break;
>> + default:
>> + return -EOPNOTSUPP;
>> + }
>> +
>> + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
>> + if (ret) {
>> + dev_err(&pdev->dev, "Failed to set 32-bit coherent dma\n");
>> + return ret;
>> + }
>> +
>> + ab = ath12k_core_alloc(&pdev->dev, sizeof(struct ath12k_ahb),
>> + ATH12K_BUS_AHB);
>> + if (!ab) {
>> + dev_err(&pdev->dev, "failed to allocate ath12k base\n");
>
> No, driver never prints allocation errors. You are duplicating existing
> core printk.
>
Thanks, will remove this error print.
>
>> + return -ENOMEM;
>> + }
>> +
>> + ab->hif.ops = hif_ops;
>> + ab->pdev = pdev;
>> + ab->hw_rev = hw_rev;
>> + platform_set_drvdata(pdev, ab);
>> +
>> + /* Set fixed_mem_region to true for platforms that support fixed memory
>> + * reservation from DT. If memory is reserved from DT for FW, ath12k driver
>> + * need not to allocate memory.
>> + */
>> + if (!of_property_read_u32(ab->dev->of_node, "memory-region", &addr)) {
>> + set_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags);
>> +
>> + /* If the platform supports fixed memory, then it should define/
>> + * reserve MLO global memory in DT to support Multi Link Operation
>> + * (IEEE 802.11be).
>> + * If MLO global memory is not reserved in fixed memory mode, then
>> + * MLO cannot be supported.
>> + */
>> + mem_node = ath12k_core_get_reserved_mem_by_name(ab, "mlo-global-mem");
>> + if (!mem_node)
>> + ab->single_chip_mlo_supp = false;
>> + else
>> + of_node_put(mem_node);
>> + }
>> +
>> + ret = ath12k_core_pre_init(ab);
>> + if (ret)
>> + goto err_core_free;
>> +
>> + ret = ath12k_ahb_resource_init(ab);
>> + if (ret)
>> + goto err_core_free;
>> +
>> + ret = ath12k_hal_srng_init(ab);
>> + if (ret)
>> + goto err_resource_deinit;
>> +
>> + ret = ath12k_ce_alloc_pipes(ab);
>> + if (ret) {
>> + ath12k_err(ab, "failed to allocate ce pipes: %d\n", ret);
>> + goto err_hal_srng_deinit;
>> + }
>> +
>> + ath12k_ahb_init_qmi_ce_config(ab);
>> +
>> + ret = ath12k_ahb_config_irq(ab);
>> + if (ret) {
>> + ath12k_err(ab, "failed to configure irq: %d\n", ret);
>> + goto err_ce_free;
>> + }
>> +
>> + ret = ath12k_core_init(ab);
>> + if (ret) {
>> + ath12k_err(ab, "failed to init core: %d\n", ret);
>> + goto err_ce_free;
>> + }
>> +
>> + return 0;
>> +
>> +err_ce_free:
>> + ath12k_ce_free_pipes(ab);
>> +
>> +err_hal_srng_deinit:
>> + ath12k_hal_srng_deinit(ab);
>> +
>> +err_resource_deinit:
>> + ath12k_ahb_resource_deinit(ab);
>> +
>> +err_core_free:
>> + ath12k_core_free(ab);
>> + platform_set_drvdata(pdev, NULL);
>> +
>> + return ret;
>> +}
>> +
>> +static void ath12k_ahb_remove_prepare(struct ath12k_base *ab)
>> +{
>> + unsigned long left;
>> +
>> + if (test_bit(ATH12K_FLAG_RECOVERY, &ab->dev_flags)) {
>> + left = wait_for_completion_timeout(&ab->driver_recovery,
>> + ATH12K_AHB_RECOVERY_TIMEOUT);
>> + if (!left)
>> + ath12k_warn(ab, "failed to receive recovery response completion\n");
>> + }
>> +
>> + set_bit(ATH12K_FLAG_UNREGISTERING, &ab->dev_flags);
>> + cancel_work_sync(&ab->restart_work);
>> + cancel_work_sync(&ab->qmi.event_work);
>> +}
>> +
>> +static void ath12k_ahb_free_resources(struct ath12k_base *ab)
>> +{
>> + struct platform_device *pdev = ab->pdev;
>> +
>> + ath12k_hal_srng_deinit(ab);
>> + ath12k_ce_free_pipes(ab);
>> + ath12k_ahb_resource_deinit(ab);
>> + ath12k_core_free(ab);
>> + platform_set_drvdata(pdev, NULL);
>> +}
>> +
>> +static void ath12k_ahb_remove(struct platform_device *pdev)
>> +{
>> + struct ath12k_base *ab = platform_get_drvdata(pdev);
>> +
>> + if (test_bit(ATH12K_FLAG_QMI_FAIL, &ab->dev_flags)) {
>> + ath12k_qmi_deinit_service(ab);
>> + goto qmi_fail;
>> + }
>> +
>> + ath12k_ahb_remove_prepare(ab);
>> + ath12k_core_deinit(ab);
>> +
>> +qmi_fail:
>> + ath12k_ahb_free_resources(ab);
>> +}
>> +
>> +static void ath12k_ahb_shutdown(struct platform_device *pdev)
>> +{
>> + struct ath12k_base *ab = platform_get_drvdata(pdev);
>> +
>> + /* platform shutdown() & remove() are mutually exclusive.
>> + * remove() is invoked during rmmod & shutdown() during
>> + * system reboot/shutdown.
>> + */
>
> You should rather explain why you cannot use one callback for both. Why
> this has to be duplicated?
>
>> + ath12k_ahb_remove_prepare(ab);
>> +
>> + if (!(test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)))
>> + goto free_resources;
>> +
>> + ath12k_core_deinit(ab);
>
> And why this is actually different order than remove().
>
The .shutdown() is not required for IPQ5332 wifi. In the next version
will remove the shutdown callback.
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 09/13] wifi: ath12k: Power up root PD
2025-01-30 7:58 ` Krzysztof Kozlowski
@ 2025-02-04 16:16 ` Raj Kumar Bhagat
0 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-02-04 16:16 UTC (permalink / raw)
To: Krzysztof Kozlowski, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel,
Sowmiya Sree Elavalagan
On 1/30/2025 1:28 PM, Krzysztof Kozlowski wrote:
> On 30/01/2025 05:35, Raj Kumar Bhagat wrote:
>> +
>> +static void ath12k_ahb_unregister_rproc_notifier(struct ath12k_base *ab)
>> +{
>> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
>> +
>> + if (!ab_ahb->root_pd_notifier) {
>> + ath12k_err(ab, "Rproc notifier not registered\n");
>> + return;
>> + }
>> +
>> + qcom_unregister_ssr_notifier(ab_ahb->root_pd_notifier,
>> + &ab_ahb->root_pd_nb);
>> + ab_ahb->root_pd_notifier = NULL;
>> +}
>> +
>> +static int ath12k_ahb_get_rproc(struct ath12k_base *ab)
>> +{
>> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
>> + struct device *dev = ab->dev;
>> + struct device_node *np;
>> + struct rproc *prproc;
>> +
>> + np = of_parse_phandle(dev->of_node, "qcom,rproc", 0);
>> + if (!np) {
>> + ath12k_err(ab, "failed to get q6_rproc handle\n");
>> + return -ENOENT;
>> + }
>> +
>> + prproc = rproc_get_by_phandle(np->phandle);
>> + if (!prproc)
>
> Nothing improved here - you still leak the reference.
>
Thanks, will take care of np refcount leak in next version.
>> + return dev_err_probe(&ab->pdev->dev, -EPROBE_DEFER,
>> + "failed to get rproc\n");
>> +
>> + ab_ahb->tgt_rproc = prproc;
>
> And here.
>
Thanks, will handle rproc refcount leak.
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 07/13] wifi: ath12k: add support for fixed QMI firmware memory
2025-02-04 9:06 ` Raj Kumar Bhagat
@ 2025-02-05 9:07 ` Krzysztof Kozlowski
2025-02-05 9:59 ` Raj Kumar Bhagat
0 siblings, 1 reply; 35+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-05 9:07 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel
On 04/02/2025 10:06, Raj Kumar Bhagat wrote:
> On 2/3/2025 3:42 PM, Krzysztof Kozlowski wrote:
>> On 03/02/2025 10:44, Raj Kumar Bhagat wrote:
>>> On 1/30/2025 1:16 PM, Krzysztof Kozlowski wrote:
>>>> On 30/01/2025 05:35, Raj Kumar Bhagat wrote:
>>>>> @@ -2646,6 +2663,136 @@ static int ath12k_qmi_alloc_target_mem_chunk(struct ath12k_base *ab)
>>>>> return ret;
>>>>> }
>>>>>
>>>>> +static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab)
>>>>> +{
>>>>> + struct device_node *mem_node;
>>>>> + struct resource res, m3_res;
>>>>> + u32 bdf_start_addr;
>>>>> + int i, idx, ret;
>>>>> +
>>>>> + for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) {
>>>>> + switch (ab->qmi.target_mem[i].type) {
>>>>> + case HOST_DDR_REGION_TYPE:
>>>>> + mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
>>>>
>>>>
>>>> Why cannot you use existing API for reserved memory -
>>>> of_reserved_mem_lookup()?
>>>>
>>>
>>> The of_reserved_mem_lookup() requires reserved memory node to read the memory and
>>> return in the structure "struct reserved_mem".
>>>
>>> The of_reserved_mem_lookup() would be used after we get the reserved memory node
>>> using the API - ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
>>>
>>> In next version we would use of_reserved_mem_lookup(), Something like below:
>>> mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
>>
>> Then why do you need ath12k_core_get_reserved_mem_by_name() in the first
>> place? Just use of_reserved_mem_lookup() directly. Why do you need to
>> parse phandle before of_reserved_mem_lookup()?
>>
>
> Sorry, I'm having difficulty understanding this.
> We have the WiFi node at ab->dev->of_node, but we don't have a node for the reserved-memory
> 'q6-region'. The of_reserved_mem_lookup() function requires the device node for 'q6-region'.
>
> Could you please suggest how we can use of_reserved_mem_lookup() without obtaining the
> 'q6-region' node first.
Hm, it seems you are not using it for this device, so indeed you need to
parse phandle. You can still code it simpler -
of_property_match_string() is not necessary and
of_address_to_resource()+of_node_put() could be in the
ath12k_core_get_reserved_mem()
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v5 07/13] wifi: ath12k: add support for fixed QMI firmware memory
2025-02-05 9:07 ` Krzysztof Kozlowski
@ 2025-02-05 9:59 ` Raj Kumar Bhagat
0 siblings, 0 replies; 35+ messages in thread
From: Raj Kumar Bhagat @ 2025-02-05 9:59 UTC (permalink / raw)
To: Krzysztof Kozlowski, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, devicetree, linux-kernel
On 2/5/2025 2:37 PM, Krzysztof Kozlowski wrote:
> On 04/02/2025 10:06, Raj Kumar Bhagat wrote:
>> On 2/3/2025 3:42 PM, Krzysztof Kozlowski wrote:
>>> On 03/02/2025 10:44, Raj Kumar Bhagat wrote:
>>>> On 1/30/2025 1:16 PM, Krzysztof Kozlowski wrote:
>>>>> On 30/01/2025 05:35, Raj Kumar Bhagat wrote:
>>>>>> @@ -2646,6 +2663,136 @@ static int ath12k_qmi_alloc_target_mem_chunk(struct ath12k_base *ab)
>>>>>> return ret;
>>>>>> }
>>>>>>
>>>>>> +static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab)
>>>>>> +{
>>>>>> + struct device_node *mem_node;
>>>>>> + struct resource res, m3_res;
>>>>>> + u32 bdf_start_addr;
>>>>>> + int i, idx, ret;
>>>>>> +
>>>>>> + for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) {
>>>>>> + switch (ab->qmi.target_mem[i].type) {
>>>>>> + case HOST_DDR_REGION_TYPE:
>>>>>> + mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
>>>>>
>>>>>
>>>>> Why cannot you use existing API for reserved memory -
>>>>> of_reserved_mem_lookup()?
>>>>>
>>>>
>>>> The of_reserved_mem_lookup() requires reserved memory node to read the memory and
>>>> return in the structure "struct reserved_mem".
>>>>
>>>> The of_reserved_mem_lookup() would be used after we get the reserved memory node
>>>> using the API - ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
>>>>
>>>> In next version we would use of_reserved_mem_lookup(), Something like below:
>>>> mem_node = ath12k_core_get_reserved_mem_by_name(ab, "q6-region");
>>>
>>> Then why do you need ath12k_core_get_reserved_mem_by_name() in the first
>>> place? Just use of_reserved_mem_lookup() directly. Why do you need to
>>> parse phandle before of_reserved_mem_lookup()?
>>>
>>
>> Sorry, I'm having difficulty understanding this.
>> We have the WiFi node at ab->dev->of_node, but we don't have a node for the reserved-memory
>> 'q6-region'. The of_reserved_mem_lookup() function requires the device node for 'q6-region'.
>>
>> Could you please suggest how we can use of_reserved_mem_lookup() without obtaining the
>> 'q6-region' node first.
>
>
> Hm, it seems you are not using it for this device, so indeed you need to
> parse phandle. You can still code it simpler -
> of_property_match_string() is not necessary and
> of_address_to_resource()+of_node_put() could be in the
> ath12k_core_get_reserved_mem()
>
Thanks, will make it simpler.
^ permalink raw reply [flat|nested] 35+ messages in thread
end of thread, other threads:[~2025-02-05 9:59 UTC | newest]
Thread overview: 35+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-01-30 4:34 [PATCH v5 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
2025-01-30 4:34 ` [PATCH v5 01/13] dt-bindings: net: wireless: describe the ath12k AHB module Raj Kumar Bhagat
2025-01-30 8:28 ` Krzysztof Kozlowski
2025-01-30 8:40 ` Krzysztof Kozlowski
2025-02-03 8:43 ` Raj Kumar Bhagat
2025-02-03 10:05 ` Krzysztof Kozlowski
2025-02-03 10:27 ` Raj Kumar Bhagat
2025-02-03 9:05 ` Raj Kumar Bhagat
2025-02-03 10:09 ` Krzysztof Kozlowski
2025-02-04 5:57 ` Raj Kumar Bhagat
2025-02-04 7:30 ` Krzysztof Kozlowski
2025-01-30 19:07 ` Jeff Johnson
2025-02-03 9:07 ` Raj Kumar Bhagat
2025-01-30 4:34 ` [PATCH v5 02/13] wifi: ath12k: fix incorrect CE addresses Raj Kumar Bhagat
2025-01-30 4:34 ` [PATCH v5 03/13] wifi: ath12k: refactor ath12k_hw_regs structure Raj Kumar Bhagat
2025-01-30 4:34 ` [PATCH v5 04/13] wifi: ath12k: add ath12k_hw_params for IPQ5332 Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 05/13] wifi: ath12k: avoid m3 firmware download in AHB device IPQ5332 Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 06/13] wifi: ath12k: Add hw_params to remap CE register space for IPQ5332 Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 07/13] wifi: ath12k: add support for fixed QMI firmware memory Raj Kumar Bhagat
2025-01-30 7:46 ` Krzysztof Kozlowski
2025-02-03 9:44 ` Raj Kumar Bhagat
2025-02-03 10:12 ` Krzysztof Kozlowski
2025-02-04 9:06 ` Raj Kumar Bhagat
2025-02-05 9:07 ` Krzysztof Kozlowski
2025-02-05 9:59 ` Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 08/13] wifi: ath12k: add AHB driver support for IPQ5332 Raj Kumar Bhagat
2025-01-30 7:57 ` Krzysztof Kozlowski
2025-02-04 15:45 ` Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 09/13] wifi: ath12k: Power up root PD Raj Kumar Bhagat
2025-01-30 7:58 ` Krzysztof Kozlowski
2025-02-04 16:16 ` Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 10/13] wifi: ath12k: Register various userPD interrupts and save SMEM entries Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 11/13] wifi: ath12k: Power up userPD Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 12/13] wifi: ath12k: Power down userPD Raj Kumar Bhagat
2025-01-30 4:35 ` [PATCH v5 13/13] wifi: ath12k: enable ath12k AHB support Raj Kumar Bhagat
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