From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Akhil R <akhilrajeev@nvidia.com>,
herbert@gondor.apana.org.au, davem@davemloft.net,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org, thierry.reding@gmail.com,
jonathanh@nvidia.com, catalin.marinas@arm.com, will@kernel.org,
mperttunen@nvidia.com, linux-crypto@vger.kernel.org,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, krzk@kernel.org
Subject: Re: [PATCH v2 1/5] dt-bindings: crypto: Add Tegra Security Engine
Date: Wed, 20 Dec 2023 16:44:47 +0100 [thread overview]
Message-ID: <fe87e220-560b-4d47-bc7f-cc7104d40921@linaro.org> (raw)
In-Reply-To: <20231219125614.33062-2-akhilrajeev@nvidia.com>
On 19/12/2023 13:56, Akhil R wrote:
> Add DT binding document for Tegra Security Engine.
> The AES and HASH algorithms are handled independently by separate
> engines within the Security Engine. These engines are registered
> as two separate crypto engine drivers.
>
> Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
> ---
> .../crypto/nvidia,tegra234-se-aes.yaml | 53 +++++++++++++++++++
> .../crypto/nvidia,tegra234-se-hash.yaml | 53 +++++++++++++++++++
> 2 files changed, 106 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-aes.yaml
> create mode 100644 Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-hash.yaml
>
> diff --git a/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-aes.yaml b/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-aes.yaml
> new file mode 100644
> index 000000000000..35c2e701bd42
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-aes.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/nvidia,tegra234-se-aes.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra Security Engine for AES algorithms
> +
> +description: |
Do not need '|' unless you need to preserve formatting.
> + The Tegra Security Engine accelerates the following AES encryption/decryption
> + algorithms.
s/./:/ and join lines? Wasn't that your intention here?
> + AES-ECB, AES-CBC, AES-OFB, AES-XTS, AES-CTR, AES-GCM, AES-CCM, AES-CMAC
> +
> +maintainers:
> + - Akhil R <akhilrajeev@nvidia.com>
> +
> +properties:
> + compatible:
> + const: nvidia,tegra234-se2-aes
Why "se2"?
Anyway, filename like compatible.
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + iommus:
> + maxItems: 1
> +
> + dma-coherent: true
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - iommus
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/memory/tegra234-mc.h>
> + #include <dt-bindings/clock/tegra234-clock.h>
> +
> + crypto@15820000 {
> + compatible = "nvidia,tegra234-se2-aes";
> + reg = <0x15820000 0x10000>;
> + clocks = <&bpmp TEGRA234_CLK_SE>;
> + iommus = <&smmu TEGRA234_SID_SES_SE1>;
> + dma-coherent;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-hash.yaml b/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-hash.yaml
> new file mode 100644
> index 000000000000..e3848e9a53b5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/nvidia,tegra234-se-hash.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/nvidia,tegra234-se-hash.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra Security Engine for HASH algorithms
> +
> +description: |
> + The Tegra Security HASH Engine accelerates the following HASH functions.
Similar comment
> + SHA1, SHA224, SHA256, SHA384, SHA512, SHA3-224, SHA3-256, SHA3-384, SHA3-512
> + HMAC(SHA224), HMAC(SHA256), HMAC(SHA384), HMAC(SHA512)
> +
> +maintainers:
> + - Akhil R <akhilrajeev@nvidia.com>
> +
> +properties:
> + compatible:
> + const: nvidia,tegra234-se4-hash
What is se4?
Anyway, filename like compatible.
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-12-20 15:44 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-19 12:56 [PATCH v2 0/5] Add Tegra Security Engine driver Akhil R
2023-12-19 12:56 ` [PATCH v2 1/5] dt-bindings: crypto: Add Tegra Security Engine Akhil R
2023-12-20 15:44 ` Krzysztof Kozlowski [this message]
2023-12-28 9:33 ` Akhil R
2023-12-28 10:29 ` Krzysztof Kozlowski
2023-12-29 7:11 ` Akhil R
2023-12-30 14:21 ` Krzysztof Kozlowski
2024-01-02 4:27 ` Akhil R
2023-12-19 12:56 ` [PATCH v2 2/5] gpu: host1x: Add Tegra SE to SID table Akhil R
2023-12-19 12:56 ` [PATCH v2 3/5] crypto: tegra: Add Tegra Security Engine driver Akhil R
2023-12-19 12:56 ` [PATCH v2 4/5] arm64: defconfig: Enable Tegra Security Engine Akhil R
2023-12-19 12:56 ` [PATCH v2 5/5] arm64: tegra: Add Tegra Security Engine DT nodes Akhil R
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