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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Vinod Koul <vkoul@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH 3/6] dt-bindings: pci/qcom-pcie: specify reg-names explicitly
Date: Fri, 22 Apr 2022 14:55:24 +0200	[thread overview]
Message-ID: <fe9c5691-caa1-79b4-666b-daac8913b546@linaro.org> (raw)
In-Reply-To: <20220422114841.1854138-4-dmitry.baryshkov@linaro.org>

On 22/04/2022 13:48, Dmitry Baryshkov wrote:
> Instead of specifying the enum of possible reg-names, specify them
> explicitly. This allows us to specify which chipsets need the "atu"
> regions, which do not. Also it clearly describes which platforms
> enumerate PCIe cores using the dbi region and which use parf region for
> that.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  .../devicetree/bindings/pci/qcom,pcie.yaml    | 96 ++++++++++++++++---
>  1 file changed, 81 insertions(+), 15 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index 7210057d1511..e78e63ea4b25 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -35,21 +35,6 @@ properties:
>            - qcom,pcie-ipq6018
>        - const: snps,dw-pcie
>  
> -  reg:
> -    minItems: 4
> -    maxItems: 5

This should stay.

> -
> -  reg-names:
> -    minItems: 4
> -    maxItems: 5
> -    items:
> -      enum:
> -        - parf # Qualcomm specific registers
> -        - dbi # DesignWare PCIe registers
> -        - elbi # External local bus interface registers
> -        - config # PCIe configuration space
> -        - atu # ATU address space (optional)

Move one of your lists for specific compatibles here and name last
element optional (minItems: 4).

You will need to fix the order of regs in DTS to match the one defined here.

> -
>    interrupts:
>      maxItems: 1
>  
> @@ -108,6 +93,87 @@ required:
>  
>  allOf:
>    - $ref: /schemas/pci/pci-bus.yaml#
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,pcie-apq8064
> +              - qcom,pcie-ipq4019
> +              - qcom,pcie-ipq8064
> +              - qcom,pcie-ipq8064v2
> +              - qcom,pcie-ipq8074
> +              - qcom,pcie-qcs404
> +    then:
> +      properties:
> +        reg:
> +          minItems: 4
> +          maxItems: 4

Only maxItems: 4

> +        reg-names:
> +          items:
> +            - const: dbi # DesignWare PCIe registers
> +            - const: elbi # External local bus interface registers
> +            - const: parf # Qualcomm specific registers
> +            - const: config # PCIe configuration space

No need for this, instead only maxItems:4

> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,pcie-ipq6018
> +    then:
> +      properties:
> +        reg:
> +          minItems: 5
> +          maxItems: 5

Only minItems:5 should be needed.

> +        reg-names:
> +          items:
> +            - const: dbi # DesignWare PCIe registers
> +            - const: elbi # External local bus interface registers
> +            - const: atu # ATU address space (optional)
> +            - const: parf # Qualcomm specific registers
> +            - const: config # PCIe configuration space

This can be removed.

All other cases should be merged with the ones here.

Best regards,
Krzysztof

  reply	other threads:[~2022-04-22 12:55 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-22 11:48 [PATCH 0/6] dt-bindings: YAMLify pci/qcom,pcie schema Dmitry Baryshkov
2022-04-22 11:48 ` [PATCH 1/6] dt-bindings: pci/qcom,pcie: convert to YAML Dmitry Baryshkov
2022-04-22 13:10   ` Krzysztof Kozlowski
2022-04-22 16:49     ` Dmitry Baryshkov
2022-04-22 11:48 ` [PATCH 2/6] dt-bindings: pci/qcom,pcie: add schema for sc7280 chipset Dmitry Baryshkov
2022-04-22 13:11   ` Krzysztof Kozlowski
2022-04-22 11:48 ` [PATCH 3/6] dt-bindings: pci/qcom-pcie: specify reg-names explicitly Dmitry Baryshkov
2022-04-22 12:55   ` Krzysztof Kozlowski [this message]
2022-04-22 15:47     ` Dmitry Baryshkov
2022-04-22 15:51       ` Krzysztof Kozlowski
2022-04-22 19:09         ` Dmitry Baryshkov
2022-04-23  9:48           ` Krzysztof Kozlowski
2022-04-22 11:48 ` [PATCH 4/6] dt-bindings: pci/qcom,pcie: stop using snps,dw-pcie fallback Dmitry Baryshkov
2022-04-22 13:13   ` Krzysztof Kozlowski
2022-04-22 11:48 ` [PATCH 5/6] arm64: dts: qcom: stop using snps,dw-pcie falback Dmitry Baryshkov
2022-04-22 13:20   ` Krzysztof Kozlowski
2022-04-22 11:48 ` [PATCH 6/6] arm: " Dmitry Baryshkov
2022-04-22 13:19   ` Krzysztof Kozlowski
2022-04-22 13:19 ` [PATCH 0/6] dt-bindings: YAMLify pci/qcom,pcie schema Krzysztof Kozlowski

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