From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53B1BC433F5 for ; Fri, 30 Sep 2022 11:16:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231540AbiI3LQo (ORCPT ); Fri, 30 Sep 2022 07:16:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44820 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231547AbiI3LQM (ORCPT ); Fri, 30 Sep 2022 07:16:12 -0400 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF8332409C for ; Fri, 30 Sep 2022 03:59:04 -0700 (PDT) Received: by mail-lj1-x235.google.com with SMTP id b24so4397344ljk.6 for ; Fri, 30 Sep 2022 03:59:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date; bh=4hzPE9oTqY0sNAFbbyjx8cS0M/EZm+X3v2vFWwcKWqU=; b=vHOu28gZ/slIidoNmyLNGLt7JE69UEMTGNGAWTKkHaLClmTVqAidQOmwKnur/460Px ViPf7eVqpKBG654mWEePVJGSUuM6vdQwL2NOQr9ZrySEs1hvEkkLw20ev0TNyWv1qUaa ipmWGB2IhttXt5NrkcgQC5BI67lAOLe5xRjxpCQGJaPt9xYUpX9SQbZntCYlbE+WIvCX JgfXC4DChU4hOlKIaZBYBgb2/EaQ538yLHmKLYDYpAxiiDB79+ax0cW+UnPIamoiOWub 6PZgIJkw0dIXycpSq2e4gIeuhcbAegWj8Vbu8K4i2U3MfmgIh89THvGV15ZinYhFop1V lyMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date; bh=4hzPE9oTqY0sNAFbbyjx8cS0M/EZm+X3v2vFWwcKWqU=; b=P2c0unM+1B8D+FLwQFhR9a+7lOvG1hU2+g6uDBLQQwiUh3d/i32jM2/Z34GW3bZOfT bSA63zt1AIb1FwVLNkvqLnO2xLTZqHpemaPfsB/qSoGvv7QJbODJFIBtjGmHFWJ8CGDZ PEKtnFYMXXivfiiLjWIHVpEIi/0kYlAT/lZ0a6MezRs8ZYEL8TC/+qLhg7R0mRrx/BUW /8QgkHhi3W8WkBfvJxqqTsl1Azb/CAmWk8X0xenvym2JPUcx/jouJCJu1/8ABfSTEwfj zqjKs1ZKYKsP2hnzhcEkIe6d/a3Oe5zj+rjbZEMIBVJShq7M/K6cj5jRXt49U4Xf+0pl QdjQ== X-Gm-Message-State: ACrzQf1D4ezir/ZpA1SxTOguelLr13WXTBVW1ajrUeD6PlF6Vv0/Ahev veaczxPFRgMxSWVoCRD1pr1b4A== X-Google-Smtp-Source: AMsMyM7/M35hE/mV3r6usdYHywAzNP/Z+T+a0YioD4qkM0GJQ/nt2HYQISleBq7PKvTlVL9mhfKOuQ== X-Received: by 2002:a2e:2e0b:0:b0:26b:f760:1c51 with SMTP id u11-20020a2e2e0b000000b0026bf7601c51mr2670898lju.494.1664535543106; Fri, 30 Sep 2022 03:59:03 -0700 (PDT) Received: from [192.168.0.21] (78-11-189-27.static.ip.netia.com.pl. [78.11.189.27]) by smtp.gmail.com with ESMTPSA id d10-20020ac2544a000000b00492f45cbbfcsm250893lfn.302.2022.09.30.03.59.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Sep 2022 03:59:02 -0700 (PDT) Message-ID: Date: Fri, 30 Sep 2022 12:59:01 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 Subject: Re: [PATCH v1 20/30] dt-bindings: clock: Add starfive,jh7110-clkgen-aon bindings Content-Language: en-US To: Hal Feng , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Thomas Gleixner , Marc Zyngier , Philipp Zabel , Stephen Boyd , Michael Turquette , Linus Walleij , Emil Renner Berthing , linux-kernel@vger.kernel.org References: <20220929143225.17907-1-hal.feng@linux.starfivetech.com> <20220930055632.5136-1-hal.feng@linux.starfivetech.com> From: Krzysztof Kozlowski In-Reply-To: <20220930055632.5136-1-hal.feng@linux.starfivetech.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 30/09/2022 07:56, Hal Feng wrote: > From: Emil Renner Berthing > > Add bindings for the always-on clock generator on the JH7110 > RISC-V SoC by StarFive Technology Ltd. > (...) > + > +additionalProperties: false > + > +examples: > + - | > + #include > + > + aoncrg: clock-controller@17000000 { Does not look like you tested the bindings. Please run `make dt_binding_check` (see Documentation/devicetree/bindings/writing-schema.rst for instructions). Best regards, Krzysztof