From: Georgi Djakov <georgi.djakov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: Rob Clark <robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Jordan Crouse <jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
David Airlie <airlied-cv59FeDIM0c@public.gmane.org>,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH v3 2/3] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU
Date: Thu, 21 Feb 2019 14:06:09 +0200 [thread overview]
Message-ID: <ff656778-04dc-df56-05eb-1b0bb3ceb29a@linaro.org> (raw)
In-Reply-To: <20181220173026.3857-3-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Hi,
On 12/20/18 19:30, Jordan Crouse wrote:
> Add documentation for the interconnect and interconnect-names bindings
> for the GPU node as detailed by bindings/interconnect/interconnect.txt.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
>
> Documentation/devicetree/bindings/display/msm/gpu.txt | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
> index 9c89f4fdb8ca..5b04393dcb15 100644
> --- a/Documentation/devicetree/bindings/display/msm/gpu.txt
> +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
> @@ -20,6 +20,8 @@ Required properties:
> - qcom,adreno-630.2
> - iommus: optional phandle to an adreno iommu instance
> - operating-points-v2: optional phandle to the OPP operating points
> +- interconnect: optional phandle to a interconnect provider. See
Nit: s/interconnect:/interconnects:/
Nit: s/a interconnect/an interconnect/
> + ../interconnect/interconnect.txt for details.
> - qcom,gmu: For GMU attached devices a phandle to the GMU device that will
> control the power for the GPU. Applicable targets:
> - qcom,adreno-630.2
> @@ -68,6 +70,8 @@ Example a6xx (with GMU):
>
> operating-points-v2 = <&gpu_opp_table>;
>
> + interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
> +
> qcom,gmu = <&gmu>;
> };
> };
>
Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Thanks,
Georgi
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next prev parent reply other threads:[~2019-02-21 12:06 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-20 17:30 [PATCH v3 0/3] arm64: dts: sdm845: Add sdm845 GPU interconnect Jordan Crouse
[not found] ` <20181220173026.3857-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-12-20 17:30 ` [PATCH v3 2/3] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU Jordan Crouse
2018-12-20 19:30 ` Doug Anderson
2018-12-21 18:28 ` Rob Herring
[not found] ` <20181220173026.3857-3-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2019-02-21 12:06 ` Georgi Djakov [this message]
2018-12-20 17:30 ` [PATCH v3 3/3] arm64: dts: sdm845: Add interconnect " Jordan Crouse
[not found] ` <20181220173026.3857-4-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-12-20 19:31 ` Doug Anderson
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