[PATCH v3 0/3] arm64: dts: sdm845: Add sdm845 GPU interconnect

[PATCH v3 0/3] arm64: dts: sdm845: Add sdm845 GPU interconnect

[Jordan Crouse]

Add interconnect consumer definitions for the sdm845 GPU to device tree.

This patchset includes the a6xx gpu support for interconnect as previously
seen here:

https://patchwork.kernel.org/patch/10718587/

It was pulled into this patchset because the interconnect-name was removed from
the DT at the suggestion of Rob Herring and it was easier to combine all of
these together into one set.

Everything is based on the base GPU DT changes:
https://patchwork.freedesktop.org/series/39308/

As well as the DT nodes from Georgi:
https://patchwork.kernel.org/patch/10719483/

v3: Remove hardcoded interconnect name from driver and bindings

Jordan Crouse (3):
  drm/msm/a6xx: Add support for an interconnect path
  dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU
  arm64: dts: sdm845: Add interconnect for GPU

 .../devicetree/bindings/display/msm/gpu.txt   |  4 ++++
 arch/arm64/boot/dts/qcom/sdm845.dtsi          |  2 ++
 drivers/gpu/drm/msm/Kconfig                   |  1 +
 drivers/gpu/drm/msm/adreno/a6xx_gmu.c         | 20 +++++++++++++++++++
 drivers/gpu/drm/msm/adreno/adreno_gpu.c       |  9 +++++++++
 drivers/gpu/drm/msm/msm_gpu.h                 |  3 +++
 6 files changed, 39 insertions(+)

-- 
2.18.0

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[PATCH v3 2/3] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

[Jordan Crouse]

Add documentation for the interconnect and interconnect-names bindings
for the GPU node as detailed by bindings/interconnect/interconnect.txt.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---

 Documentation/devicetree/bindings/display/msm/gpu.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
index 9c89f4fdb8ca..5b04393dcb15 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.txt
+++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
@@ -20,6 +20,8 @@ Required properties:
    - qcom,adreno-630.2
 - iommus: optional phandle to an adreno iommu instance
 - operating-points-v2: optional phandle to the OPP operating points
+- interconnect: optional phandle to a interconnect provider.  See
+  ../interconnect/interconnect.txt for details.
 - qcom,gmu: For GMU attached devices a phandle to the GMU device that will
   control the power for the GPU. Applicable targets:
     - qcom,adreno-630.2
@@ -68,6 +70,8 @@ Example a6xx (with GMU):
 
 		operating-points-v2 = <&gpu_opp_table>;
 
+		interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
+
 		qcom,gmu = <&gmu>;
 	};
 };
-- 
2.18.0

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Re: [PATCH v3 2/3] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

[Doug Anderson]

Hi,

On Thu, Dec 20, 2018 at 9:30 AM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> Add documentation for the interconnect and interconnect-names bindings
> for the GPU node as detailed by bindings/interconnect/interconnect.txt.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
>
>  Documentation/devicetree/bindings/display/msm/gpu.txt | 4 ++++
>  1 file changed, 4 insertions(+)

I would have been fine if you had kept my tag (even though 50% of the
patch changed!).  ...but here it is again:

Reviewed-by: Douglas Anderson <dianders@chromium.org>

I assume this will be going through Georgi's tree w/ the previous patch.

-Doug

Re: [PATCH v3 2/3] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

[Rob Herring]

On Thu, 20 Dec 2018 10:30:25 -0700, Jordan Crouse wrote:
> Add documentation for the interconnect and interconnect-names bindings
> for the GPU node as detailed by bindings/interconnect/interconnect.txt.
> 
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
> 
>  Documentation/devicetree/bindings/display/msm/gpu.txt | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

Re: [PATCH v3 2/3] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

[Georgi Djakov]

Hi,

On 12/20/18 19:30, Jordan Crouse wrote:
> Add documentation for the interconnect and interconnect-names bindings
> for the GPU node as detailed by bindings/interconnect/interconnect.txt.
> 
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
> 
>  Documentation/devicetree/bindings/display/msm/gpu.txt | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
> index 9c89f4fdb8ca..5b04393dcb15 100644
> --- a/Documentation/devicetree/bindings/display/msm/gpu.txt
> +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
> @@ -20,6 +20,8 @@ Required properties:
>     - qcom,adreno-630.2
>  - iommus: optional phandle to an adreno iommu instance
>  - operating-points-v2: optional phandle to the OPP operating points
> +- interconnect: optional phandle to a interconnect provider.  See

Nit: s/interconnect:/interconnects:/
Nit: s/a interconnect/an interconnect/

> +  ../interconnect/interconnect.txt for details.
>  - qcom,gmu: For GMU attached devices a phandle to the GMU device that will
>    control the power for the GPU. Applicable targets:
>      - qcom,adreno-630.2
> @@ -68,6 +70,8 @@ Example a6xx (with GMU):
>  
>  		operating-points-v2 = <&gpu_opp_table>;
>  
> +		interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
> +
>  		qcom,gmu = <&gmu>;
>  	};
>  };
> 

Acked-by: Georgi Djakov <georgi.djakov@linaro.org>

Thanks,
Georgi
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[PATCH v3 3/3] arm64: dts: sdm845: Add interconnect for GPU

[Jordan Crouse]

Define an interconnect port for the GPU to set bus
capabilities.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---

 arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 1005f1eb1920..155e4ba74c96 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1369,6 +1369,8 @@
 
 			operating-points-v2 = <&gpu_opp_table>;
 
+			interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
+
 			qcom,gmu = <&gmu>;
 
 			gpu_opp_table: opp-table {
-- 
2.18.0

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Re: [PATCH v3 3/3] arm64: dts: sdm845: Add interconnect for GPU

[Doug Anderson]

Hi,

On Thu, Dec 20, 2018 at 9:30 AM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> Define an interconnect port for the GPU to set bus
> capabilities.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
>
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++
>  1 file changed, 2 insertions(+)

For going through Andy's tree once the bindings land (presumably in
Georgi's tree).

Reviewed-by: Douglas Anderson <dianders@chromium.org>
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