Re: [PATCH] ARM: dts: bcm283x: increase dwc2's RX FIFO size

[Nicolas Saenz Julienne <nsaenzjulienne@suse.de>]

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On Fri, 2020-11-13 at 08:18 +0100, Pavel Hofman wrote:
> The previous version of the dwc2 overlay set the RX FIFO size to
> 256 4-byte words. This is not enough for 1024 bytes of the largest
> isochronous high speed packet allowed, because it doesn't take into
> account extra space needed by dwc2.
> 
> RX FIFO's size is calculated based on the following (in 4byte words):
> - 13 locations for SETUP packets
>   5*n + 8 for Slave and Buffer DMA mode where n is number of control
>   endpoints which is 1 on the bcm283x core
> 
> - 1 location for Global OUT NAK
> 
> - 2 * 257 locations for status information and the received packet.
>   Typically two spaces are recommended so that when the previous packet
>   is being transferred to AHB, the USB can receive the subsequent
>   packet.
> 
> - 10 * 1 location for transfer complete status for last packet of each
>   endpoint. The bcm283x core has 5 IN and 5 OUT EPs
> 
> - 10 * 1 additional location for EPDisable status for each endpoint
> 
> - 5 * 2 additional locations are recommended for each OUT endpoint
> 
> Total is 558 locations.
> 
> Signed-off-by: Phil Elwell <phil@raspberrypi.com>
> Signed-off-by: Pavel Hofman <pavel.hofman@ivitera.com>
> ---

Applied for next. Thanks!

Regards,
Nicolas


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