From: Krzysztof Kozlowski <krzk@kernel.org>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Sarthak Garg <quic_sartgarg@quicinc.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Adrian Hunter <adrian.hunter@intel.com>
Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
quic_cang@quicinc.com, quic_nguyenb@quicinc.com,
quic_rampraka@quicinc.com, quic_pragalla@quicinc.com,
quic_sayalil@quicinc.com, quic_nitirawa@quicinc.com,
quic_bhaskarv@quicinc.com, kernel@oss.qualcomm.com
Subject: Re: [PATCH V3 2/4] dt-bindings: mmc: controller: Add max-sd-hs-frequency property
Date: Mon, 23 Jun 2025 14:16:45 +0200 [thread overview]
Message-ID: <ffc62906-c3bb-4968-8f7c-fa7ae5028ad5@kernel.org> (raw)
In-Reply-To: <5bdae07b-a7b1-49be-b843-1704981bc63b@oss.qualcomm.com>
On 23/06/2025 14:08, Konrad Dybcio wrote:
>>>>
>>>> This might be fine, but your DTS suggests clearly this is SoC compatible
>>>> deducible, which I already said at v1.
>>>
>>> I don't understand why you're rejecting a common solution to a problem
>>> that surely exists outside this one specific chip from one specific
>>> vendor, which may be caused by a multitude of design choices, including
>>> erratic board (not SoC) electrical design
>>
>> No one brought any arguments so far that common solution is needed. The
>> only argument provided - sm8550 - is showing this is soc design.
>>
>> I don't reject common solution. I provided review at v1 to which no one
>> responded, no one argued, no one provided other arguments.
>
> Okay, so the specific problem that causes this observable limitation
> exists on SM8550 and at least one more platform which is not upstream
> today. It can be caused by various electrical issues, in our specific
> case by something internal to the SoC (but external factors may apply
> too)
>
> Looking at the docs, a number of platforms have various limitations
> with regards to frequency at specific speed-modes, some of which seem
> to be handled implicitly by rounding in the clock framework's
> round/set_rate().
>
> I can very easily imagine there are either boards or platforms in the
> wild, where the speed must be limited for various reasons, maybe some
> of them currently don't advertise it (like sm8550 on next/master) to
> hide that
But there are no such now. The only argument (fact) provided in this
patchset is: this is issue specific to SM8550 SoC, not the board. See
last patch. Therefore this is compatible-deducible and this makes
property without any upstream user.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-06-23 12:16 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-18 7:28 [PATCH V3 0/4] Add level shifter support for qualcomm SOC's Sarthak Garg
2025-06-18 7:28 ` [PATCH V3 1/4] mmc: sdhci-msm: Enable tuning for SDR50 mode for SD card Sarthak Garg
2025-06-18 7:28 ` [PATCH V3 2/4] dt-bindings: mmc: controller: Add max-sd-hs-frequency property Sarthak Garg
2025-06-18 7:43 ` Krzysztof Kozlowski
2025-06-18 8:38 ` Sarthak Garg
2025-06-18 9:08 ` Krzysztof Kozlowski
2025-06-20 9:07 ` Sarthak Garg
2025-06-21 10:20 ` Konrad Dybcio
2025-06-22 9:48 ` Krzysztof Kozlowski
2025-06-23 12:08 ` Konrad Dybcio
2025-06-23 12:16 ` Krzysztof Kozlowski [this message]
2025-06-23 12:31 ` Konrad Dybcio
2025-06-24 6:06 ` Krzysztof Kozlowski
2025-07-01 9:04 ` Konrad Dybcio
2025-07-01 9:30 ` Krzysztof Kozlowski
2025-07-24 11:48 ` Sarthak Garg
2025-06-18 7:28 ` [PATCH V3 3/4] mmc: core: Introduce a new flag max-sd-hs-frequency Sarthak Garg
2025-06-18 7:28 ` [PATCH V3 4/4] arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken capabilities Sarthak Garg
2025-06-18 7:41 ` Krzysztof Kozlowski
2025-06-18 8:44 ` Sarthak Garg
2025-06-18 9:08 ` Krzysztof Kozlowski
2025-06-21 10:23 ` Konrad Dybcio
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