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Wed, 01 Jul 2026 10:22:33 -0700 (PDT) Received: from strix.localnet ([197.250.51.120]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-477db8a4b83sm1526700f8f.12.2026.07.01.10.22.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jul 2026 10:22:32 -0700 (PDT) From: Stefan =?UTF-8?B?RMO2c2luZ2Vy?= To: Conor Dooley Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Brian Masney , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH RFC v5 00/12] ZTE zx297520v3 clock bindings and driver Date: Wed, 01 Jul 2026 20:22:21 +0300 Message-ID: In-Reply-To: <20260629-unwelcome-raking-3df3d8ff0422@spud> References: <20260628-zx29clk-v5-0-79ff044e4192@gmail.com> <20260629-unwelcome-raking-3df3d8ff0422@spud> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; boundary="nextPartVc9fFCIUSOe9qcGAUepe1g"; micalg="pgp-sha256"; protocol="application/pgp-signature" --nextPartVc9fFCIUSOe9qcGAUepe1g Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="utf-8"; protected-headers="v1" From: Stefan =?UTF-8?B?RMO2c2luZ2Vy?= To: Conor Dooley Subject: Re: [PATCH RFC v5 00/12] ZTE zx297520v3 clock bindings and driver Date: Wed, 01 Jul 2026 20:22:21 +0300 Message-ID: In-Reply-To: <20260629-unwelcome-raking-3df3d8ff0422@spud> MIME-Version: 1.0 Am Montag, 29. Juni 2026, 18:49:08 Ostafrikanische Zeit schrieb Conor Dooley: > Bindings seem fine to me, I'll be happy to give you some r-b tags when > you go non-RFC. To be frank, I think you should drop them as you've got > no significant questions here I think and you'll be taken a bt more > seriously. Thanks for all the advice so far! Here's one more binding related question: Philipp's request to give the PHY reset its own reset ID means I need a node and driver to consume that reset. My question is if it should be another MFD subdevice of topcrm or not. I am leaning towards not: usb_phy: phy@2 { compatible = "zte,zx29-usb2-phy"; interrupts = , ; interrupt-names = "powerup", "powerdown"; syscon = <&topcrm 0x84 0x2>; resets = <&topcrm ZX297520V3_USB_PHY_RESET>; reset-names = "phy"; #phy-cells = <0>; }; usb0: usb@1500000 { compatible = "snps,dwc2"; reg = <0x01500000 0x1000>; ... phys = <&usb_phy>; phy-names = "usb2-phy"; }; I am not aware of any IO region to configure the PHY, although one may exist. topcrm + 0x84 has two status bits reporting if USB and HSIC are powered and out of reset. Nevertheless, the PHY feels distinct enough from topcrm that it should have its own binding. The phy driver would merely deassert the reset and wait for the ready bit and maybe in the future do something useful with the connect/disconnect IRQs. Interestingly the USB IO region is actually downstream of the AHB bus and matrix controller, but it has its clocks and resets in topcrm. I suspect the purpose of this setup is to allow wake-by-USB IRQs while shutting down the main data path. Cheers, Stefan --nextPartVc9fFCIUSOe9qcGAUepe1g Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part. 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