* [PATCH v3 1/7] dt-bindings: usb: dwc3: Deprecate snps,ref-clock-period-ns
From: Sean Anderson @ 2022-01-27 20:06 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-usb
Cc: Robert Hancock, Baruch Siach, Felipe Balbi, Thinh Nguyen,
linux-kernel, Balaji Prakash J, Sean Anderson, Rob Herring,
devicetree
In-Reply-To: <20220127200636.1456175-1-sean.anderson@seco.com>
This property is redundant because we can determine the correct value for
REFCLKPER based on the "ref" clock. Deprecate it, and encourage users to
provide a clock instead. This also restricts the minimum and maximum to the
values documented in the register reference [1].
[1] https://www.xilinx.com/html_docs/registers/ug1087/usb3_xhci___guctl.html
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index d29ffcd27472..4f2b0913ad9f 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -263,8 +263,11 @@ properties:
Value for REFCLKPER field of GUCTL register for reference clock period in
nanoseconds, when the hardware set default does not match the actual
clock.
- minimum: 1
- maximum: 0x3ff
+
+ This binding is deprecated. Instead, provide an appropriate reference clock.
+ minimum: 8
+ maximum: 62
+ deprecated: true
snps,rx-thr-num-pkt-prd:
description:
--
2.25.1
^ permalink raw reply related
* [PATCH v3 0/7] usb: dwc3: Calculate REFCLKPER et. al. from reference clock
From: Sean Anderson @ 2022-01-27 20:06 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-usb
Cc: Robert Hancock, Baruch Siach, Felipe Balbi, Thinh Nguyen,
linux-kernel, Balaji Prakash J, Sean Anderson, Andy Gross,
Bjorn Andersson, Michal Simek, Rob Herring, devicetree,
linux-arm-kernel, linux-arm-msm
This is a rework of patches 3-5 of [1]. It attempts to correctly program
REFCLKPER and REFCLK_FLADJ based on the reference clock frequency. Since
we no longer need a special property duplicating this configuration,
snps,ref-clock-period-ns is deprecated.
Please test this! Patches 3/4 in this series have the effect of
programming REFCLKPER and REFCLK_FLADJ on boards which already configure
the "ref" clock. I have build tested, but not much else.
[1] https://lore.kernel.org/linux-usb/20220114044230.2677283-1-robert.hancock@calian.com/
Changes in v3:
- Define each variable on its own line
- Rebase onto linux/master
- Update comment to notes some things mentioned during review
Changes in v2:
- Add snps,ref-clock-frequency-hz property for ACPI
- Also program GFLADJ.240MHZDECR
- Document clock members
- Don't program GFLADJ if the version is < 2.50a
Sean Anderson (7):
dt-bindings: usb: dwc3: Deprecate snps,ref-clock-period-ns
usb: dwc3: Get clocks individually
usb: dwc3: Calculate REFCLKPER based on reference clock
usb: dwc3: Program GFLADJ
usb: dwc3: Add snps,ref-clock-frequency-hz property for ACPI
arm64: dts: zynqmp: Move USB clocks to dwc3 node
arm64: dts: ipq6018: Use reference clock to set dwc3 period
.../devicetree/bindings/usb/snps,dwc3.yaml | 7 +-
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 3 +-
.../arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 4 +-
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 +-
drivers/usb/dwc3/core.c | 117 +++++++++++++++---
drivers/usb/dwc3/core.h | 17 ++-
6 files changed, 125 insertions(+), 27 deletions(-)
--
2.25.1
^ permalink raw reply
* [PATCH] dt-bindings: mtd: drop mtd/cortina,gemini-flash.txt
From: Corentin Labbe @ 2022-01-27 20:03 UTC (permalink / raw)
To: linus.walleij, miquel.raynal, richard, robh+dt, vigneshr
Cc: devicetree, linux-arm-kernel, linux-kernel, linux-mtd,
Corentin Labbe
Drop mtd/cortina,gemini-flash.txt since it is nearly already handled by
Documentation/devicetree/bindings/mtd/mtd-physmap.yaml.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
.../bindings/mtd/cortina,gemini-flash.txt | 24 -------------------
.../devicetree/bindings/mtd/mtd-physmap.yaml | 18 +++++++++++++-
2 files changed, 17 insertions(+), 25 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mtd/cortina,gemini-flash.txt
diff --git a/Documentation/devicetree/bindings/mtd/cortina,gemini-flash.txt b/Documentation/devicetree/bindings/mtd/cortina,gemini-flash.txt
deleted file mode 100644
index efa5b2aba829..000000000000
--- a/Documentation/devicetree/bindings/mtd/cortina,gemini-flash.txt
+++ /dev/null
@@ -1,24 +0,0 @@
-Flash device on Cortina Systems Gemini SoC
-
-This flash is regular CFI compatible (Intel or AMD extended) flash chips with
-some special bits that can be controlled by the machine's system controller.
-
-Required properties:
-- compatible : must be "cortina,gemini-flash", "cfi-flash";
-- reg : memory address for the flash chip
-- syscon : must be a phandle to the system controller
-- bank-width : width in bytes of flash interface, should be <2>
-
-For the rest of the properties, see mtd-physmap.yaml.
-
-The device tree may optionally contain sub-nodes describing partitions of the
-address space. See partition.txt for more detail.
-
-Example:
-
-flash@30000000 {
- compatible = "cortina,gemini-flash", "cfi-flash";
- reg = <0x30000000 0x01000000>;
- syscon = <&syscon>;
- bank-width = <2>;
-};
diff --git a/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml b/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml
index f827984936f6..5b4440e005bc 100644
--- a/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml
+++ b/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml
@@ -44,7 +44,9 @@ properties:
- numonyx,js28f128
- sst,sst39vf320
- xlnx,xps-mch-emc-2.00.a
- - const: cfi-flash
+ - enum:
+ - cfi-flash
+ - jedec-flash
- items:
- enum:
- cypress,cy7c1019dv33-10zsxi
@@ -127,6 +129,20 @@ required:
- compatible
- reg
+if:
+ properties:
+ compatible:
+ contains:
+ const: cortina,gemini-flash
+then:
+ properties:
+ syscon:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to the syscom controller
+ required:
+ - syscon
+
# FIXME: A parent bus may define timing properties
additionalProperties: true
--
2.34.1
^ permalink raw reply related
* Re: [PATCH v2 0/3] drm/panel: Add MIPI DBI compatible SPI driver
From: Noralf Trønnes @ 2022-01-27 20:02 UTC (permalink / raw)
To: David Lechner, robh+dt, thierry.reding
Cc: sam, maxime, dave.stevenson, devicetree, dri-devel
In-Reply-To: <a975e0b1-7036-4936-a0ca-548d4456bd1b@lechnology.com>
Den 27.01.2022 18.13, skrev David Lechner:
> On 1/25/22 11:56 AM, Noralf Trønnes wrote:
>> Hi,
>>
>> This patchset adds a driver that will work with most MIPI DBI compatible
>> SPI panels out there.
>>
>> It's a follow up on 'drm/tiny/st7735r: Match up with staging/fbtft
>> driver'[1] which aimed at making the st7735r driver work with all panels
>> adding DT properties.
>>
>> Maxime gave[2] a good overview of the situation with these displays and
>> proposed to make a driver that works with all MIPI DBI compatible
>> controllers and use a firmware file to provide the controller setup for
>> a particular panel.
>>
>> Main change since previous version:
>> - Drop model property and use the compatible property instead (Rob)
>>
>> Noralf.
>>
>> [1]
>> https://lore.kernel.org/dri-devel/20211124150757.17929-1-noralf@tronnes.org/
>>
>> [2]
>> https://lore.kernel.org/dri-devel/20211129093946.xhp22mvdut3m67sc@houat/
>>
>>
>> Noralf Trønnes (3):
>> dt-bindings: display: add bindings for MIPI DBI compatible SPI panels
>> drm/mipi-dbi: Add driver_private member to struct mipi_dbi_dev
>> drm/panel: Add MIPI DBI compatible SPI driver
>>
>> .../display/panel/panel-mipi-dbi-spi.yaml | 59 +++
>> MAINTAINERS | 8 +
>> drivers/gpu/drm/panel/Kconfig | 11 +
>> drivers/gpu/drm/panel/Makefile | 1 +
>> drivers/gpu/drm/panel/panel-mipi-dbi.c | 394 ++++++++++++++++++
>> include/drm/drm_mipi_dbi.h | 2 +
>> 6 files changed, 475 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
>> create mode 100644 drivers/gpu/drm/panel/panel-mipi-dbi.c
>>
>
> It would be useful to also include a patch for a tool to create
> these "firmware" files. For example a Python script that takes
> a more human-readable input and generates a .bin file.
I will put a script on the github repo that holds the wiki for the
driver. I haven't made the script yet, just using a hack for now until
the format is decided upon.
Noralf.
^ permalink raw reply
* [PATCH 1/1] of: unittest: update text of expected warnings
From: frowand.list @ 2022-01-27 19:26 UTC (permalink / raw)
To: Rob Herring; +Cc: devicetree, linux-kernel
From: Frank Rowand <frank.rowand@sony.com>
The text of various warning messages triggered by unittest has
changed. Update the text of expected warnings to match.
The expected vs actual warnings are most easily seen by filtering
the boot console messages with the of_unittest_expect program at
https://github.com/frowand/dt_tools.git. The filter prefixes
problem lines with '***', and prefixes lines that match expected
errors with 'ok '. All other lines are prefixed with ' '.
Unrelated lines have been deleted in the following examples.
The mismatch appears as:
-> ### dt-test ### start of unittest - you will see error messages
OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found 1
** of_unittest_expect WARNING - not found ---> OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found -1
OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found 1
** of_unittest_expect WARNING - not found ---> OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found -1
OF: /testcase-data/phandle-tests/consumer-b: #phandle-cells = 2 found 1
** of_unittest_expect WARNING - not found ---> OF: /testcase-data/phandle-tests/consumer-b: #phandle-cells = 2 found -1
platform testcase-data:testcase-device2: error -ENXIO: IRQ index 0 not found
** of_unittest_expect WARNING - not found ---> platform testcase-data:testcase-device2: IRQ index 0 not found
-> ### dt-test ### end of unittest - 254 passed, 0 failed
** EXPECT statistics:
**
** EXPECT found : 42
** EXPECT not found : 4
With this commit applied, the mismatch is resolved:
-> ### dt-test ### start of unittest - you will see error messages
ok OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found 1
ok OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found 1
ok OF: /testcase-data/phandle-tests/consumer-b: #phandle-cells = 2 found 1
ok platform testcase-data:testcase-device2: error -ENXIO: IRQ index 0 not found
-> ### dt-test ### end of unittest - 254 passed, 0 failed
** EXPECT statistics:
**
** EXPECT found : 46
** EXPECT not found : 0
Fixes: 2043727c2882 ("driver core: platform: Make use of the helper function dev_err_probe()")
Fixes: 94a4950a4acf ("of: base: Fix phandle argument length mismatch error message")
Signed-off-by: Frank Rowand <frank.rowand@sony.com>
---
drivers/of/unittest.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c
index 70992103c07d..2c2fb161b572 100644
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -513,24 +513,24 @@ static void __init of_unittest_parse_phandle_with_args(void)
memset(&args, 0, sizeof(args));
EXPECT_BEGIN(KERN_INFO,
- "OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found -1");
+ "OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found 1");
rc = of_parse_phandle_with_args(np, "phandle-list-bad-args",
"#phandle-cells", 1, &args);
EXPECT_END(KERN_INFO,
- "OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found -1");
+ "OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found 1");
unittest(rc == -EINVAL, "expected:%i got:%i\n", -EINVAL, rc);
EXPECT_BEGIN(KERN_INFO,
- "OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found -1");
+ "OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found 1");
rc = of_count_phandle_with_args(np, "phandle-list-bad-args",
"#phandle-cells");
EXPECT_END(KERN_INFO,
- "OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found -1");
+ "OF: /testcase-data/phandle-tests/consumer-a: #phandle-cells = 3 found 1");
unittest(rc == -EINVAL, "expected:%i got:%i\n", -EINVAL, rc);
}
@@ -670,12 +670,12 @@ static void __init of_unittest_parse_phandle_with_args_map(void)
memset(&args, 0, sizeof(args));
EXPECT_BEGIN(KERN_INFO,
- "OF: /testcase-data/phandle-tests/consumer-b: #phandle-cells = 2 found -1");
+ "OF: /testcase-data/phandle-tests/consumer-b: #phandle-cells = 2 found 1");
rc = of_parse_phandle_with_args_map(np, "phandle-list-bad-args",
"phandle", 1, &args);
EXPECT_END(KERN_INFO,
- "OF: /testcase-data/phandle-tests/consumer-b: #phandle-cells = 2 found -1");
+ "OF: /testcase-data/phandle-tests/consumer-b: #phandle-cells = 2 found 1");
unittest(rc == -EINVAL, "expected:%i got:%i\n", -EINVAL, rc);
}
@@ -1257,12 +1257,12 @@ static void __init of_unittest_platform_populate(void)
unittest(pdev, "device 2 creation failed\n");
EXPECT_BEGIN(KERN_INFO,
- "platform testcase-data:testcase-device2: IRQ index 0 not found");
+ "platform testcase-data:testcase-device2: error -ENXIO: IRQ index 0 not found");
irq = platform_get_irq(pdev, 0);
EXPECT_END(KERN_INFO,
- "platform testcase-data:testcase-device2: IRQ index 0 not found");
+ "platform testcase-data:testcase-device2: error -ENXIO: IRQ index 0 not found");
unittest(irq < 0 && irq != -EPROBE_DEFER,
"device parsing error failed - %d\n", irq);
--
Frank Rowand <frank.rowand@sony.com>
^ permalink raw reply related
* [PATCH 2/2] arm64: dts: rockchip: add usb2 support to rk3568-evb1-v10
From: Michael Riesch @ 2022-01-27 19:04 UTC (permalink / raw)
To: linux-arm-kernel, linux-rockchip, devicetree, linux-kernel
Cc: Rob Herring, Heiko Stuebner, Peter Geis, Nicolas Frattaroli,
Michael Riesch, Liang Chen
In-Reply-To: <20220127190456.2195527-1-michael.riesch@wolfvision.net>
Activate the USB2 controller and phy nodes in the device tree of the
RK3568 EVB1.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
.../boot/dts/rockchip/rk3568-evb1-v10.dts | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
index 184e2aa2416a..c68bade0d99b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
@@ -53,6 +53,28 @@ vcc5v0_sys: vcc5v0-sys {
vin-supply = <&dc_12v>;
};
+ vcc5v0_usb: vcc5v0-usb {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_usb_host: vcc5v0-usb-host {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_host_en>;
+ regulator-name = "vcc5v0_usb_host";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_usb>;
+ };
+
vcc3v3_lcd0_n: vcc3v3-lcd0-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd0_n";
@@ -345,6 +367,12 @@ pmic_int: pmic_int {
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
+
+ usb {
+ vcc5v0_usb_host_en: vcc5v0_usb_host_en {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pmu_io_domains {
@@ -390,3 +418,33 @@ &sdmmc0 {
&uart2 {
status = "okay";
};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb2phy1 {
+ status = "okay";
+};
+
+&usb2phy1_host {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&usb2phy1_otg {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
--
2.30.2
^ permalink raw reply related
* [PATCH 1/2] arm64: dts: rockchip: rename and sort the rk356x usb2 phy handles
From: Michael Riesch @ 2022-01-27 19:04 UTC (permalink / raw)
To: linux-arm-kernel, linux-rockchip, devicetree, linux-kernel
Cc: Rob Herring, Heiko Stuebner, Peter Geis, Nicolas Frattaroli,
Michael Riesch, Liang Chen
All nodes and handles related to USB have the prefix usb or usb2,
whereas the phy handles are prefixed with u2phy. Rename for
consistency reasons and to facilitate sorting.
This patch also updates the handles in the only board file that
uses them (rk3566-quartz64-a.dts).
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
.../boot/dts/rockchip/rk3566-quartz64-a.dts | 18 ++++++++---------
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 20 +++++++++----------
2 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
index f1d6bf10c650..3e65465ac7d5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
@@ -574,32 +574,32 @@ &uart2 {
status = "okay";
};
-&u2phy1_host {
- phy-supply = <&vcc5v0_usb20_host>;
+&usb_host0_ehci {
status = "okay";
};
-&u2phy1_otg {
- phy-supply = <&vcc5v0_usb20_host>;
+&usb_host0_ohci {
status = "okay";
};
-&u2phy1 {
+&usb_host1_ehci {
status = "okay";
};
-&usb_host0_ehci {
+&usb_host1_ohci {
status = "okay";
};
-&usb_host0_ohci {
+&usb2phy1 {
status = "okay";
};
-&usb_host1_ehci {
+&usb2phy1_host {
+ phy-supply = <&vcc5v0_usb20_host>;
status = "okay";
};
-&usb_host1_ohci {
+&usb2phy1_otg {
+ phy-supply = <&vcc5v0_usb20_host>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 8ee2fab676f4..69c30992ced2 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -214,7 +214,7 @@ usb_host0_ehci: usb@fd800000 {
interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
<&cru PCLK_USB>;
- phys = <&u2phy1_otg>;
+ phys = <&usb2phy1_otg>;
phy-names = "usb";
status = "disabled";
};
@@ -225,7 +225,7 @@ usb_host0_ohci: usb@fd840000 {
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
<&cru PCLK_USB>;
- phys = <&u2phy1_otg>;
+ phys = <&usb2phy1_otg>;
phy-names = "usb";
status = "disabled";
};
@@ -236,7 +236,7 @@ usb_host1_ehci: usb@fd880000 {
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
<&cru PCLK_USB>;
- phys = <&u2phy1_host>;
+ phys = <&usb2phy1_host>;
phy-names = "usb";
status = "disabled";
};
@@ -247,7 +247,7 @@ usb_host1_ohci: usb@fd8c0000 {
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
<&cru PCLK_USB>;
- phys = <&u2phy1_host>;
+ phys = <&usb2phy1_host>;
phy-names = "usb";
status = "disabled";
};
@@ -1195,7 +1195,7 @@ pwm15: pwm@fe700030 {
status = "disabled";
};
- u2phy0: usb2phy@fe8a0000 {
+ usb2phy0: usb2phy@fe8a0000 {
compatible = "rockchip,rk3568-usb2phy";
reg = <0x0 0xfe8a0000 0x0 0x10000>;
clocks = <&pmucru CLK_USBPHY0_REF>;
@@ -1206,18 +1206,18 @@ u2phy0: usb2phy@fe8a0000 {
#clock-cells = <0>;
status = "disabled";
- u2phy0_host: host-port {
+ usb2phy0_host: host-port {
#phy-cells = <0>;
status = "disabled";
};
- u2phy0_otg: otg-port {
+ usb2phy0_otg: otg-port {
#phy-cells = <0>;
status = "disabled";
};
};
- u2phy1: usb2phy@fe8b0000 {
+ usb2phy1: usb2phy@fe8b0000 {
compatible = "rockchip,rk3568-usb2phy";
reg = <0x0 0xfe8b0000 0x0 0x10000>;
clocks = <&pmucru CLK_USBPHY1_REF>;
@@ -1228,12 +1228,12 @@ u2phy1: usb2phy@fe8b0000 {
#clock-cells = <0>;
status = "disabled";
- u2phy1_host: host-port {
+ usb2phy1_host: host-port {
#phy-cells = <0>;
status = "disabled";
};
- u2phy1_otg: otg-port {
+ usb2phy1_otg: otg-port {
#phy-cells = <0>;
status = "disabled";
};
--
2.30.2
^ permalink raw reply related
* Re: [PATCH v2] dt-bindings: PCI: ti,j721e: Add device id for J721S2
From: Rob Herring @ 2022-01-27 18:25 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Aswath Govindraju, Bjorn Helgaas, Vignesh Raghavendra,
Nishanth Menon, Kishon Vijay Abraham I, PCI, devicetree,
linux-kernel@vger.kernel.org, Lorenzo Pieralisi
In-Reply-To: <20220127152333.GA101708@bhelgaas>
On Thu, Jan 27, 2022 at 9:24 AM Bjorn Helgaas <helgaas@kernel.org> wrote:
>
> [+cc Lorenzo, initial post
> https://lore.kernel.org/r/20211130035608.13492-1-a-govindraju@ti.com]
>
> On Tue, Jan 25, 2022 at 12:06:16PM +0530, Aswath Govindraju wrote:
> > On 30/11/21 9:26 am, Aswath Govindraju wrote:
> > > Document the device id of J721S2 SoC.
> > >
> > > Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
> > > ---
> > >
> >
> > May I know if this patch can be picked up?
>
> "git log Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml"
> says most changes to this file have been applied by Lorenzo, so I cc'd
> him.
I can take it if there's not other pending changes to this file for 5.18?
Rob
^ permalink raw reply
* Re: [PATCH v2 4/5] arm64: tegra: Add audio devices on Tegra234
From: kernel test robot @ 2022-01-27 18:17 UTC (permalink / raw)
To: Sameer Pujar, broonie, lgirdwood, tiwai, perex, robh+dt,
thierry.reding
Cc: kbuild-all, jonathanh, mkumard, devicetree, linux-tegra
In-Reply-To: <1643268455-15567-5-git-send-email-spujar@nvidia.com>
Hi Sameer,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on broonie-sound/for-next]
[also build test ERROR on robh/for-next tegra/for-next v5.17-rc1 next-20220127]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sameer-Pujar/Tegra234-APE-support/20220127-152859
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
config: arm64-randconfig-r032-20220124 (https://download.01.org/0day-ci/archive/20220128/202201280238.X7EvyPqD-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/208f1a37b06fb0211db2a4f54be494079f0f3310
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sameer-Pujar/Tegra234-APE-support/20220127-152859
git checkout 208f1a37b06fb0211db2a4f54be494079f0f3310
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arm64 SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> Error: arch/arm64/boot/dts/nvidia/tegra234.dtsi:28.27-28 syntax error
FATAL ERROR: Unable to parse input tree
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
* Re: [PATCH v2 3/3] drm/panel: Add MIPI DBI compatible SPI driver
From: Noralf Trønnes @ 2022-01-27 17:53 UTC (permalink / raw)
To: Maxime Ripard, robh+dt
Cc: thierry.reding, sam, dave.stevenson, david, devicetree, dri-devel
In-Reply-To: <20220127100452.bmxcgf6ye3nxrgtq@houat>
Den 27.01.2022 11.04, skrev Maxime Ripard:
> On Tue, Jan 25, 2022 at 06:57:00PM +0100, Noralf Trønnes wrote:
>> Add a driver that will work with most MIPI DBI compatible SPI panels.
>> This avoids adding a driver for every new MIPI DBI compatible controller
>> that is to be used by Linux. The 'compatible' Device Tree property with
>> a '.bin' suffix will be used to load a firmware file that contains the
>> controller configuration.
>>
>> Example (driver will load sainsmart18.bin):
>>
>> display@0 {
>> compatible = "sainsmart18", "panel-mipi-dbi-spi";
>> reg = <0>;
>> reset-gpios = <&gpio 25 0>;
>> dc-gpios = <&gpio 24 0>;
>> };
>>
>> v2:
>> - Drop model property and use compatible instead (Rob)
>> - Add wiki entry in MAINTAINERS
>>
>> Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
>> ---
>> MAINTAINERS | 8 +
>> drivers/gpu/drm/panel/Kconfig | 11 +
>> drivers/gpu/drm/panel/Makefile | 1 +
>> drivers/gpu/drm/panel/panel-mipi-dbi.c | 394 +++++++++++++++++++++++++
>> 4 files changed, 414 insertions(+)
>> create mode 100644 drivers/gpu/drm/panel/panel-mipi-dbi.c
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index d03ad8da1f36..8baa98723bdc 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -6047,6 +6047,14 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
>> F: Documentation/devicetree/bindings/display/multi-inno,mi0283qt.txt
>> F: drivers/gpu/drm/tiny/mi0283qt.c
>>
>> +DRM DRIVER FOR MIPI DBI compatible panels
>> +M: Noralf Trønnes <noralf@tronnes.org>
>> +S: Maintained
>> +W: https://github.com/notro/panel-mipi-dbi/wiki
>> +T: git git://anongit.freedesktop.org/drm/drm-misc
>> +F: Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
>> +F: drivers/gpu/drm/panel/panel-mipi-dbi.c
>> +
>> DRM DRIVER FOR MSM ADRENO GPU
>> M: Rob Clark <robdclark@gmail.com>
>> M: Sean Paul <sean@poorly.run>
>> diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
>> index 434c2861bb40..1851cda5f877 100644
>> --- a/drivers/gpu/drm/panel/Kconfig
>> +++ b/drivers/gpu/drm/panel/Kconfig
>> @@ -274,6 +274,17 @@ config DRM_PANEL_LG_LG4573
>> Say Y here if you want to enable support for LG4573 RGB panel.
>> To compile this driver as a module, choose M here.
>>
>> +config DRM_PANEL_MIPI_DBI
>> + tristate "MIPI DBI compatible panel"
>> + depends on SPI
>> + depends on BACKLIGHT_CLASS_DEVICE
>> + depends on DRM_KMS_HELPER
>> + select DRM_KMS_CMA_HELPER
>> + select DRM_MIPI_DBI
>> + help
>> + Say Y here if you want to enable support for MIPI DBI compatible panels.
>> + To compile this driver as a module, choose M here.
>> +
>> config DRM_PANEL_NEC_NL8048HL11
>> tristate "NEC NL8048HL11 RGB panel"
>> depends on GPIOLIB && OF && SPI
>> diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
>> index d99fbbce49d1..a90c30459964 100644
>> --- a/drivers/gpu/drm/panel/Makefile
>> +++ b/drivers/gpu/drm/panel/Makefile
>> @@ -25,6 +25,7 @@ obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W) += panel-leadtek-ltk050h3146w.o
>> obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829) += panel-leadtek-ltk500hd1829.o
>> obj-$(CONFIG_DRM_PANEL_LG_LB035Q02) += panel-lg-lb035q02.o
>> obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o
>> +obj-$(CONFIG_DRM_PANEL_MIPI_DBI) += panel-mipi-dbi.o
>> obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o
>> obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o
>> obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o
>> diff --git a/drivers/gpu/drm/panel/panel-mipi-dbi.c b/drivers/gpu/drm/panel/panel-mipi-dbi.c
>> new file mode 100644
>> index 000000000000..6e3dc2de21d2
>> --- /dev/null
>> +++ b/drivers/gpu/drm/panel/panel-mipi-dbi.c
>> @@ -0,0 +1,394 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * DRM driver for MIPI DBI compatible display panels
>> + *
>> + * Copyright 2022 Noralf Trønnes
>> + */
>> +
>> +#include <linux/backlight.h>
>> +#include <linux/delay.h>
>> +#include <linux/firmware.h>
>> +#include <linux/gpio/consumer.h>
>> +#include <linux/module.h>
>> +#include <linux/property.h>
>> +#include <linux/regulator/consumer.h>
>> +#include <linux/spi/spi.h>
>> +
>> +#include <drm/drm_atomic_helper.h>
>> +#include <drm/drm_drv.h>
>> +#include <drm/drm_fb_helper.h>
>> +#include <drm/drm_gem_atomic_helper.h>
>> +#include <drm/drm_gem_cma_helper.h>
>> +#include <drm/drm_managed.h>
>> +#include <drm/drm_mipi_dbi.h>
>> +#include <drm/drm_modeset_helper.h>
>> +#include <video/mipi_display.h>
>> +
>> +static const u8 panel_mipi_dbi_magic[15] = { 'M', 'I', 'P', 'I', ' ', 'D', 'B', 'I',
>> + 0, 0, 0, 0, 0, 0, 0 };
>> +
>> +/*
>> + * The display panel configuration is stored in a firmware file. The Device Tree 'compatible'
>> + * property value with a '.bin' suffix is passed to request_firmware() to fetch this file.
>> + */
>> +struct panel_mipi_dbi_config {
>> + /* Magic string: panel_mipi_dbi_magic */
>> + u8 magic[15];
>> +
>> + /* Config file format version */
>> + u8 file_format_version;
>> +
>> + /* Width in pixels */
>> + __be16 width;
>> + /* Height in pixels */
>> + __be16 height;
>> +
>> + /* Width in millimeters (optional) */
>> + __be16 width_mm;
>> + /* Height in millimeters (optional) */
>> + __be16 height_mm;
>> +
>> + /* X-axis panel offset */
>> + __be16 x_offset;
>> + /* Y-axis panel offset */
>> + __be16 y_offset;
>> +
>> + /* 4 pad bytes, must be zero */
>> + u8 pad[4];
>> +
>> + /*
>> + * Optional MIPI commands to execute when the display pipeline is enabled.
>> + * This can be used to configure the display controller.
>> + *
>> + * The commands are stored in a byte array with the format:
>> + * command, num_parameters, [ parameter, ...], command, ...
>> + *
>> + * Some commands require a pause before the next command can be received.
>> + * Inserting a delay in the command sequence is done by using the NOP command with one
>> + * parameter: delay in miliseconds (the No Operation command is part of the MIPI Display
>> + * Command Set where it has no parameters).
>> + *
>> + * Example:
>> + * command 0x11
>> + * sleep 120ms
>> + * command 0xb1 parameters 0x01, 0x2c, 0x2d
>> + * command 0x29
>> + *
>> + * Byte sequence:
>> + * 0x11 0x00
>> + * 0x00 0x01 0x78
>> + * 0xb1 0x03 0x01 0x2c 0x2d
>> + * 0x29 0x00
>> + */
>> + u8 commands[];
>> +};
>
> I'm not really a fan of parsing raw data in the kernel. I guess we can't
> really avoid the introduction of a special case to sleep, but we already
> have dt properties for all of the other properties (but X and Y offset,
> maybe?)
>
> Maybe we should use those instead?
>
I don't understand your reluctance to parsing data, lots of ioctls do
it. And this data can only be loaded by root. What I like about having
these properties in the config file is that the binding becomes a
fallback binding that can actually be made to work without changing the
Device Tree.
For arguments sake let's say tiny/st7735r.c was not built and we had
this node:
display@0{
compatible = "jianda,jd-t18003-t01", "sitronix,st7735r",
"panel-mipi-dbi-spi";
};
It will still be possible to use this display without changing the
Device Tree. Just add a firmware/config file.
Having the properties in DT it would have to look like this for the
fallback to work:
display@0{
compatible = "jianda,jd-t18003-t01", "sitronix,st7735r",
"panel-mipi-dbi-spi";
panel-timing = {
hactive = <128>;
vactive = <128>;
};
width-mm = <25>;
height-mm = <26>;
x-offset = <2>;
y-offset = <3>;
};
Is this important, I'm not sure. What do you think?
The users I care most about have DT overlays so for them it doesn't
matter much where the properties are.
Noralf.
^ permalink raw reply
* [PATCH v2 2/4] iio: adc: xilinx-ams: Fixed missing PS channels
From: Robert Hancock @ 2022-01-27 17:34 UTC (permalink / raw)
To: linux-iio
Cc: anand.ashok.dumbre, jic23, lars, robh+dt, michal.simek,
manish.narani, devicetree, Robert Hancock, Michael Tretter
In-Reply-To: <20220127173450.3684318-1-robert.hancock@calian.com>
The code forgot to increment num_channels for the PS channel inputs,
resulting in them not being enabled as they should.
Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Reviewed-by: Michael Tretter <m.tretter@pengutronix.de>
---
drivers/iio/adc/xilinx-ams.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c
index 8343c5f74121..b93864362dac 100644
--- a/drivers/iio/adc/xilinx-ams.c
+++ b/drivers/iio/adc/xilinx-ams.c
@@ -1224,6 +1224,7 @@ static int ams_init_module(struct iio_dev *indio_dev,
/* add PS channels to iio device channels */
memcpy(channels, ams_ps_channels, sizeof(ams_ps_channels));
+ num_channels = ARRAY_SIZE(ams_ps_channels);
} else if (fwnode_property_match_string(fwnode, "compatible",
"xlnx,zynqmp-ams-pl") == 0) {
ams->pl_base = fwnode_iomap(fwnode, 0);
--
2.31.1
^ permalink raw reply related
* [PATCH v2 3/4] iio: adc: xilinx-ams: Fixed wrong sequencer register settings
From: Robert Hancock @ 2022-01-27 17:34 UTC (permalink / raw)
To: linux-iio
Cc: anand.ashok.dumbre, jic23, lars, robh+dt, michal.simek,
manish.narani, devicetree, Robert Hancock, Michael Tretter
In-Reply-To: <20220127173450.3684318-1-robert.hancock@calian.com>
Register settings used for the sequencer configuration register
were incorrect, causing some inputs to not be read properly.
Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Reviewed-by: Michael Tretter <m.tretter@pengutronix.de>
---
drivers/iio/adc/xilinx-ams.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c
index b93864362dac..199027c93cdc 100644
--- a/drivers/iio/adc/xilinx-ams.c
+++ b/drivers/iio/adc/xilinx-ams.c
@@ -91,8 +91,8 @@
#define AMS_CONF1_SEQ_MASK GENMASK(15, 12)
#define AMS_CONF1_SEQ_DEFAULT FIELD_PREP(AMS_CONF1_SEQ_MASK, 0)
-#define AMS_CONF1_SEQ_CONTINUOUS FIELD_PREP(AMS_CONF1_SEQ_MASK, 1)
-#define AMS_CONF1_SEQ_SINGLE_CHANNEL FIELD_PREP(AMS_CONF1_SEQ_MASK, 2)
+#define AMS_CONF1_SEQ_CONTINUOUS FIELD_PREP(AMS_CONF1_SEQ_MASK, 2)
+#define AMS_CONF1_SEQ_SINGLE_CHANNEL FIELD_PREP(AMS_CONF1_SEQ_MASK, 3)
#define AMS_REG_SEQ0_MASK GENMASK(15, 0)
#define AMS_REG_SEQ2_MASK GENMASK(21, 16)
--
2.31.1
^ permalink raw reply related
* [PATCH v2 4/4] iio: adc: xilinx-ams: Fix single channel switching sequence
From: Robert Hancock @ 2022-01-27 17:34 UTC (permalink / raw)
To: linux-iio
Cc: anand.ashok.dumbre, jic23, lars, robh+dt, michal.simek,
manish.narani, devicetree, Robert Hancock
In-Reply-To: <20220127173450.3684318-1-robert.hancock@calian.com>
Some of the AMS channels need to be read by switching into single-channel
mode from the normal polling sequence. There was a logic issue in this
switching code that could cause the first read of these channels to read
back as zero.
It appears that the sequencer should be set back to default mode before
changing the channel selection, and the channel should be set before
switching the sequencer back into single-channel mode.
Also, write 1 to the EOC bit in the status register to clear it before
waiting for it to become set, so that we actually wait for a new
conversion to complete, and don't proceed based on a previous conversion
completing.
Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
---
drivers/iio/adc/xilinx-ams.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c
index 199027c93cdc..7bf097fa10cb 100644
--- a/drivers/iio/adc/xilinx-ams.c
+++ b/drivers/iio/adc/xilinx-ams.c
@@ -530,14 +530,18 @@ static int ams_enable_single_channel(struct ams *ams, unsigned int offset)
return -EINVAL;
}
- /* set single channel, sequencer off mode */
+ /* put sysmon in a soft reset to change the sequence */
ams_ps_update_reg(ams, AMS_REG_CONFIG1, AMS_CONF1_SEQ_MASK,
- AMS_CONF1_SEQ_SINGLE_CHANNEL);
+ AMS_CONF1_SEQ_DEFAULT);
/* write the channel number */
ams_ps_update_reg(ams, AMS_REG_CONFIG0, AMS_CONF0_CHANNEL_NUM_MASK,
channel_num);
+ /* set single channel, sequencer off mode */
+ ams_ps_update_reg(ams, AMS_REG_CONFIG1, AMS_CONF1_SEQ_MASK,
+ AMS_CONF1_SEQ_SINGLE_CHANNEL);
+
return 0;
}
@@ -551,6 +555,8 @@ static int ams_read_vcc_reg(struct ams *ams, unsigned int offset, u32 *data)
if (ret)
return ret;
+ /* clear end-of-conversion flag, wait for next conversion to complete */
+ writel(expect, ams->base + AMS_ISR_1);
ret = readl_poll_timeout(ams->base + AMS_ISR_1, reg, (reg & expect),
AMS_INIT_POLL_TIME_US, AMS_INIT_TIMEOUT_US);
if (ret)
--
2.31.1
^ permalink raw reply related
* [PATCH v2 1/4] dt-bindings: iio: adc: zynqmp_ams: Add clock entry
From: Robert Hancock @ 2022-01-27 17:34 UTC (permalink / raw)
To: linux-iio
Cc: anand.ashok.dumbre, jic23, lars, robh+dt, michal.simek,
manish.narani, devicetree, Robert Hancock
In-Reply-To: <20220127173450.3684318-1-robert.hancock@calian.com>
The AMS driver DT binding was missing the clock entry, which is actually
mandatory according to the driver implementation. Add this in.
Fixes: 39dd2d1e251d ("dt-bindings: iio: adc: Add Xilinx AMS binding documentation")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
---
.../devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml b/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
index 87992db389b2..3698b4b0900f 100644
--- a/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
@@ -92,6 +92,10 @@ properties:
description: AMS Controller register space
maxItems: 1
+ clocks:
+ items:
+ - description: AMS reference clock
+
ranges:
description:
Maps the child address space for PS and/or PL.
@@ -181,12 +185,15 @@ properties:
required:
- compatible
- reg
+ - clocks
- ranges
additionalProperties: false
examples:
- |
+ #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
+
bus {
#address-cells = <2>;
#size-cells = <2>;
@@ -196,6 +203,7 @@ examples:
interrupt-parent = <&gic>;
interrupts = <0 56 4>;
reg = <0x0 0xffa50000 0x0 0x800>;
+ clocks = <&zynqmp_clk AMS_REF>;
#address-cells = <1>;
#size-cells = <1>;
#io-channel-cells = <1>;
--
2.31.1
^ permalink raw reply related
* [PATCH v2 0/4] Xilinx AMS fixes
From: Robert Hancock @ 2022-01-27 17:34 UTC (permalink / raw)
To: linux-iio
Cc: anand.ashok.dumbre, jic23, lars, robh+dt, michal.simek,
manish.narani, devicetree, Robert Hancock
Various fixes for the Xilinx AMS driver.
Changes since v1:
-drop addition to ZynqMP device tree, will be submitted elsewhere
-add patch to fix DT binding to add missing clock entry
Robert Hancock (4):
dt-bindings: iio: adc: zynqmp_ams: Add clock entry
iio: adc: xilinx-ams: Fixed missing PS channels
iio: adc: xilinx-ams: Fixed wrong sequencer register settings
iio: adc: xilinx-ams: Fix single channel switching sequence
.../bindings/iio/adc/xlnx,zynqmp-ams.yaml | 8 ++++++++
drivers/iio/adc/xilinx-ams.c | 15 +++++++++++----
2 files changed, 19 insertions(+), 4 deletions(-)
--
2.31.1
^ permalink raw reply
* Re: [PATCH v2 0/3] drm/panel: Add MIPI DBI compatible SPI driver
From: David Lechner @ 2022-01-27 17:13 UTC (permalink / raw)
To: Noralf Trønnes, robh+dt, thierry.reding
Cc: sam, maxime, dave.stevenson, devicetree, dri-devel
In-Reply-To: <20220125175700.37408-1-noralf@tronnes.org>
On 1/25/22 11:56 AM, Noralf Trønnes wrote:
> Hi,
>
> This patchset adds a driver that will work with most MIPI DBI compatible
> SPI panels out there.
>
> It's a follow up on 'drm/tiny/st7735r: Match up with staging/fbtft
> driver'[1] which aimed at making the st7735r driver work with all panels
> adding DT properties.
>
> Maxime gave[2] a good overview of the situation with these displays and
> proposed to make a driver that works with all MIPI DBI compatible
> controllers and use a firmware file to provide the controller setup for
> a particular panel.
>
> Main change since previous version:
> - Drop model property and use the compatible property instead (Rob)
>
> Noralf.
>
> [1] https://lore.kernel.org/dri-devel/20211124150757.17929-1-noralf@tronnes.org/
> [2] https://lore.kernel.org/dri-devel/20211129093946.xhp22mvdut3m67sc@houat/
>
>
> Noralf Trønnes (3):
> dt-bindings: display: add bindings for MIPI DBI compatible SPI panels
> drm/mipi-dbi: Add driver_private member to struct mipi_dbi_dev
> drm/panel: Add MIPI DBI compatible SPI driver
>
> .../display/panel/panel-mipi-dbi-spi.yaml | 59 +++
> MAINTAINERS | 8 +
> drivers/gpu/drm/panel/Kconfig | 11 +
> drivers/gpu/drm/panel/Makefile | 1 +
> drivers/gpu/drm/panel/panel-mipi-dbi.c | 394 ++++++++++++++++++
> include/drm/drm_mipi_dbi.h | 2 +
> 6 files changed, 475 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> create mode 100644 drivers/gpu/drm/panel/panel-mipi-dbi.c
>
It would be useful to also include a patch for a tool to create
these "firmware" files. For example a Python script that takes
a more human-readable input and generates a .bin file.
^ permalink raw reply
* [PATCH 3/3] arm64: dts: ls1028a-qds: make the QIXIS CPLD use the simple-mfd-i2c.c driver
From: Vladimir Oltean @ 2022-01-27 17:21 UTC (permalink / raw)
To: Shawn Guo, Lee Jones
Cc: Andrew Lunn, Florian Fainelli, Claudiu Manoil, Rob Herring,
Li Yang, Michael Walle, netdev, devicetree, linux-kernel,
linux-arm-kernel
In-Reply-To: <20220127172105.4085950-1-vladimir.oltean@nxp.com>
The MDIO mux on the LS1028A-QDS never worked in mainline. The device
tree was submitted as-is, and there is a downstream driver for the QIXIS
FPGA:
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/tree/drivers/soc/fsl/qixis_ctrl.c?h=lf-5.10.72-2.2.0
That driver is very similar to the already existing drivers/mfd/simple-mfd-i2c.c,
and the hardware works with the simple-mfd-i2c driver, so there isn't
any reason to upstream the other one.
This change adapts the compatible string and child node format of the
FPGA node, so that the simple-mfd-i2c driver accepts it.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
index 177bc1405f0f..6bd58fd9c90f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
@@ -314,17 +314,18 @@ sgtl5000: audio-codec@a {
};
fpga@66 {
- compatible = "fsl,ls1028aqds-fpga", "fsl,fpga-qixis-i2c",
- "simple-mfd";
+ compatible = "fsl,ls1028a-qds-qixis-i2c";
reg = <0x66>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- mux: mux-controller {
+ mux: mux-controller@54 {
compatible = "reg-mux";
+ reg = <0x54>;
#mux-control-cells = <1>;
mux-reg-masks = <0x54 0xf0>; /* 0: reg 0x54, bits 7:4 */
};
};
-
};
&i2c1 {
--
2.25.1
^ permalink raw reply related
* [PATCH 2/3] dt-bindings: mfd: add "fsl,ls1028a-qds-qixis-i2c" compatible to sl28cpld
From: Vladimir Oltean @ 2022-01-27 17:21 UTC (permalink / raw)
To: Shawn Guo, Lee Jones
Cc: Andrew Lunn, Florian Fainelli, Claudiu Manoil, Rob Herring,
Li Yang, Michael Walle, netdev, devicetree, linux-kernel,
linux-arm-kernel
In-Reply-To: <20220127172105.4085950-1-vladimir.oltean@nxp.com>
The LS1028A-QDS QIXIS FPGA has no problem working with the
simple-mfd-i2c.c driver, so extend the list of compatible strings to
include that part.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml
index eb3b43547cb6..8c1216eb36ee 100644
--- a/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml
+++ b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml
@@ -16,7 +16,9 @@ description: |
properties:
compatible:
- const: kontron,sl28cpld
+ enum:
+ - fsl,ls1028a-qds-qixis-i2c
+ - kontron,sl28cpld
reg:
description:
--
2.25.1
^ permalink raw reply related
* [PATCH 1/3] mfd: simple-mfd-i2c: add compatible string for LS1028A-QDS FPGA
From: Vladimir Oltean @ 2022-01-27 17:21 UTC (permalink / raw)
To: Shawn Guo, Lee Jones
Cc: Andrew Lunn, Florian Fainelli, Claudiu Manoil, Rob Herring,
Li Yang, Michael Walle, netdev, devicetree, linux-kernel,
linux-arm-kernel
In-Reply-To: <20220127172105.4085950-1-vladimir.oltean@nxp.com>
As Michael mentions in the description of commit 3abee4579484 ("mfd: Add
simple regmap based I2C driver"), "If a device wants to use this as its
MFD core driver, it has to add an individual compatible string."
The QIXIS FPGA on the LS1028A-QDS boards has a similar purpose to the
Kontron SL28 CPLD: it deals with board power-on reset timing, muxing,
etc.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
drivers/mfd/simple-mfd-i2c.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mfd/simple-mfd-i2c.c b/drivers/mfd/simple-mfd-i2c.c
index 51536691ad9d..fee709fed97a 100644
--- a/drivers/mfd/simple-mfd-i2c.c
+++ b/drivers/mfd/simple-mfd-i2c.c
@@ -63,6 +63,7 @@ static int simple_mfd_i2c_probe(struct i2c_client *i2c)
}
static const struct of_device_id simple_mfd_i2c_of_match[] = {
+ { .compatible = "fsl,ls1028a-qds-qixis-i2c" },
{ .compatible = "kontron,sl28cpld" },
{}
};
--
2.25.1
^ permalink raw reply related
* [PATCH 0/3] Use sl28cpld driver for the LS1028A-QDS QIXIS FPGA
From: Vladimir Oltean @ 2022-01-27 17:21 UTC (permalink / raw)
To: Shawn Guo, Lee Jones
Cc: Andrew Lunn, Florian Fainelli, Claudiu Manoil, Rob Herring,
Li Yang, Michael Walle, netdev, devicetree, linux-kernel,
linux-arm-kernel
Patches 1-2 are intended for Lee Jones (mfd) and patch 3 for Shawn Guo
(devicetree). Included all in the same patchset because they're small
and depend on each other.
With these changes, the mdio mux on the NXP LS1028A-QDS boards, which is
controlled through the QIXIS FPGA, works properly without the need for
any additional driver.
Vladimir Oltean (3):
mfd: simple-mfd-i2c: add compatible string for LS1028A-QDS FPGA
dt-bindings: mfd: add "fsl,ls1028a-qds-qixis-i2c" compatible to
sl28cpld
arm64: dts: ls1028a-qds: make the QIXIS CPLD use the simple-mfd-i2c.c
driver
.../devicetree/bindings/mfd/kontron,sl28cpld.yaml | 4 +++-
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts | 9 +++++----
drivers/mfd/simple-mfd-i2c.c | 1 +
3 files changed, 9 insertions(+), 5 deletions(-)
--
2.25.1
^ permalink raw reply
* Re: [PATCH v2 3/3] drm/panel: Add MIPI DBI compatible SPI driver
From: David Lechner @ 2022-01-27 17:19 UTC (permalink / raw)
To: Noralf Trønnes, robh+dt, thierry.reding
Cc: sam, maxime, dave.stevenson, devicetree, dri-devel
In-Reply-To: <20220125175700.37408-4-noralf@tronnes.org>
On 1/25/22 11:57 AM, Noralf Trønnes wrote:
> Add a driver that will work with most MIPI DBI compatible SPI panels.
> This avoids adding a driver for every new MIPI DBI compatible controller
> that is to be used by Linux. The 'compatible' Device Tree property with
> a '.bin' suffix will be used to load a firmware file that contains the
> controller configuration.
>
> Example (driver will load sainsmart18.bin):
>
> display@0 {
> compatible = "sainsmart18", "panel-mipi-dbi-spi";
> reg = <0>;
> reset-gpios = <&gpio 25 0>;
> dc-gpios = <&gpio 24 0>;
> };
>
...
> +static int panel_mipi_dbi_spi_probe(struct spi_device *spi)
> +{
> + struct device *dev = &spi->dev;
> + struct drm_display_mode mode;
> + struct mipi_dbi_dev *dbidev;
> + const struct firmware *fw;
> + const char *compatible;
> + struct drm_device *drm;
> + struct property *prop;
> + bool fw_found = false;
> + struct mipi_dbi *dbi;
> + struct gpio_desc *dc;
> + char fw_name[40];
> + int ret;
> +
> + dbidev = devm_drm_dev_alloc(dev, &panel_mipi_dbi_driver, struct mipi_dbi_dev, drm);
> + if (IS_ERR(dbidev))
> + return PTR_ERR(dbidev);
> +
> + dbi = &dbidev->dbi;
> + drm = &dbidev->drm;
> +
> + of_property_for_each_string(dev->of_node, "compatible", prop, compatible) {
> + snprintf(fw_name, sizeof(fw_name), "%s.bin", compatible);
> +
> + ret = firmware_request_nowarn(&fw, fw_name, dev);
> + if (ret) {
> + drm_dbg(drm, "No config file found for compatible: '%s' (error=%d)\n",
> + compatible, ret);
> + continue;
> + }
> +
Should we add a directory prefix to the firmware file name to avoid the possibility of
file name clashes with unrelated firmwares?
^ permalink raw reply
* Re: [PATCH net-next v4 2/2] net: dsa: microchip: Add property to disable reference clock
From: Florian Fainelli @ 2022-01-27 16:57 UTC (permalink / raw)
To: Robert Hancock, netdev
Cc: woojung.huh, UNGLinuxDriver, andrew, vivien.didelot, olteanv,
davem, kuba, robh+dt, marex, devicetree
In-Reply-To: <20220127164156.3677856-3-robert.hancock@calian.com>
On 1/27/2022 8:41 AM, Robert Hancock wrote:
> Add a new microchip,synclko-disable property which can be specified
> to disable the reference clock output from the device if not required
> by the board design.
>
> Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
^ permalink raw reply
* Re: [PATCH net-next v4 1/2] net: dsa: microchip: Document property to disable reference clock
From: Florian Fainelli @ 2022-01-27 16:56 UTC (permalink / raw)
To: Robert Hancock, netdev
Cc: woojung.huh, UNGLinuxDriver, andrew, vivien.didelot, olteanv,
davem, kuba, robh+dt, marex, devicetree, Rob Herring
In-Reply-To: <20220127164156.3677856-2-robert.hancock@calian.com>
On 1/27/2022 8:41 AM, Robert Hancock wrote:
> Document the new microchip,synclko-disable property which can be
> specified to disable the reference clock output from the device if not
> required by the board design.
>
> Signed-off-by: Robert Hancock <robert.hancock@calian.com>
> Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
^ permalink raw reply
* [PATCH net-next v4 0/2] Allow disabling KSZ switch refclock
From: Robert Hancock @ 2022-01-27 16:41 UTC (permalink / raw)
To: netdev
Cc: woojung.huh, UNGLinuxDriver, andrew, vivien.didelot, f.fainelli,
olteanv, davem, kuba, robh+dt, marex, devicetree, Robert Hancock
The reference clock output from the KSZ9477 and related Microchip
switch devices is not required on all board designs. Add a device
tree property to disable it for power and EMI reasons.
Changes since v3:
-rework some code for simplicity
Changes since v2:
-check for conflicting options in DT, added note in bindings doc
Changes since v1:
-added Acked-by on patch 1, rebase to net-next
Robert Hancock (2):
net: dsa: microchip: Document property to disable reference clock
net: dsa: microchip: Add property to disable reference clock
.../devicetree/bindings/net/dsa/microchip,ksz.yaml | 6 ++++++
drivers/net/dsa/microchip/ksz9477.c | 9 ++++++---
drivers/net/dsa/microchip/ksz_common.c | 6 ++++++
drivers/net/dsa/microchip/ksz_common.h | 1 +
4 files changed, 19 insertions(+), 3 deletions(-)
--
2.31.1
^ permalink raw reply
* [PATCH net-next v4 2/2] net: dsa: microchip: Add property to disable reference clock
From: Robert Hancock @ 2022-01-27 16:41 UTC (permalink / raw)
To: netdev
Cc: woojung.huh, UNGLinuxDriver, andrew, vivien.didelot, f.fainelli,
olteanv, davem, kuba, robh+dt, marex, devicetree, Robert Hancock
In-Reply-To: <20220127164156.3677856-1-robert.hancock@calian.com>
Add a new microchip,synclko-disable property which can be specified
to disable the reference clock output from the device if not required
by the board design.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
---
drivers/net/dsa/microchip/ksz9477.c | 9 ++++++---
drivers/net/dsa/microchip/ksz_common.c | 6 ++++++
drivers/net/dsa/microchip/ksz_common.h | 1 +
3 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c
index 353b5f981740..a85d990896b0 100644
--- a/drivers/net/dsa/microchip/ksz9477.c
+++ b/drivers/net/dsa/microchip/ksz9477.c
@@ -222,9 +222,12 @@ static int ksz9477_reset_switch(struct ksz_device *dev)
(BROADCAST_STORM_VALUE *
BROADCAST_STORM_PROT_RATE) / 100);
- if (dev->synclko_125)
- ksz_write8(dev, REG_SW_GLOBAL_OUTPUT_CTRL__1,
- SW_ENABLE_REFCLKO | SW_REFCLKO_IS_125MHZ);
+ data8 = SW_ENABLE_REFCLKO;
+ if (dev->synclko_disable)
+ data8 = 0;
+ else if (dev->synclko_125)
+ data8 = SW_ENABLE_REFCLKO | SW_REFCLKO_IS_125MHZ;
+ ksz_write8(dev, REG_SW_GLOBAL_OUTPUT_CTRL__1, data8);
return 0;
}
diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c
index 55dbda04ea62..7e33ec73f803 100644
--- a/drivers/net/dsa/microchip/ksz_common.c
+++ b/drivers/net/dsa/microchip/ksz_common.c
@@ -434,6 +434,12 @@ int ksz_switch_register(struct ksz_device *dev,
}
dev->synclko_125 = of_property_read_bool(dev->dev->of_node,
"microchip,synclko-125");
+ dev->synclko_disable = of_property_read_bool(dev->dev->of_node,
+ "microchip,synclko-disable");
+ if (dev->synclko_125 && dev->synclko_disable) {
+ dev_err(dev->dev, "inconsistent synclko settings\n");
+ return -EINVAL;
+ }
}
ret = dsa_register_switch(dev->ds);
diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h
index df8ae59c8525..3db63f62f0a1 100644
--- a/drivers/net/dsa/microchip/ksz_common.h
+++ b/drivers/net/dsa/microchip/ksz_common.h
@@ -75,6 +75,7 @@ struct ksz_device {
u32 regs_size;
bool phy_errata_9477;
bool synclko_125;
+ bool synclko_disable;
struct vlan_table *vlan_cache;
--
2.31.1
^ permalink raw reply related
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