* Re: [PATCH v14, 2/2] net: Add dm9051 driver
From: Jakub Kicinski @ 2022-01-28 1:57 UTC (permalink / raw)
To: Joseph CHAMG
Cc: David S . Miller, Rob Herring, joseph_chang, netdev, devicetree,
linux-kernel, andy.shevchenko, andrew, leon
In-Reply-To: <20220127032701.23056-3-josright123@gmail.com>
On Thu, 27 Jan 2022 11:27:01 +0800 Joseph CHAMG wrote:
> Add davicom dm9051 spi ethernet driver, The driver work for the
> device platform which has the spi master
>
> Signed-off-by: Joseph CHAMG <josright123@gmail.com>
> +/* event: write into the mac registers and eeprom directly
> + */
> +static int dm9051_set_mac_address(struct net_device *ndev, void *p)
> +{
> + struct board_info *db = to_dm9051_board(ndev);
> + int ret;
> +
> + ret = eth_mac_addr(ndev, p);
You should not be using this helper if the write can fail. See what
this function does internally and:
- put the eth_prepare_mac_addr_change() call here
> + if (ret < 0)
> + return ret;
> +
> + ret = regmap_bulk_write(db->regmap_dmbulk, DM9051_PAR, ndev->dev_addr, ETH_ALEN);
> + if (ret < 0)
> + netif_err(db, drv, ndev, "%s: error %d bulk writing reg %02x, len %d\n",
> + __func__, ret, DM9051_PAR, ETH_ALEN);
- put the eth_commit_mac_addr_change() call here
> + return ret;
> +}
> +static void dm9051_netdev(struct net_device *ndev)
> +{
> + ndev->mtu = 1500;
Unnecessary, ether_setup() does this already.
> + ndev->if_port = IF_PORT_100BASET;
Why set this? The if_port API is a leftover from very old 10Mbit
Ethernet days, we have ethtool link APIs now.
> + ndev->netdev_ops = &dm9051_netdev_ops;
> + ndev->ethtool_ops = &dm9051_ethtool_ops;
Just inline there two lines into the caller and remove the helper.
dm9051_netdev() does not sound like a function that does setup.
> +}
> +
> +static int dm9051_map_init(struct spi_device *spi, struct board_info *db)
> +{
> + /* create two regmap instances,
> + * run read/write and bulk_read/bulk_write individually,
> + * to resolve regmap execution confliction problem
> + */
> + regconfigdm.lock_arg = db;
> + db->regmap_dm = devm_regmap_init_spi(db->spidev, ®configdm);
> +
> + if (IS_ERR(db->regmap_dm))
> + return PTR_ERR_OR_ZERO(db->regmap_dm);
> +
> + regconfigdmbulk.lock_arg = db;
> + db->regmap_dmbulk = devm_regmap_init_spi(db->spidev, ®configdmbulk);
> +
Please remove all the empty lines between function call and error
checking the result.
> + if (IS_ERR(db->regmap_dmbulk))
> + return PTR_ERR_OR_ZERO(db->regmap_dmbulk);
Why _OR_ZERO() when you're in a IS_ERR() condition already?
> + return 0;
> + ret = devm_register_netdev(dev, ndev);
> + if (ret) {
> + dev_err(dev, "failed to register network device\n");
> + kthread_stop(db->kwr_task_kw);
> + phy_disconnect(db->phydev);
> + return ret;
> + }
> +
> + skb_queue_head_init(&db->txq);
All the state must be initialized before netdev is registered,
otherwise another thread may immediately open the device and
start to transmit.
> + return 0;
> +
> +err_stopthread:
> + kthread_stop(db->kwr_task_kw);
> + return ret;
> +}
^ permalink raw reply
* Re: [PATCH v14, 2/2] net: Add dm9051 driver
From: Andrew Lunn @ 2022-01-28 2:18 UTC (permalink / raw)
To: Joseph CHAMG
Cc: David S . Miller, Jakub Kicinski, Rob Herring, joseph_chang,
netdev, devicetree, linux-kernel, andy.shevchenko, leon
In-Reply-To: <20220127032701.23056-3-josright123@gmail.com>
> +static int dm9051_mdiobus_read(struct mii_bus *bus, int addr, int regnum)
> +{
> + struct board_info *db = bus->priv;
> + unsigned int val = 0xffff;
> + int ret;
> +
> + if (addr == DM9051_PHY_ID) {
Thanks for fixing the variable name. But don't you think it would of
made sense to rename DM9051_PHY_ID as well? DM9051_PHY_ADDR?
> +static int dm9051_set_pauseparam(struct net_device *ndev,
> + struct ethtool_pauseparam *pause)
> +{
> + struct board_info *db = to_dm9051_board(ndev);
> + u8 fcr = 0;
> + int ret;
> +
> + db->eth_pause = *pause;
> +
> + if (pause->autoneg)
> + db->phydev->autoneg = AUTONEG_ENABLE;
> + else
> + db->phydev->autoneg = AUTONEG_DISABLE;
> +
pause->autoneg means that pause is negotiated as part of autoneg in
general. But pause->autoneg does not mean turn on autoneg. The
ksetting calls should be used for that.
If pause->autoneg is false, you write the pause settings direct to the
MAC. If it is true, you should call phy_set_sym_pause(). Once
negotiation has completed the link change callback will be called, and
you program the MAC with what has been negotiated.
Andrew
^ permalink raw reply
* [PATCH -next] spi: Fix compiler warning for kernel test
From: Li-hao Kuo @ 2022-01-28 2:21 UTC (permalink / raw)
To: broonie, sfr, linux-spi, devicetree, linux-kernel
Cc: wells.lu, lh.kuo, Li-hao Kuo
---
drivers/spi/spi-sunplus-sp7021.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-sunplus-sp7021.c b/drivers/spi/spi-sunplus-sp7021.c
index 627b9c3..d45b5dd 100644
--- a/drivers/spi/spi-sunplus-sp7021.c
+++ b/drivers/spi/spi-sunplus-sp7021.c
@@ -124,7 +124,7 @@ static int sp7021_spi_slave_abort(struct spi_controller *ctlr)
return 0;
}
-int sp7021_spi_slave_tx(struct spi_device *spi, struct spi_transfer *xfer)
+static int sp7021_spi_slave_tx(struct spi_device *spi, struct spi_transfer *xfer)
{
struct sp7021_spi_ctlr *pspim = spi_controller_get_devdata(spi->controller);
@@ -142,7 +142,7 @@ int sp7021_spi_slave_tx(struct spi_device *spi, struct spi_transfer *xfer)
return 0;
}
-int sp7021_spi_slave_rx(struct spi_device *spi, struct spi_transfer *xfer)
+static int sp7021_spi_slave_rx(struct spi_device *spi, struct spi_transfer *xfer)
{
struct sp7021_spi_ctlr *pspim = spi_controller_get_devdata(spi->controller);
int ret = 0;
@@ -160,7 +160,7 @@ int sp7021_spi_slave_rx(struct spi_device *spi, struct spi_transfer *xfer)
return ret;
}
-void sp7021_spi_master_rb(struct sp7021_spi_ctlr *pspim, unsigned int len)
+static void sp7021_spi_master_rb(struct sp7021_spi_ctlr *pspim, unsigned int len)
{
int i;
@@ -171,7 +171,7 @@ void sp7021_spi_master_rb(struct sp7021_spi_ctlr *pspim, unsigned int len)
}
}
-void sp7021_spi_master_wb(struct sp7021_spi_ctlr *pspim, unsigned int len)
+static void sp7021_spi_master_wb(struct sp7021_spi_ctlr *pspim, unsigned int len)
{
int i;
@@ -557,6 +557,7 @@ static int __maybe_unused sp7021_spi_controller_resume(struct device *dev)
return clk_prepare_enable(pspim->spi_clk);
}
+#ifdef CONFIG_PM
static int sp7021_spi_runtime_suspend(struct device *dev)
{
struct spi_controller *ctlr = dev_get_drvdata(dev);
@@ -572,6 +573,7 @@ static int sp7021_spi_runtime_resume(struct device *dev)
return reset_control_deassert(pspim->rstc);
}
+#endif
static const struct dev_pm_ops sp7021_spi_pm_ops = {
SET_RUNTIME_PM_OPS(sp7021_spi_runtime_suspend,
--
2.7.4
^ permalink raw reply related
* [PATCH -next] dt-bindings:spi: Fix error for test.
From: Li-hao Kuo @ 2022-01-28 2:34 UTC (permalink / raw)
To: broonie, robh+dt, linux-spi, devicetree, linux-kernel
Cc: wells.lu, lh.kuo, Li-hao Kuo
Fix error for test remove the include path and modify parameters
---
Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml b/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml
index 24382cd..3dd164d 100644
--- a/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml
@@ -20,8 +20,7 @@ properties:
reg:
items:
- - the SPI master registers
- - the SPI slave registers
+ minItems: 2
reg-names:
items:
@@ -59,8 +58,6 @@ unevaluatedProperties: false
examples:
- |
- #include <dt-bindings/clock/sp-sp7021.h>
- #include <dt-bindings/reset/sp-sp7021.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi@9C002D80 {
compatible = "sunplus,sp7021-spi";
@@ -73,8 +70,8 @@ examples:
interrupts = <144 IRQ_TYPE_LEVEL_HIGH>,
<146 IRQ_TYPE_LEVEL_HIGH>,
<145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc SPI_COMBO_0>;
- resets = <&rstc RST_SPI_COMBO_0>;
+ clocks = <&clkc 0x32>;
+ resets = <&rstc 0x22>;
pinctrl-names = "default";
pinctrl-0 = <&pins_spi0>;
};
--
2.7.4
^ permalink raw reply related
* [PATCH 00/13] soc: qcom: mdt_loader: Support Qualcomm SM8450
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
The Qualcomm SM8450 platform comes with both some smaller changes in the
firmware packaging and a new requirement to hold onto the metadata buffer until
PAS auth_and_reset has been completed.
Extend the PAS api and rework the mdt_loader to meet these new requirements,
then wire this up with the PAS remoteproc driver and finally add the SM8450
remoteproc instances.
Bjorn Andersson (13):
firmware: qcom: scm: Introduce pas_metadata context
soc: qcom: mdt_loader: Split out split-file-loader
soc: qcom: mdt_loader: Allow hash segment to be split out
soc: qcom: mdt_loader: Allow hash to reside in any segment
soc: qcom: mdt_loader: Extend check for split firmware
soc: qcom: mdt_loader: Reorder parts of __qcom_mdt_load()
soc: qcom: mdt_loader: Always invoke PAS mem_setup
soc: qcom: mdt_loader: Extract PAS operations
remoteproc: qcom: pas: Carry PAS metadata context
dt-bindings: remoteproc: qcom: pas: Add SM8450 PAS compatibles
remoteproc: qcom: pas: Add SM8450 remoteproc support
arm64: dts: qcom: sm8450: Add remoteproc enablers and instances
arm64: dts: qcom: sm8450-qrd: Enable remoteproc instances
.../bindings/remoteproc/qcom,adsp.yaml | 16 +
arch/arm64/boot/dts/qcom/sm8450-qrd.dts | 20 ++
arch/arm64/boot/dts/qcom/sm8450.dtsi | 297 ++++++++++++++++++
drivers/firmware/qcom_scm.c | 39 ++-
drivers/remoteproc/qcom_q6v5_mss.c | 7 +-
drivers/remoteproc/qcom_q6v5_pas.c | 36 ++-
drivers/soc/qcom/mdt_loader.c | 232 +++++++++-----
include/linux/qcom_scm.h | 10 +-
include/linux/soc/qcom/mdt_loader.h | 17 +-
9 files changed, 579 insertions(+), 95 deletions(-)
--
2.33.1
^ permalink raw reply
* [PATCH 01/13] firmware: qcom: scm: Introduce pas_metadata context
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
Starting with Qualcomm SM8450, some new security enhancements has been
done in the secure world, which results in the requirement to keep the
metadata segment accessible by the secure world from init_image() until
auth_and_reset().
Introduce a "PAS metadata context" object that can be passed to
init_image() for tracking the mapped memory and a related release
function for client drivers to release the mapping once either
auth_and_reset() has been invoked or in error handling paths on the way
there.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/firmware/qcom_scm.c | 39 ++++++++++++++++++++++++++++++-----
drivers/soc/qcom/mdt_loader.c | 2 +-
include/linux/qcom_scm.h | 10 ++++++++-
3 files changed, 44 insertions(+), 7 deletions(-)
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index 7db8066b19fd..3218d13cbf83 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -435,10 +435,16 @@ static void qcom_scm_set_download_mode(bool enable)
* and optional blob of data used for authenticating the metadata
* and the rest of the firmware
* @size: size of the metadata
+ * @ctx: optional metadata context
*
- * Returns 0 on success.
+ * Return: 0 on success.
+ *
+ * Upon successful return, the PAS metadata context (@ctx) will be used to
+ * track the metadata allocation, this needs to be released by invoking
+ * qcom_scm_pas_metadata_release() by the caller.
*/
-int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size)
+int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size,
+ struct qcom_scm_pas_metadata *ctx)
{
dma_addr_t mdata_phys;
void *mdata_buf;
@@ -467,7 +473,7 @@ int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size)
ret = qcom_scm_clk_enable();
if (ret)
- goto free_metadata;
+ goto out;
desc.args[1] = mdata_phys;
@@ -475,13 +481,36 @@ int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size)
qcom_scm_clk_disable();
-free_metadata:
- dma_free_coherent(__scm->dev, size, mdata_buf, mdata_phys);
+out:
+ if (ret < 0 || !ctx) {
+ dma_free_coherent(__scm->dev, size, mdata_buf, mdata_phys);
+ } else if (ctx) {
+ ctx->ptr = mdata_buf;
+ ctx->phys = mdata_phys;
+ ctx->size = size;
+ }
return ret ? : res.result[0];
}
EXPORT_SYMBOL(qcom_scm_pas_init_image);
+/**
+ * qcom_scm_pas_metadata_release() - release metadata context
+ * @ctx: metadata context
+ */
+void qcom_scm_pas_metadata_release(struct qcom_scm_pas_metadata *ctx)
+{
+ if (!ctx->ptr)
+ return;
+
+ dma_free_coherent(__scm->dev, ctx->size, ctx->ptr, ctx->phys);
+
+ ctx->ptr = NULL;
+ ctx->phys = 0;
+ ctx->size = 0;
+}
+EXPORT_SYMBOL(qcom_scm_pas_metadata_release);
+
/**
* qcom_scm_pas_mem_setup() - Prepare the memory related to a given peripheral
* for firmware loading
diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c
index 72fc2b539213..b00586db5391 100644
--- a/drivers/soc/qcom/mdt_loader.c
+++ b/drivers/soc/qcom/mdt_loader.c
@@ -171,7 +171,7 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
goto out;
}
- ret = qcom_scm_pas_init_image(pas_id, metadata, metadata_len);
+ ret = qcom_scm_pas_init_image(pas_id, metadata, metadata_len, NULL);
kfree(metadata);
if (ret) {
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
index 81cad9e1e412..4d8371410b05 100644
--- a/include/linux/qcom_scm.h
+++ b/include/linux/qcom_scm.h
@@ -68,8 +68,16 @@ extern int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus);
extern void qcom_scm_cpu_power_down(u32 flags);
extern int qcom_scm_set_remote_state(u32 state, u32 id);
+struct qcom_scm_pas_metadata {
+ void *ptr;
+ dma_addr_t phys;
+ ssize_t size;
+};
+
extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata,
- size_t size);
+ size_t size,
+ struct qcom_scm_pas_metadata *ctx);
+void qcom_scm_pas_metadata_release(struct qcom_scm_pas_metadata *ctx);
extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
phys_addr_t size);
extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
--
2.33.1
^ permalink raw reply related
* [PATCH 02/13] soc: qcom: mdt_loader: Split out split-file-loader
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
Spotted in a SM8450 device, the hash metadata segment is split out in a
separate .bNN file which means that the logic for loading split out
segmenents needs to be duplicated in qcom_mdt_read_metadata().
Split out the existing logic to a helper function that can be used in
both code paths.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/soc/qcom/mdt_loader.c | 72 ++++++++++++++++++++---------------
1 file changed, 41 insertions(+), 31 deletions(-)
diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c
index b00586db5391..c9e5bdfac371 100644
--- a/drivers/soc/qcom/mdt_loader.c
+++ b/drivers/soc/qcom/mdt_loader.c
@@ -31,6 +31,44 @@ static bool mdt_phdr_valid(const struct elf32_phdr *phdr)
return true;
}
+static ssize_t mdt_load_split_segment(void *ptr, const struct elf32_phdr *phdrs,
+ unsigned int segment, const char *fw_name,
+ struct device *dev)
+{
+ const struct elf32_phdr *phdr = &phdrs[segment];
+ const struct firmware *seg_fw;
+ char *seg_name;
+ ssize_t ret;
+
+ if (strlen(fw_name) < 4)
+ return -EINVAL;
+
+ seg_name = kstrdup(fw_name, GFP_KERNEL);
+ if (!seg_name)
+ return -ENOMEM;
+
+ sprintf(seg_name + strlen(fw_name) - 3, "b%02d", segment);
+ ret = request_firmware_into_buf(&seg_fw, seg_name, dev,
+ ptr, phdr->p_filesz);
+ if (ret) {
+ dev_err(dev, "error %zd loading %s\n", ret, seg_name);
+ kfree(seg_name);
+ return ret;
+ }
+
+ if (seg_fw->size != phdr->p_filesz) {
+ dev_err(dev,
+ "failed to load segment %d from truncated file %s\n",
+ segment, seg_name);
+ ret = -EINVAL;
+ }
+
+ release_firmware(seg_fw);
+ kfree(seg_name);
+
+ return ret;
+}
+
/**
* qcom_mdt_get_size() - acquire size of the memory region needed to load mdt
* @fw: firmware object for the mdt file
@@ -127,22 +165,19 @@ void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len)
EXPORT_SYMBOL_GPL(qcom_mdt_read_metadata);
static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
- const char *firmware, int pas_id, void *mem_region,
+ const char *fw_name, int pas_id, void *mem_region,
phys_addr_t mem_phys, size_t mem_size,
phys_addr_t *reloc_base, bool pas_init)
{
const struct elf32_phdr *phdrs;
const struct elf32_phdr *phdr;
const struct elf32_hdr *ehdr;
- const struct firmware *seg_fw;
phys_addr_t mem_reloc;
phys_addr_t min_addr = PHYS_ADDR_MAX;
phys_addr_t max_addr = 0;
size_t metadata_len;
- size_t fw_name_len;
ssize_t offset;
void *metadata;
- char *fw_name;
bool relocate = false;
void *ptr;
int ret = 0;
@@ -154,14 +189,6 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
ehdr = (struct elf32_hdr *)fw->data;
phdrs = (struct elf32_phdr *)(ehdr + 1);
- fw_name_len = strlen(firmware);
- if (fw_name_len <= 4)
- return -EINVAL;
-
- fw_name = kstrdup(firmware, GFP_KERNEL);
- if (!fw_name)
- return -ENOMEM;
-
if (pas_init) {
metadata = qcom_mdt_read_metadata(fw, &metadata_len);
if (IS_ERR(metadata)) {
@@ -258,25 +285,9 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
memcpy(ptr, fw->data + phdr->p_offset, phdr->p_filesz);
} else if (phdr->p_filesz) {
/* Firmware not large enough, load split-out segments */
- sprintf(fw_name + fw_name_len - 3, "b%02d", i);
- ret = request_firmware_into_buf(&seg_fw, fw_name, dev,
- ptr, phdr->p_filesz);
- if (ret) {
- dev_err(dev, "error %d loading %s\n",
- ret, fw_name);
+ ret = mdt_load_split_segment(ptr, phdrs, i, fw_name, dev);
+ if (ret)
break;
- }
-
- if (seg_fw->size != phdr->p_filesz) {
- dev_err(dev,
- "failed to load segment %d from truncated file %s\n",
- i, fw_name);
- release_firmware(seg_fw);
- ret = -EINVAL;
- break;
- }
-
- release_firmware(seg_fw);
}
if (phdr->p_memsz > phdr->p_filesz)
@@ -287,7 +298,6 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
*reloc_base = mem_reloc;
out:
- kfree(fw_name);
return ret;
}
--
2.33.1
^ permalink raw reply related
* [PATCH 03/13] soc: qcom: mdt_loader: Allow hash segment to be split out
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
It's been observed that some firmware found in a Qualcomm SM8450 device
has the hash table in a separate .bNN file. Use the newly extracted
helper function to load this segment from the separate file, if it's
determined that the hashes are not part of the already loaded firmware.
In order to do this, the function needs access to the firmware basename
and to provide more useful error messages a struct device to associate
the errors with.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/remoteproc/qcom_q6v5_mss.c | 7 ++++---
drivers/soc/qcom/mdt_loader.c | 29 +++++++++++++++++++++--------
include/linux/soc/qcom/mdt_loader.h | 6 ++++--
3 files changed, 29 insertions(+), 13 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index 43ea8455546c..a2c231a17b2b 100644
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -928,7 +928,8 @@ static void q6v5proc_halt_axi_port(struct q6v5 *qproc,
regmap_write(halt_map, offset + AXI_HALTREQ_REG, 0);
}
-static int q6v5_mpss_init_image(struct q6v5 *qproc, const struct firmware *fw)
+static int q6v5_mpss_init_image(struct q6v5 *qproc, const struct firmware *fw,
+ const char *fw_name)
{
unsigned long dma_attrs = DMA_ATTR_FORCE_CONTIGUOUS;
dma_addr_t phys;
@@ -939,7 +940,7 @@ static int q6v5_mpss_init_image(struct q6v5 *qproc, const struct firmware *fw)
void *ptr;
int ret;
- metadata = qcom_mdt_read_metadata(fw, &size);
+ metadata = qcom_mdt_read_metadata(fw, &size, fw_name, qproc->dev);
if (IS_ERR(metadata))
return PTR_ERR(metadata);
@@ -1289,7 +1290,7 @@ static int q6v5_mpss_load(struct q6v5 *qproc)
/* Initialize the RMB validator */
writel(0, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
- ret = q6v5_mpss_init_image(qproc, fw);
+ ret = q6v5_mpss_init_image(qproc, fw, qproc->hexagon_mdt_image);
if (ret)
goto release_firmware;
diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c
index c9e5bdfac371..4372d8e38b29 100644
--- a/drivers/soc/qcom/mdt_loader.c
+++ b/drivers/soc/qcom/mdt_loader.c
@@ -121,13 +121,15 @@ EXPORT_SYMBOL_GPL(qcom_mdt_get_size);
*
* Return: pointer to data, or ERR_PTR()
*/
-void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len)
+void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len,
+ const char *fw_name, struct device *dev)
{
const struct elf32_phdr *phdrs;
const struct elf32_hdr *ehdr;
size_t hash_offset;
size_t hash_size;
size_t ehdr_size;
+ ssize_t ret;
void *data;
ehdr = (struct elf32_hdr *)fw->data;
@@ -149,14 +151,25 @@ void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len)
if (!data)
return ERR_PTR(-ENOMEM);
- /* Is the header and hash already packed */
- if (ehdr_size + hash_size == fw->size)
+ /* Copy ELF header */
+ memcpy(data, fw->data, ehdr_size);
+
+ if (ehdr_size + hash_size == fw->size) {
+ /* Firmware is split and hash is packed following the ELF header */
hash_offset = phdrs[0].p_filesz;
- else
+ memcpy(data + ehdr_size, fw->data + hash_offset, hash_size);
+ } else if (phdrs[1].p_offset + hash_size <= fw->size) {
+ /* Hash is in its own segment, but within the loaded file */
hash_offset = phdrs[1].p_offset;
-
- memcpy(data, fw->data, ehdr_size);
- memcpy(data + ehdr_size, fw->data + hash_offset, hash_size);
+ memcpy(data + ehdr_size, fw->data + hash_offset, hash_size);
+ } else {
+ /* Hash is in its own segment, beyond the loaded file */
+ ret = mdt_load_split_segment(data + ehdr_size, phdrs, 1, fw_name, dev);
+ if (ret) {
+ kfree(data);
+ return ERR_PTR(ret);
+ }
+ }
*data_len = ehdr_size + hash_size;
@@ -190,7 +203,7 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
phdrs = (struct elf32_phdr *)(ehdr + 1);
if (pas_init) {
- metadata = qcom_mdt_read_metadata(fw, &metadata_len);
+ metadata = qcom_mdt_read_metadata(fw, &metadata_len, fw_name, dev);
if (IS_ERR(metadata)) {
ret = PTR_ERR(metadata);
dev_err(dev, "error %d reading firmware %s metadata\n",
diff --git a/include/linux/soc/qcom/mdt_loader.h b/include/linux/soc/qcom/mdt_loader.h
index afd47217996b..46bdb7bace9a 100644
--- a/include/linux/soc/qcom/mdt_loader.h
+++ b/include/linux/soc/qcom/mdt_loader.h
@@ -23,7 +23,8 @@ int qcom_mdt_load_no_init(struct device *dev, const struct firmware *fw,
const char *fw_name, int pas_id, void *mem_region,
phys_addr_t mem_phys, size_t mem_size,
phys_addr_t *reloc_base);
-void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len);
+void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len,
+ const char *fw_name, struct device *dev);
#else /* !IS_ENABLED(CONFIG_QCOM_MDT_LOADER) */
@@ -51,7 +52,8 @@ static inline int qcom_mdt_load_no_init(struct device *dev,
}
static inline void *qcom_mdt_read_metadata(const struct firmware *fw,
- size_t *data_len)
+ size_t *data_len, const char *fw_name,
+ struct device *dev)
{
return ERR_PTR(-ENODEV);
}
--
2.33.1
^ permalink raw reply related
* [PATCH 04/13] soc: qcom: mdt_loader: Allow hash to reside in any segment
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
It's been observed that some firmware found on Qualcomm SM8450 devices
carries the hash segment as the last segment in the ELF. Extend the
support to allow picking the hash from any segment in the MDT/MBN.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/soc/qcom/mdt_loader.c | 21 ++++++++++++++++-----
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c
index 4372d8e38b29..c5bd13b05c1a 100644
--- a/drivers/soc/qcom/mdt_loader.c
+++ b/drivers/soc/qcom/mdt_loader.c
@@ -126,9 +126,11 @@ void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len,
{
const struct elf32_phdr *phdrs;
const struct elf32_hdr *ehdr;
+ unsigned int hash_segment = 0;
size_t hash_offset;
size_t hash_size;
size_t ehdr_size;
+ unsigned int i;
ssize_t ret;
void *data;
@@ -141,11 +143,20 @@ void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len,
if (phdrs[0].p_type == PT_LOAD)
return ERR_PTR(-EINVAL);
- if ((phdrs[1].p_flags & QCOM_MDT_TYPE_MASK) != QCOM_MDT_TYPE_HASH)
+ for (i = 1; i < ehdr->e_phnum; i++) {
+ if ((phdrs[i].p_flags & QCOM_MDT_TYPE_MASK) == QCOM_MDT_TYPE_HASH) {
+ hash_segment = i;
+ break;
+ }
+ }
+
+ if (!hash_segment) {
+ dev_err(dev, "no hash segment found in %s\n", fw_name);
return ERR_PTR(-EINVAL);
+ }
ehdr_size = phdrs[0].p_filesz;
- hash_size = phdrs[1].p_filesz;
+ hash_size = phdrs[hash_segment].p_filesz;
data = kmalloc(ehdr_size + hash_size, GFP_KERNEL);
if (!data)
@@ -158,13 +169,13 @@ void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len,
/* Firmware is split and hash is packed following the ELF header */
hash_offset = phdrs[0].p_filesz;
memcpy(data + ehdr_size, fw->data + hash_offset, hash_size);
- } else if (phdrs[1].p_offset + hash_size <= fw->size) {
+ } else if (phdrs[hash_segment].p_offset + hash_size <= fw->size) {
/* Hash is in its own segment, but within the loaded file */
- hash_offset = phdrs[1].p_offset;
+ hash_offset = phdrs[hash_segment].p_offset;
memcpy(data + ehdr_size, fw->data + hash_offset, hash_size);
} else {
/* Hash is in its own segment, beyond the loaded file */
- ret = mdt_load_split_segment(data + ehdr_size, phdrs, 1, fw_name, dev);
+ ret = mdt_load_split_segment(data + ehdr_size, phdrs, hash_segment, fw_name, dev);
if (ret) {
kfree(data);
return ERR_PTR(ret);
--
2.33.1
^ permalink raw reply related
* [PATCH 06/13] soc: qcom: mdt_loader: Reorder parts of __qcom_mdt_load()
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
Move the traversal of the program headers to the start of the function,
to make sure that min_ and max_addr are in scope as the call to
qcom_scm_pas_mem_setup() is moved in the next commit.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/soc/qcom/mdt_loader.c | 32 ++++++++++++++++----------------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c
index 37e2e734bc5d..ee991784a738 100644
--- a/drivers/soc/qcom/mdt_loader.c
+++ b/drivers/soc/qcom/mdt_loader.c
@@ -213,6 +213,22 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
ehdr = (struct elf32_hdr *)fw->data;
phdrs = (struct elf32_phdr *)(ehdr + 1);
+ for (i = 0; i < ehdr->e_phnum; i++) {
+ phdr = &phdrs[i];
+
+ if (!mdt_phdr_valid(phdr))
+ continue;
+
+ if (phdr->p_flags & QCOM_MDT_RELOCATABLE)
+ relocate = true;
+
+ if (phdr->p_paddr < min_addr)
+ min_addr = phdr->p_paddr;
+
+ if (phdr->p_paddr + phdr->p_memsz > max_addr)
+ max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K);
+ }
+
if (pas_init) {
metadata = qcom_mdt_read_metadata(fw, &metadata_len, fw_name, dev);
if (IS_ERR(metadata)) {
@@ -233,22 +249,6 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
}
}
- for (i = 0; i < ehdr->e_phnum; i++) {
- phdr = &phdrs[i];
-
- if (!mdt_phdr_valid(phdr))
- continue;
-
- if (phdr->p_flags & QCOM_MDT_RELOCATABLE)
- relocate = true;
-
- if (phdr->p_paddr < min_addr)
- min_addr = phdr->p_paddr;
-
- if (phdr->p_paddr + phdr->p_memsz > max_addr)
- max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K);
- }
-
if (relocate) {
if (pas_init) {
ret = qcom_scm_pas_mem_setup(pas_id, mem_phys,
--
2.33.1
^ permalink raw reply related
* [PATCH 10/13] dt-bindings: remoteproc: qcom: pas: Add SM8450 PAS compatibles
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
The Qualcomm SM8450 has the usual audio, compute, sensor and modem
remoteprocs, add compatibles to the documentation for these.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
.../bindings/remoteproc/qcom,adsp.yaml | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
index c635c181d2c2..64c182428e94 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
@@ -47,6 +47,10 @@ properties:
- qcom,sm8350-cdsp-pas
- qcom,sm8350-slpi-pas
- qcom,sm8350-mpss-pas
+ - qcom,sm8450-adsp-pas
+ - qcom,sm8450-cdsp-pas
+ - qcom,sm8450-mpss-pas
+ - qcom,sm8450-slpi-pas
reg:
maxItems: 1
@@ -175,6 +179,10 @@ allOf:
- qcom,sm8350-cdsp-pas
- qcom,sm8350-slpi-pas
- qcom,sm8350-mpss-pas
+ - qcom,sm8450-adsp-pas
+ - qcom,sm8450-cdsp-pas
+ - qcom,sm8450-slpi-pas
+ - qcom,sm8450-mpss-pas
then:
properties:
clocks:
@@ -283,6 +291,9 @@ allOf:
- qcom,sm8350-adsp-pas
- qcom,sm8350-cdsp-pas
- qcom,sm8350-slpi-pas
+ - qcom,sm8450-adsp-pas
+ - qcom,sm8450-cdsp-pas
+ - qcom,sm8450-slpi-pas
then:
properties:
interrupts:
@@ -312,6 +323,7 @@ allOf:
- qcom,sm6350-mpss-pas
- qcom,sm8150-mpss-pas
- qcom,sm8350-mpss-pas
+ - qcom,sm8450-mpss-pas
then:
properties:
interrupts:
@@ -434,6 +446,7 @@ allOf:
- qcom,sm6350-mpss-pas
- qcom,sm8150-mpss-pas
- qcom,sm8350-mpss-pas
+ - qcom,sm8450-mpss-pas
then:
properties:
power-domains:
@@ -458,6 +471,8 @@ allOf:
- qcom,sm8250-slpi-pas
- qcom,sm8350-adsp-pas
- qcom,sm8350-slpi-pas
+ - qcom,sm8450-adsp-pas
+ - qcom,sm8450-slpi-pas
then:
properties:
power-domains:
@@ -475,6 +490,7 @@ allOf:
contains:
enum:
- qcom,sm8350-cdsp-pas
+ - qcom,sm8450-cdsp-pas
then:
properties:
power-domains:
--
2.33.1
^ permalink raw reply related
* [PATCH 08/13] soc: qcom: mdt_loader: Extract PAS operations
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
Rather than passing a boolean to indicate if the PAS operations should
be performed from within __mdt_load(), extract them to their own helper
function.
This will allow clients to invoke this directly, with some
qcom_scm_pas_metadata context that they later needs to release, without
further having to complicate the prototype of qcom_mdt_load().
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/soc/qcom/mdt_loader.c | 110 +++++++++++++++++++---------
include/linux/soc/qcom/mdt_loader.h | 11 +++
2 files changed, 85 insertions(+), 36 deletions(-)
diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c
index c8d43dc50cff..f0b1d969567c 100644
--- a/drivers/soc/qcom/mdt_loader.c
+++ b/drivers/soc/qcom/mdt_loader.c
@@ -188,6 +188,74 @@ void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len,
}
EXPORT_SYMBOL_GPL(qcom_mdt_read_metadata);
+/**
+ * qcom_mdt_pas_init() - initialize PAS region for firmware loading
+ * @dev: device handle to associate resources with
+ * @fw: firmware object for the mdt file
+ * @firmware: name of the firmware, for construction of segment file names
+ * @pas_id: PAS identifier
+ * @mem_phys: physical address of allocated memory region
+ * @ctx: PAS metadata context, to be released by caller
+ *
+ * Returns 0 on success, negative errno otherwise.
+ */
+int qcom_mdt_pas_init(struct device *dev, const struct firmware *fw,
+ const char *fw_name, int pas_id, phys_addr_t mem_phys,
+ struct qcom_scm_pas_metadata *ctx)
+{
+ const struct elf32_phdr *phdrs;
+ const struct elf32_phdr *phdr;
+ const struct elf32_hdr *ehdr;
+ phys_addr_t min_addr = PHYS_ADDR_MAX;
+ phys_addr_t max_addr = 0;
+ size_t metadata_len;
+ void *metadata;
+ int ret;
+ int i;
+
+ ehdr = (struct elf32_hdr *)fw->data;
+ phdrs = (struct elf32_phdr *)(ehdr + 1);
+
+ for (i = 0; i < ehdr->e_phnum; i++) {
+ phdr = &phdrs[i];
+
+ if (!mdt_phdr_valid(phdr))
+ continue;
+
+ if (phdr->p_paddr < min_addr)
+ min_addr = phdr->p_paddr;
+
+ if (phdr->p_paddr + phdr->p_memsz > max_addr)
+ max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K);
+ }
+
+ metadata = qcom_mdt_read_metadata(fw, &metadata_len, fw_name, dev);
+ if (IS_ERR(metadata)) {
+ ret = PTR_ERR(metadata);
+ dev_err(dev, "error %d reading firmware %s metadata\n", ret, fw_name);
+ goto out;
+ }
+
+ ret = qcom_scm_pas_init_image(pas_id, metadata, metadata_len, ctx);
+ kfree(metadata);
+ if (ret) {
+ /* Invalid firmware metadata */
+ dev_err(dev, "error %d initializing firmware %s\n", ret, fw_name);
+ goto out;
+ }
+
+ ret = qcom_scm_pas_mem_setup(pas_id, mem_phys, max_addr - min_addr);
+ if (ret) {
+ /* Unable to set up relocation */
+ dev_err(dev, "error %d setting up firmware %s\n", ret, fw_name);
+ goto out;
+ }
+
+out:
+ return ret;
+}
+EXPORT_SYMBOL_GPL(qcom_mdt_pas_init);
+
static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
const char *fw_name, int pas_id, void *mem_region,
phys_addr_t mem_phys, size_t mem_size,
@@ -198,10 +266,7 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
const struct elf32_hdr *ehdr;
phys_addr_t mem_reloc;
phys_addr_t min_addr = PHYS_ADDR_MAX;
- phys_addr_t max_addr = 0;
- size_t metadata_len;
ssize_t offset;
- void *metadata;
bool relocate = false;
void *ptr;
int ret = 0;
@@ -224,37 +289,6 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
if (phdr->p_paddr < min_addr)
min_addr = phdr->p_paddr;
-
- if (phdr->p_paddr + phdr->p_memsz > max_addr)
- max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K);
- }
-
- if (pas_init) {
- metadata = qcom_mdt_read_metadata(fw, &metadata_len, fw_name, dev);
- if (IS_ERR(metadata)) {
- ret = PTR_ERR(metadata);
- dev_err(dev, "error %d reading firmware %s metadata\n",
- ret, fw_name);
- goto out;
- }
-
- ret = qcom_scm_pas_init_image(pas_id, metadata, metadata_len, NULL);
-
- kfree(metadata);
- if (ret) {
- /* Invalid firmware metadata */
- dev_err(dev, "error %d initializing firmware %s\n",
- ret, fw_name);
- goto out;
- }
-
- ret = qcom_scm_pas_mem_setup(pas_id, mem_phys, max_addr - min_addr);
- if (ret) {
- /* Unable to set up relocation */
- dev_err(dev, "error %d setting up firmware %s\n",
- ret, fw_name);
- goto out;
- }
}
if (relocate) {
@@ -319,8 +353,6 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
if (reloc_base)
*reloc_base = mem_reloc;
-out:
-
return ret;
}
@@ -342,6 +374,12 @@ int qcom_mdt_load(struct device *dev, const struct firmware *fw,
phys_addr_t mem_phys, size_t mem_size,
phys_addr_t *reloc_base)
{
+ int ret;
+
+ ret = qcom_mdt_pas_init(dev, fw, firmware, pas_id, mem_phys, NULL);
+ if (ret)
+ return ret;
+
return __qcom_mdt_load(dev, fw, firmware, pas_id, mem_region, mem_phys,
mem_size, reloc_base, true);
}
diff --git a/include/linux/soc/qcom/mdt_loader.h b/include/linux/soc/qcom/mdt_loader.h
index 46bdb7bace9a..ef8a6278264d 100644
--- a/include/linux/soc/qcom/mdt_loader.h
+++ b/include/linux/soc/qcom/mdt_loader.h
@@ -10,10 +10,14 @@
struct device;
struct firmware;
+struct qcom_scm_pas_metadata;
#if IS_ENABLED(CONFIG_QCOM_MDT_LOADER)
ssize_t qcom_mdt_get_size(const struct firmware *fw);
+int qcom_mdt_pas_init(struct device *dev, const struct firmware *fw,
+ const char *fw_name, int pas_id, phys_addr_t mem_phys,
+ struct qcom_scm_pas_metadata *pas_metadata_ctx);
int qcom_mdt_load(struct device *dev, const struct firmware *fw,
const char *fw_name, int pas_id, void *mem_region,
phys_addr_t mem_phys, size_t mem_size,
@@ -33,6 +37,13 @@ static inline ssize_t qcom_mdt_get_size(const struct firmware *fw)
return -ENODEV;
}
+static int qcom_mdt_pas_init(struct device *dev, const struct firmware *fw,
+ const char *fw_name, int pas_id, phys_addr_t mem_phys,
+ struct qcom_scm_pas_metadata *pas_metadata_ctx)
+{
+ return -ENODEV;
+}
+
static inline int qcom_mdt_load(struct device *dev, const struct firmware *fw,
const char *fw_name, int pas_id,
void *mem_region, phys_addr_t mem_phys,
--
2.33.1
^ permalink raw reply related
* [PATCH 09/13] remoteproc: qcom: pas: Carry PAS metadata context
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
Starting with Qualcomm SM8450 the metadata object shared with the secure
world during authentication and booting of a remoteproc needs to be
alive from init_image() until auth_and_reset().
Use the newly introduced "PAS metadata context" object to track this
context from load until the firmware has been booted.
In the even that load is performed but the process for some reason
doesn't reach auth_and_reset the unprepare callback is used to clean up
the allocated memory.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/remoteproc/qcom_q6v5_pas.c | 32 +++++++++++++++++++++++++++---
1 file changed, 29 insertions(+), 3 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
index 184bb7cdf95a..5e806f657fec 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -79,6 +79,8 @@ struct qcom_adsp {
struct qcom_rproc_subdev smd_subdev;
struct qcom_rproc_ssr ssr_subdev;
struct qcom_sysmon *sysmon;
+
+ struct qcom_scm_pas_metadata pas_metadata;
};
static void adsp_minidump(struct rproc *rproc)
@@ -126,14 +128,34 @@ static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
}
}
+static int adsp_unprepare(struct rproc *rproc)
+{
+ struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
+
+ /*
+ * adsp_load() did pass pas_metadata to the SCM driver for storing
+ * metadata context. It might have been released already if
+ * auth_and_reset() was successful, but in other cases clean it up
+ * here.
+ */
+ qcom_scm_pas_metadata_release(&adsp->pas_metadata);
+
+ return 0;
+}
+
static int adsp_load(struct rproc *rproc, const struct firmware *fw)
{
struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
int ret;
- ret = qcom_mdt_load(adsp->dev, fw, rproc->firmware, adsp->pas_id,
- adsp->mem_region, adsp->mem_phys, adsp->mem_size,
- &adsp->mem_reloc);
+ ret = qcom_mdt_pas_init(adsp->dev, fw, rproc->firmware, adsp->pas_id,
+ adsp->mem_phys, &adsp->pas_metadata);
+ if (ret)
+ return ret;
+
+ ret = qcom_mdt_load_no_init(adsp->dev, fw, rproc->firmware, adsp->pas_id,
+ adsp->mem_region, adsp->mem_phys, adsp->mem_size,
+ &adsp->mem_reloc);
if (ret)
return ret;
@@ -185,6 +207,8 @@ static int adsp_start(struct rproc *rproc)
goto disable_px_supply;
}
+ qcom_scm_pas_metadata_release(&adsp->pas_metadata);
+
return 0;
disable_px_supply:
@@ -255,6 +279,7 @@ static unsigned long adsp_panic(struct rproc *rproc)
}
static const struct rproc_ops adsp_ops = {
+ .unprepare = adsp_unprepare,
.start = adsp_start,
.stop = adsp_stop,
.da_to_va = adsp_da_to_va,
@@ -264,6 +289,7 @@ static const struct rproc_ops adsp_ops = {
};
static const struct rproc_ops adsp_minidump_ops = {
+ .unprepare = adsp_unprepare,
.start = adsp_start,
.stop = adsp_stop,
.da_to_va = adsp_da_to_va,
--
2.33.1
^ permalink raw reply related
* [PATCH 07/13] soc: qcom: mdt_loader: Always invoke PAS mem_setup
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
After spelunking various old kernel trees no finds has been found
indicating that the PAS mem_setup call should actually be made
conditional on the image being relocatable.
Group the two PAS operations together, to facilitate splitting them out
in a following patch.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/soc/qcom/mdt_loader.c | 19 ++++++++-----------
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c
index ee991784a738..c8d43dc50cff 100644
--- a/drivers/soc/qcom/mdt_loader.c
+++ b/drivers/soc/qcom/mdt_loader.c
@@ -247,20 +247,17 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
ret, fw_name);
goto out;
}
- }
- if (relocate) {
- if (pas_init) {
- ret = qcom_scm_pas_mem_setup(pas_id, mem_phys,
- max_addr - min_addr);
- if (ret) {
- /* Unable to set up relocation */
- dev_err(dev, "error %d setting up firmware %s\n",
- ret, fw_name);
- goto out;
- }
+ ret = qcom_scm_pas_mem_setup(pas_id, mem_phys, max_addr - min_addr);
+ if (ret) {
+ /* Unable to set up relocation */
+ dev_err(dev, "error %d setting up firmware %s\n",
+ ret, fw_name);
+ goto out;
}
+ }
+ if (relocate) {
/*
* The image is relocatable, so offset each segment based on
* the lowest segment address.
--
2.33.1
^ permalink raw reply related
* [PATCH 13/13] arm64: dts: qcom: sm8450-qrd: Enable remoteproc instances
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
Enable the audio, compute, sensor and modem remoteproc and specify
firmware path for these on the Qualcomm SM8450 QRD.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8450-qrd.dts | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450-qrd.dts b/arch/arm64/boot/dts/qcom/sm8450-qrd.dts
index b68ab247e6ae..9526632d4029 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-qrd.dts
@@ -346,6 +346,26 @@ &qupv3_id_0 {
status = "okay";
};
+&remoteproc_adsp {
+ status = "okay";
+ firmware-name = "qcom/sm8450/adsp.mbn";
+};
+
+&remoteproc_cdsp {
+ status = "okay";
+ firmware-name = "qcom/sm8450/cdsp.mbn";
+};
+
+&remoteproc_mpss {
+ status = "okay";
+ firmware-name = "qcom/sm8450/modem.mbn";
+};
+
+&remoteproc_slpi {
+ status = "okay";
+ firmware-name = "qcom/sm8450/slpi.mbn";
+};
+
&tlmm {
gpio-reserved-ranges = <28 4>, <36 4>;
};
--
2.33.1
^ permalink raw reply related
* [PATCH 12/13] arm64: dts: qcom: sm8450: Add remoteproc enablers and instances
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
The Qualcomm SM8450 carries the familiar set of audio, compute, sensor
and modem remoteprocs. Add these and their dependencies.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 297 +++++++++++++++++++++++++++
1 file changed, 297 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 10c25ad2d0c7..24fb3d3e667b 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/clock/qcom,gcc-sm8450.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/mailbox/qcom-ipcc.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -460,6 +461,15 @@ cvp_mem: memory@9ee00000 {
no-map;
};
+ rmtfs_mem: memory@9fd00000 {
+ compatible = "qcom,rmtfs-mem";
+ reg = <0x0 0x9fd00000 0x0 0x280000>;
+ no-map;
+
+ qcom,client-id = <1>;
+ qcom,vmid = <15>;
+ };
+
global_sync_mem: memory@a6f00000 {
reg = <0x0 0xa6f00000 0x0 0x100000>;
no-map;
@@ -540,6 +550,113 @@ trusted_apps_ext_mem: memory@ed900000 {
};
};
+ smp2p-adsp {
+ compatible = "qcom,smp2p";
+ qcom,smem = <443>, <429>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <2>;
+
+ smp2p_adsp_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_adsp_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-cdsp {
+ compatible = "qcom,smp2p";
+ qcom,smem = <94>, <432>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <5>;
+
+ smp2p_cdsp_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_cdsp_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-modem {
+ compatible = "qcom,smp2p";
+ qcom,smem = <435>, <428>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_MPSS
+ IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <1>;
+
+ smp2p_modem_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_modem_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ ipa_smp2p_out: ipa-ap-to-modem {
+ qcom,entry-name = "ipa";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ ipa_smp2p_in: ipa-modem-to-ap {
+ qcom,entry-name = "ipa";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-slpi {
+ compatible = "qcom,smp2p";
+ qcom,smem = <481>, <430>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_SLPI
+ IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <3>;
+
+ smp2p_slpi_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_slpi_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
soc: soc@0 {
#address-cells = <2>;
#size-cells = <2>;
@@ -672,6 +789,167 @@ usb_1_ssphy: phy@88e9200 {
};
};
+ remoteproc_slpi: remoteproc@2400000 {
+ compatible = "qcom,sm8350-slpi-pas";
+ reg = <0 0x02400000 0 0x4000>;
+
+ interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>,
+ <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd SM8450_LCX>,
+ <&rpmhpd SM8450_LMX>;
+ power-domain-names = "lcx", "lmx";
+
+ memory-region = <&slpi_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_slpi_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_SLPI
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "slpi";
+ qcom,remote-pid = <3>;
+ };
+ };
+
+ remoteproc_adsp: remoteproc@30000000 {
+ compatible = "qcom,sm8450-adsp-pas";
+ reg = <0 0x030000000 0 0x100>;
+
+ interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
+ <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd SM8450_LCX>,
+ <&rpmhpd SM8450_LMX>;
+ power-domain-names = "lcx", "lmx";
+
+ memory-region = <&adsp_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_adsp_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ remoteproc_adsp_glink: glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "lpass";
+ qcom,remote-pid = <2>;
+ };
+ };
+
+ remoteproc_cdsp: remoteproc@32300000 {
+ compatible = "qcom,sm8450-cdsp-pas";
+ reg = <0 0x032300000 0 0x1400000>;
+
+ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
+ <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd SM8450_CX>,
+ <&rpmhpd SM8450_MXC>;
+ power-domain-names = "cx", "mxc";
+
+ memory-region = <&cdsp_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_cdsp_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "cdsp";
+ qcom,remote-pid = <5>;
+ };
+ };
+
+ remoteproc_mpss: remoteproc@4080000 {
+ compatible = "qcom,sm8450-mpss-pas";
+ reg = <0x0 0x04080000 0x0 0x4040>;
+
+ interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
+ <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready", "handover",
+ "stop-ack", "shutdown-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd 0>,
+ <&rpmhpd 12>;
+ power-domain-names = "cx", "mss";
+
+ memory-region = <&mpss_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_modem_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_MPSS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+ interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
+ label = "modem";
+ qcom,remote-pid = <1>;
+ };
+ };
+
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm8450-pdc", "qcom,pdc";
reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
@@ -682,6 +960,25 @@ pdc: interrupt-controller@b220000 {
interrupt-controller;
};
+ aoss_qmp: power-controller@c300000 {
+ compatible = "qcom,sm8450-aoss-qmp", "qcom,aoss-qmp";
+ reg = <0 0x0c300000 0 0x400>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ #clock-cells = <0>;
+ };
+
+ ipcc: mailbox@ed18000 {
+ compatible = "qcom,sm8450-ipcc", "qcom,ipcc";
+ reg = <0 0x0ed18000 0 0x1000>;
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ #mbox-cells = <2>;
+ };
+
tlmm: pinctrl@f100000 {
compatible = "qcom,sm8450-tlmm";
reg = <0 0x0f100000 0 0x300000>;
--
2.33.1
^ permalink raw reply related
* [PATCH 11/13] remoteproc: qcom: pas: Add SM8450 remoteproc support
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
Add audio, compute, sensor and modem remoteproc compatibles to the PAS
remoteproc driver. The resources needed for each one matches those of
SM8350, so its descs are reused.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/remoteproc/qcom_q6v5_pas.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
index 5e806f657fec..1ae47cc153e5 100644
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -879,6 +879,10 @@ static const struct of_device_id adsp_of_match[] = {
{ .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource},
{ .compatible = "qcom,sm8350-slpi-pas", .data = &sm8350_slpi_resource},
{ .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init},
+ { .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource},
+ { .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource},
+ { .compatible = "qcom,sm8450-slpi-pas", .data = &sm8350_slpi_resource},
+ { .compatible = "qcom,sm8450-mpss-pas", .data = &mpss_resource_init},
{ },
};
MODULE_DEVICE_TABLE(of, adsp_of_match);
--
2.33.1
^ permalink raw reply related
* [PATCH 05/13] soc: qcom: mdt_loader: Extend check for split firmware
From: Bjorn Andersson @ 2022-01-28 2:55 UTC (permalink / raw)
To: Bjorn Andersson, Mathieu Poirier
Cc: Rob Herring, linux-arm-msm, linux-remoteproc, devicetree,
linux-kernel
In-Reply-To: <20220128025513.97188-1-bjorn.andersson@linaro.org>
Some of the Qualcomm SM8450 firmware files are padded such that the
start of the first segment falls within the .mdt file but the segment to
be loaded is stored as a separate .bNN file.
Extend the condition to only attempt to read a segment inline if the
entire segment would be available.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/soc/qcom/mdt_loader.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c
index c5bd13b05c1a..37e2e734bc5d 100644
--- a/drivers/soc/qcom/mdt_loader.c
+++ b/drivers/soc/qcom/mdt_loader.c
@@ -297,7 +297,8 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
ptr = mem_region + offset;
- if (phdr->p_filesz && phdr->p_offset < fw->size) {
+ if (phdr->p_filesz && phdr->p_offset < fw->size &&
+ phdr->p_offset + phdr->p_filesz < fw->size) {
/* Firmware is large enough to be non-split */
if (phdr->p_offset + phdr->p_filesz > fw->size) {
dev_err(dev, "file %s segment %d would be truncated\n",
--
2.33.1
^ permalink raw reply related
* [PATCH] media: uapi: Init VP9 stateless decode params
From: Yunfei Dong @ 2022-01-28 3:23 UTC (permalink / raw)
To: Yunfei Dong, Alexandre Courbot, Hans Verkuil, Tzung-Bi Shih,
AngeloGioacchino Del Regno, Tiffany Lin, Andrew-CT Chen,
Mauro Carvalho Chehab, Rob Herring, Matthias Brugger, Tomasz Figa
Cc: George Sun, Xiaoyong Lu, Hsin-Yi Wang, Fritz Koenig,
Dafna Hirschfeld, Benjamin Gaignard, Daniel Vetter, dri-devel,
Irui Wang, Steve Cho, linux-media, devicetree, linux-kernel,
linux-arm-kernel, srv_heupstream, linux-mediatek,
Project_Global_Chrome_Upstream_Group
Init some of VP9 frame decode params to default value.
Fixes: b88dbe38dca8 ("media: uapi: Add VP9 stateless decoder controls")
Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
---
drivers/media/v4l2-core/v4l2-ctrls-core.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c b/drivers/media/v4l2-core/v4l2-ctrls-core.c
index 54abe5245dcc..b25c77b8a445 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls-core.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c
@@ -112,6 +112,7 @@ static void std_init_compound(const struct v4l2_ctrl *ctrl, u32 idx,
struct v4l2_ctrl_mpeg2_picture *p_mpeg2_picture;
struct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quant;
struct v4l2_ctrl_vp8_frame *p_vp8_frame;
+ struct v4l2_ctrl_vp9_frame *p_vp9_frame;
struct v4l2_ctrl_fwht_params *p_fwht_params;
void *p = ptr.p + idx * ctrl->elem_size;
@@ -152,6 +153,13 @@ static void std_init_compound(const struct v4l2_ctrl *ctrl, u32 idx,
p_vp8_frame = p;
p_vp8_frame->num_dct_parts = 1;
break;
+ case V4L2_CTRL_TYPE_VP9_FRAME:
+ p_vp9_frame = p;
+ p_vp9_frame->profile = 0;
+ p_vp9_frame->bit_depth = 8;
+ p_vp9_frame->flags |= V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING |
+ V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING;
+ break;
case V4L2_CTRL_TYPE_FWHT_PARAMS:
p_fwht_params = p;
p_fwht_params->version = V4L2_FWHT_VERSION;
--
2.25.1
^ permalink raw reply related
* Re: [PATCH v1, 7/8] media: uapi: Init VP9 stateless decode params
From: yunfei.dong @ 2022-01-28 3:28 UTC (permalink / raw)
To: Chen-Yu Tsai, Andrzej Pietrasiewicz
Cc: Alexandre Courbot, Hans Verkuil, Tzung-Bi Shih,
AngeloGioacchino Del Regno, Tiffany Lin, Andrew-CT Chen,
Mauro Carvalho Chehab, Rob Herring, Matthias Brugger, Tomasz Figa,
George Sun, Xiaoyong Lu, Hsin-Yi Wang, Fritz Koenig,
Dafna Hirschfeld, Benjamin Gaignard, Daniel Vetter, dri-devel,
Irui Wang, Steve Cho, linux-media, devicetree, linux-kernel,
linux-arm-kernel, srv_heupstream, linux-mediatek,
Project_Global_Chrome_Upstream_Group
In-Reply-To: <CAGXv+5ELuvvG6dwXH5DdHtjOm4j4AAVTk2UxGOitF5v5Vx265A@mail.gmail.com>
Hi Chen-Yu,
Thanks for your suggestion.
Send this patch again.
On Thu, 2022-01-27 at 17:23 +0800, Chen-Yu Tsai wrote:
> Hi,
>
> On Thu, Jan 27, 2022 at 10:56 AM Yunfei Dong <
> yunfei.dong@mediatek.com> wrote:
> >
> > Init some of VP9 frame decode params to default value.
> >
> > Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
>
> Maybe add
>
> Fixes: b88dbe38dca8 ("media: uapi: Add VP9 stateless decoder
> controls")
>
Best Regards,
Yunfei Dong
> > ---
> > drivers/media/v4l2-core/v4l2-ctrls-core.c | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c
> > b/drivers/media/v4l2-core/v4l2-ctrls-core.c
> > index 54abe5245dcc..b25c77b8a445 100644
> > --- a/drivers/media/v4l2-core/v4l2-ctrls-core.c
> > +++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c
> > @@ -112,6 +112,7 @@ static void std_init_compound(const struct
> > v4l2_ctrl *ctrl, u32 idx,
> > struct v4l2_ctrl_mpeg2_picture *p_mpeg2_picture;
> > struct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quant;
> > struct v4l2_ctrl_vp8_frame *p_vp8_frame;
> > + struct v4l2_ctrl_vp9_frame *p_vp9_frame;
> > struct v4l2_ctrl_fwht_params *p_fwht_params;
> > void *p = ptr.p + idx * ctrl->elem_size;
> >
> > @@ -152,6 +153,13 @@ static void std_init_compound(const struct
> > v4l2_ctrl *ctrl, u32 idx,
> > p_vp8_frame = p;
> > p_vp8_frame->num_dct_parts = 1;
> > break;
> > + case V4L2_CTRL_TYPE_VP9_FRAME:
> > + p_vp9_frame = p;
> > + p_vp9_frame->profile = 0;
> > + p_vp9_frame->bit_depth = 8;
> > + p_vp9_frame->flags |=
> > V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING |
> > + V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING;
> > + break;
> > case V4L2_CTRL_TYPE_FWHT_PARAMS:
> > p_fwht_params = p;
> > p_fwht_params->version = V4L2_FWHT_VERSION;
> > --
> > 2.25.1
> >
^ permalink raw reply
* Re: [PATCH v1, 7/8] media: uapi: Init VP9 stateless decode params
From: yunfei.dong @ 2022-01-28 3:29 UTC (permalink / raw)
To: AngeloGioacchino Del Regno, Alexandre Courbot, Hans Verkuil,
Tzung-Bi Shih, Tiffany Lin, Andrew-CT Chen, Mauro Carvalho Chehab,
Rob Herring, Matthias Brugger, Tomasz Figa
Cc: George Sun, Xiaoyong Lu, Hsin-Yi Wang, Fritz Koenig,
Dafna Hirschfeld, Benjamin Gaignard, Daniel Vetter, dri-devel,
Irui Wang, Steve Cho, linux-media, devicetree, linux-kernel,
linux-arm-kernel, srv_heupstream, linux-mediatek,
Project_Global_Chrome_Upstream_Group
In-Reply-To: <07468ddd-22a8-c2a5-21fd-8468e0e77d74@collabora.com>
Hi AngeloGioacchino,
Thanks for your suggestion,
Separate this patch with mt8195 support, and sent it again.
On Thu, 2022-01-27 at 11:35 +0100, AngeloGioacchino Del Regno wrote:
> Il 27/01/22 03:55, Yunfei Dong ha scritto:
> > Init some of VP9 frame decode params to default value.
> >
> > Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
>
> Hello Yunfei,
>
> This patch is not strictly related to MediaTek SoCs, since it's
> modfying v4l2-core.
> Can you please send this patch separately?
>
> Thanks,
> Angelo
>
Best Regards,
Yunfei Dong
> > ---
> > drivers/media/v4l2-core/v4l2-ctrls-core.c | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c
> > b/drivers/media/v4l2-core/v4l2-ctrls-core.c
> > index 54abe5245dcc..b25c77b8a445 100644
> > --- a/drivers/media/v4l2-core/v4l2-ctrls-core.c
> > +++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c
> > @@ -112,6 +112,7 @@ static void std_init_compound(const struct
> > v4l2_ctrl *ctrl, u32 idx,
> > struct v4l2_ctrl_mpeg2_picture *p_mpeg2_picture;
> > struct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quant;
> > struct v4l2_ctrl_vp8_frame *p_vp8_frame;
> > + struct v4l2_ctrl_vp9_frame *p_vp9_frame;
> > struct v4l2_ctrl_fwht_params *p_fwht_params;
> > void *p = ptr.p + idx * ctrl->elem_size;
> >
> > @@ -152,6 +153,13 @@ static void std_init_compound(const struct
> > v4l2_ctrl *ctrl, u32 idx,
> > p_vp8_frame = p;
> > p_vp8_frame->num_dct_parts = 1;
> > break;
> > + case V4L2_CTRL_TYPE_VP9_FRAME:
> > + p_vp9_frame = p;
> > + p_vp9_frame->profile = 0;
> > + p_vp9_frame->bit_depth = 8;
> > + p_vp9_frame->flags |= V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING
> > |
> > + V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING;
> > + break;
> > case V4L2_CTRL_TYPE_FWHT_PARAMS:
> > p_fwht_params = p;
> > p_fwht_params->version = V4L2_FWHT_VERSION;
> >
>
>
^ permalink raw reply
* Re: [PATCH v6 2/2] serial:sunplus-uart:Add Sunplus SoC UART Driver
From: hammer hsieh @ 2022-01-28 3:36 UTC (permalink / raw)
To: Greg KH
Cc: Jiri Slaby, robh+dt, linux-serial, devicetree, linux-kernel,
p.zabel, wells.lu, hammer.hsieh
In-Reply-To: <YfFQ7v4dXPMV7ypw@kroah.com>
Hi, Greg KH:
I review all driver again.
I think only startup and shutdown not good.
I will modify like below.
If you are ok, I will submit next patch.
static int sunplus_startup(struct uart_port *port)
{
unsigned long flags;
unsigned int isc;
int ret;
ret = request_irq(port->irq, sunplus_uart_irq, 0, "sunplus_uart", port);
if (ret)
return ret;
spin_lock_irqsave(&port->lock, flags);
isc = readl(port->membase + SUP_UART_ISC); //add this line
isc |= SUP_UART_ISC_RXM;
writel(isc, port->membase + SUP_UART_ISC);
spin_unlock_irqrestore(&port->lock, flags);
return 0;
}
static void sunplus_shutdown(struct uart_port *port)
{
unsigned long flags;
unsigned int isc;
spin_lock_irqsave(&port->lock, flags);
isc = readl(port->membase + SUP_UART_ISC); //add this line
isc &= ~(SUP_UART_ISC_RXM | SUP_UART_ISC_TXM); //add this line
writel(isc, port->membase + SUP_UART_ISC); //modify this line
spin_unlock_irqrestore(&port->lock, flags);
free_irq(port->irq, port);
}
Greg KH <gregkh@linuxfoundation.org> 於 2022年1月26日 週三 下午9:47寫道：
>
> On Fri, Jan 14, 2022 at 10:22:56AM +0800, hammer hsieh wrote:
> > Jiri Slaby <jirislaby@kernel.org> 於 2022年1月13日 週四 下午7:12寫道：
> > >
> > > On 13. 01. 22, 11:56, hammer hsieh wrote:
> > > >> Could you explain me what posted write is and how does it not matter in
> > > >> this case?
> > > >>
> > > >
> > > > Each UART ISC register contains
> > >
> > > No, you still don't follow what I write. Use your favorite web search
> > > for "posted write" and/or consult with your HW team.
> > >
> >
> > Maybe this time, we are on the same page.
> > Our SP7021 chipset is designed on ARM Cortex-A7 Quad core.
> > Register Access through AMBA(AXI bus), and it is non-cached.
> >
> > Did you mean
> > case1 have concern about "posted write", and you want to know why it not matter?
> > case2 will be safer?
> >
> > Case1 :
> > spin_lock_irq_save()
> > writel(0, target register)
> > spin_unlock_irqrestore()
>
> A lock does not mean that your write made it to the device. Please talk
> to the hardware designers to properly determine how to correctly write
> to the hardware and "know" that the write succeeded or not. This driver
> does not seem to take that into consideration at all.
>
> thanks,
>
> greg k-h
^ permalink raw reply
* Re: [PATCH net-next v2 9/9] net: ethernet: mtk-star-emac: separate tx/rx handling with two NAPIs
From: Jakub Kicinski @ 2022-01-28 3:43 UTC (permalink / raw)
To: Biao Huang
Cc: David Miller, Rob Herring, Bartosz Golaszewski, Fabien Parent,
Felix Fietkau, John Crispin, Sean Wang, Mark Lee,
Matthias Brugger, netdev, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, Yinghua Pan, srv_heupstream,
Macpaul Lin
In-Reply-To: <20220127015857.9868-10-biao.huang@mediatek.com>
On Thu, 27 Jan 2022 09:58:57 +0800 Biao Huang wrote:
> Current driver may lost tx interrupts under bidirectional test with iperf3,
> which leads to some unexpected issues.
>
> This patch let rx/tx interrupt enable/disable separately, and rx/tx are
> handled in different NAPIs.
> +/* mtk_star_handle_irq - Interrupt Handler.
> + * @irq: interrupt number.
> + * @data: pointer to a network interface device structure.
if you mean this to me a kdoc comment it needs to start with /**
> + * Description : this is the driver interrupt service routine.
> + * it mainly handles:
> + * 1. tx complete interrupt for frame transmission.
> + * 2. rx complete interrupt for frame reception.
> + * 3. MAC Management Counter interrupt to avoid counter overflow.
> */
> static irqreturn_t mtk_star_handle_irq(int irq, void *data)
> {
> - struct mtk_star_priv *priv;
> - struct net_device *ndev;
> + struct net_device *ndev = data;
> + struct mtk_star_priv *priv = netdev_priv(ndev);
> + unsigned int intr_status = mtk_star_intr_ack_all(priv);
> + unsigned long flags = 0;
> +
> + if (intr_status & MTK_STAR_BIT_INT_STS_FNRC) {
> + if (napi_schedule_prep(&priv->rx_napi)) {
> + spin_lock_irqsave(&priv->lock, flags);
> + /* mask Rx Complete interrupt */
> + mtk_star_disable_dma_irq(priv, true, false);
> + spin_unlock_irqrestore(&priv->lock, flags);
> + __napi_schedule_irqoff(&priv->rx_napi);
> + }
> + }
>
> - ndev = data;
> - priv = netdev_priv(ndev);
> + if (intr_status & MTK_STAR_BIT_INT_STS_TNTC) {
> + if (napi_schedule_prep(&priv->tx_napi)) {
> + spin_lock_irqsave(&priv->lock, flags);
> + /* mask Tx Complete interrupt */
> + mtk_star_disable_dma_irq(priv, false, true);
> + spin_unlock_irqrestore(&priv->lock, flags);
> + __napi_schedule_irqoff(&priv->tx_napi);
> + }
> + }
Seems a little wasteful to retake the same lock twice if two IRQ
sources fire at the same time.
> @@ -1043,6 +1085,17 @@ static int mtk_star_netdev_start_xmit(struct sk_buff *skb,
> struct mtk_star_ring *ring = &priv->tx_ring;
> struct device *dev = mtk_star_get_dev(priv);
> struct mtk_star_ring_desc_data desc_data;
> + int nfrags = skb_shinfo(skb)->nr_frags;
> +
> + if (unlikely(mtk_star_tx_ring_avail(ring) < nfrags + 1)) {
> + if (!netif_queue_stopped(ndev)) {
> + netif_stop_queue(ndev);
> + /* This is a hard error, log it. */
> + netdev_err(priv->ndev, "%s: Tx Ring full when queue awake\n",
> + __func__);
This needs to be rate limited. Also no point printing the function
name, unless the same message appears in multiple places.
> + }
> + return NETDEV_TX_BUSY;
> + }
>
> desc_data.dma_addr = mtk_star_dma_map_tx(priv, skb);
> if (dma_mapping_error(dev, desc_data.dma_addr))
> @@ -1050,18 +1103,10 @@ static int mtk_star_netdev_start_xmit(struct sk_buff *skb,
>
> desc_data.skb = skb;
> desc_data.len = skb->len;
> -
> - spin_lock_bh(&priv->lock);
>
> mtk_star_ring_push_head_tx(ring, &desc_data);
>
> netdev_sent_queue(ndev, skb->len);
>
> - if (mtk_star_ring_full(ring))
> - netif_stop_queue(ndev);
Are you stopping the queue in advance somewhere else now? Did you only
test this with BQL enabled? Only place that stops the ring also prints
a loud warning now AFAICS..
> -static void mtk_star_tx_complete_all(struct mtk_star_priv *priv)
> +static int mtk_star_tx_poll(struct napi_struct *napi, int budget)
> {
> - struct mtk_star_ring *ring = &priv->tx_ring;
> - struct net_device *ndev = priv->ndev;
> - int ret, pkts_compl, bytes_compl;
> + int ret, pkts_compl = 0, bytes_compl = 0, count = 0;
> + struct mtk_star_priv *priv;
> + struct mtk_star_ring *ring;
> + struct net_device *ndev;
> + unsigned long flags = 0;
> + unsigned int entry;
> bool wake = false;
>
> - spin_lock(&priv->lock);
> + priv = container_of(napi, struct mtk_star_priv, tx_napi);
> + ndev = priv->ndev;
>
> - for (pkts_compl = 0, bytes_compl = 0;;
> + __netif_tx_lock_bh(netdev_get_tx_queue(priv->ndev, 0));
Do you really need to lock out the Tx while cleaning?
Drivers usually manage to implement concurrent Tx and cleanup with just
a couple of memory barriers.
> + ring = &priv->tx_ring;
> + entry = ring->tail;
> + for (pkts_compl = 0, bytes_compl = 0;
> + (entry != ring->head) && (count < budget);
budget is not really relevant for Tx, you can clean the whole ring.
netpoll will pass a budget of 0 to clean up rings.
> pkts_compl++, bytes_compl += ret, wake = true) {
> - if (!mtk_star_ring_descs_available(ring))
> - break;
>
> ret = mtk_star_tx_complete_one(priv);
> if (ret < 0)
> break;
> + count++;
> + entry = ring->tail;
> }
>
> @@ -1196,7 +1258,7 @@ static const struct ethtool_ops mtk_star_ethtool_ops = {
> .set_link_ksettings = phy_ethtool_set_link_ksettings,
> };
>
> -static int mtk_star_receive_packet(struct mtk_star_priv *priv)
> +static int mtk_star_rx(struct mtk_star_priv *priv, int budget)
> {
> struct mtk_star_ring *ring = &priv->rx_ring;
> struct device *dev = mtk_star_get_dev(priv);
> @@ -1204,107 +1266,86 @@ static int mtk_star_receive_packet(struct mtk_star_priv *priv)
> struct net_device *ndev = priv->ndev;
> struct sk_buff *curr_skb, *new_skb;
> dma_addr_t new_dma_addr;
> - int ret;
> + int ret, count = 0;
>
> - spin_lock(&priv->lock);
> - ret = mtk_star_ring_pop_tail(ring, &desc_data);
> - spin_unlock(&priv->lock);
> - if (ret)
> - return -1;
> + while (count < budget) {
> + ret = mtk_star_ring_pop_tail(ring, &desc_data);
> + if (ret)
> + return -1;
> -static int mtk_star_process_rx(struct mtk_star_priv *priv, int budget)
> -{
> - int received, ret;
> + count++;
>
> - for (received = 0, ret = 0; received < budget && ret == 0; received++)
> - ret = mtk_star_receive_packet(priv);
> + desc_data.len = skb_tailroom(new_skb);
> + desc_data.skb = new_skb;
> + mtk_star_ring_push_head_rx(ring, &desc_data);
> + }
>
> mtk_star_dma_resume_rx(priv);
Again you can get a call with a budget of 0, not sure if it's okay to
resume DMA in that case..
> - return received;
> + return count;
> }
^ permalink raw reply
* [PATCH v2, 3/7] dt-bindings: media: mtk-vcodec: Adds decoder dt-bindings for mt8195
From: Yunfei Dong @ 2022-01-28 3:54 UTC (permalink / raw)
To: Yunfei Dong, Alexandre Courbot, Hans Verkuil, Tzung-Bi Shih,
AngeloGioacchino Del Regno, Tiffany Lin, Andrew-CT Chen,
Mauro Carvalho Chehab, Rob Herring, Matthias Brugger, Tomasz Figa
Cc: George Sun, Xiaoyong Lu, Hsin-Yi Wang, Fritz Koenig,
Dafna Hirschfeld, Benjamin Gaignard, Daniel Vetter, dri-devel,
Irui Wang, Steve Cho, linux-media, devicetree, linux-kernel,
linux-arm-kernel, srv_heupstream, linux-mediatek,
Project_Global_Chrome_Upstream_Group
In-Reply-To: <20220128035440.24533-1-yunfei.dong@mediatek.com>
Adds decoder dt-bindings for mt8195.
Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
---
.../bindings/media/mediatek,vcodec-subdev-decoder.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
index a3c892338ac0..a2f2db29daed 100644
--- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
@@ -50,6 +50,7 @@ properties:
enum:
- mediatek,mt8192-vcodec-dec
- mediatek,mt8186-vcodec-dec
+ - mediatek,mt8195-vcodec-dec
reg:
maxItems: 1
--
2.25.1
^ permalink raw reply related
* [PATCH v2, 4/7] media: mtk-vcodec: Adds compatible for mt8195
From: Yunfei Dong @ 2022-01-28 3:54 UTC (permalink / raw)
To: Yunfei Dong, Alexandre Courbot, Hans Verkuil, Tzung-Bi Shih,
AngeloGioacchino Del Regno, Tiffany Lin, Andrew-CT Chen,
Mauro Carvalho Chehab, Rob Herring, Matthias Brugger, Tomasz Figa
Cc: George Sun, Xiaoyong Lu, Hsin-Yi Wang, Fritz Koenig,
Dafna Hirschfeld, Benjamin Gaignard, Daniel Vetter, dri-devel,
Irui Wang, Steve Cho, linux-media, devicetree, linux-kernel,
linux-arm-kernel, srv_heupstream, linux-mediatek,
Project_Global_Chrome_Upstream_Group
In-Reply-To: <20220128035440.24533-1-yunfei.dong@mediatek.com>
Adds compatible for mt8195 platform.
Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c
index 2d21d0010c9c..938bf14e4e8c 100644
--- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c
+++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c
@@ -468,6 +468,10 @@ static const struct of_device_id mtk_vcodec_match[] = {
.compatible = "mediatek,mt8186-vcodec-dec",
.data = &mtk_vdec_single_core_pdata,
},
+ {
+ .compatible = "mediatek,mt8195-vcodec-dec",
+ .data = &mtk_lat_sig_core_pdata,
+ },
{},
};
--
2.25.1
^ permalink raw reply related
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