Re: [PATCH v2 8/8] iio: adc: rzt2h: Add support for RZ/V2H(P) SoC

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] pm: hardware stabilization delay is bypassed for SoCs without calibration
--

commit b9111d7d4d36117212882ae96747fcfe15f3bdd8
Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
iio: adc: rzt2h: Add support for RZ/V2H(P) SoC

Add support for the ADC found on the Renesas RZ/V2H(P) SoC, which shares
the RZ/T2H ADC IP but differs in channel count, sampling, calibration and
resolution support.

> diff --git a/drivers/iio/adc/rzt2h_adc.c b/drivers/iio/adc/rzt2h_adc.c
> index 0703c2025e3fc..be8273f3b61d3 100644
> --- a/drivers/iio/adc/rzt2h_adc.c
> +++ b/drivers/iio/adc/rzt2h_adc.c

[ ... ]

> @@ -818,6 +1005,12 @@ static int rzt2h_adc_pm_runtime_resume(struct device *dev)
>  	if (ret)
>  		return ret;
>  
> +	ret = pwrseq_enable(adc->pwrseq);
> +	if (ret) {
> +		reset_control_assert(adc->rstc);
> +		return ret;
> +	}
> +
>  	if (!(chip_info->features & RZT2H_ADC_FEATURE_CALIBRATION))
>  		return 0;

[Severity: High]
The datasheet note below indicates a 0.5 µs delay is required after
releasing the module-stop state before starting A/D conversion.

With the newly added RZ/V2H(P) SoC that lacks the calibration feature,
rzt2h_adc_pm_runtime_resume() returns early here, completely bypassing the
stabilization delay.

Will this lead to hardware being accessed before the analog circuit has
settled, potentially resulting in corrupted or inaccurate data on this new
SoC?

>  
>  	/*
>  	 * Datasheet Page 2810, Section 41.5.6:
>  	 * After release from the module-stop state, wait for at least
>  	 * 0.5 µs before starting A/D conversion.
>  	 */
>  	fsleep(1);
>  
>  	ret = rzt2h_adc_calibrate(adc);
> -	if (ret)
> +	if (ret) {
> +		pwrseq_disable(adc->pwrseq);
>  		reset_control_assert(adc->rstc);
> +	}
>  
>  	return ret;
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261009184122.1378797-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=8