From: sashiko-bot@kernel.org
To: "Hangxiang Ma" <hangxiang.ma@oss.qualcomm.com>
Cc: devicetree@vger.kernel.org, vkoul@kernel.org,
conor+dt@kernel.org, olteanv@gmail.com, media-ci@linuxtv.org,
linux-phy@lists.infradead.org, robh@kernel.org,
neil.armstrong@linaro.org
Subject: Re: [PATCH v21 10/14] media: qcom: camss: tpg: Add support for v2.4.0 TPG
Date: Mon, 12 Oct 2026 07:01:18 +0000 [thread overview]
Message-ID: <sashiko-outbox-167769@kernel.org> (raw)
In-Reply-To: <20261011-kaanapali-camss-v21-10-04fd28d815c6@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] media: qcom: camss: csid: incorrect fallback to physical PHY when TPG disabled
- [Medium] media: qcom: camss: uninitialized hw_version used in tpg_reset
--
commit 83c15a87930a3b292c2eeb9b034d6436828fd5de
Author: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
media: qcom: camss: tpg: Add support for v2.4.0 TPG
Add support for the TPG found on Kaanapali. This TPG uses hardware
version 2.4.0, which drives test-enable and reset through the
TPG_CTRL_CMD register at offset 0x1f4 instead of the TEST_EN bit in
TPG_CTRL and the TPG_CLEAR register. Its output is routed into the
CSID 1080 RX through the CSI2 TPG mux, so the CSID selects the TPG as
the data source when a test pattern is selected.
> diff --git a/drivers/media/platform/qcom/camss/camss-csid-1080.c b/drivers/media/platform/qcom/camss/camss-csid-1080.c
> index 46e443e05195a..851b3cd712f52 100644
> --- a/drivers/media/platform/qcom/camss/camss-csid-1080.c
> +++ b/drivers/media/platform/qcom/camss/camss-csid-1080.c
[ ... ]
> @@ -148,8 +151,16 @@ static void __csid_configure_rx(struct csid_device *csid,
>
> val = (lane_cnt - 1) << CSI2_RX_CFG0_NUM_ACTIVE_LANES;
> val |= phy->lane_assign << CSI2_RX_CFG0_DL0_INPUT_SEL;
> - val |= (phy->csiphy_id + CSI2_RX_CFG0_PHY_SEL_BASE_IDX)
> - << CSI2_RX_CFG0_PHY_NUM_SEL;
> +
> + if (camss->tpg && csid->tpg_linked &&
> + camss->tpg[phy->csiphy_id].testgen.mode != TPG_PAYLOAD_MODE_DISABLED) {
> + val |= FIELD_PREP(CSI2_RX_CFG0_TPG_MUX_SEL, phy->csiphy_id + 1);
> + val |= CSI2_RX_CFG0_TPG_MUX_EN;
> + } else {
> + val |= (phy->csiphy_id + CSI2_RX_CFG0_PHY_SEL_BASE_IDX)
> + << CSI2_RX_CFG0_PHY_NUM_SEL;
> + }
> +
[Severity: Medium]
When csid->tpg_linked is true, csid_link_setup() has already overwritten
phy->csiphy_id with the tpg->id. If a user leaves the TPG in the default
disabled mode (testgen.mode == TPG_PAYLOAD_MODE_DISABLED), does this
fallback to the else branch mistakenly use the tpg->id as a physical
CSIPHY index?
This appears to misconfigure the hardware to route data from a physical
camera sensor that happens to share the same numeric ID as the requested
TPG, silently bypassing the TPG entirely.
> writel(val, csid->base + CSID_CSI2_RX_CFG0);
>
> val = CSI2_RX_CFG1_ECC_CORRECTION_EN;
> diff --git a/drivers/media/platform/qcom/camss/camss-tpg-gen1.c b/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
> index d29de5f93c18e..cabbb2638cf38 100644
> --- a/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
> +++ b/drivers/media/platform/qcom/camss/camss-tpg-gen1.c
[ ... ]
> @@ -164,18 +167,26 @@ static int tpg_stream_on(struct tpg_device *tpg)
[ ... ]
> static int tpg_reset(struct tpg_device *tpg)
> {
> - writel(0, tpg->base + TPG_CTRL);
> - writel(1, tpg->base + TPG_CLEAR);
> + if (tpg->hw_version < TPG_HW_VER_2_4_0)
> + writel(0, tpg->base + TPG_CTRL);
[Severity: Medium]
Is tpg->hw_version properly initialized when this function is called for
the first time? Looking at tpg_set_power() in camss-tpg.c, it invokes
the reset callback before hw_version is populated on power-on:
tpg_set_power()
...
tpg->res->hw_ops->reset(tpg);
tpg->res->hw_ops->hw_version(tpg);
Since the struct is dynamically allocated and zeroed, the first
tpg_reset() will evaluate tpg->hw_version as 0. This satisfies the
condition and incorrectly executes the legacy write to TPG_CTRL even on
newer v2.4.0 hardware.
> +
> + writel(TPG_CTRL_CMD_HW_RESET, tpg->base + TPG_CTRL_CMD);
>
> return 0;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261011-kaanapali-camss-v21-0-04fd28d815c6@oss.qualcomm.com?part=10
next prev parent reply other threads:[~2026-10-12 7:01 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-12 6:45 [PATCH v21 00/14] media: qcom: camss: Add Kaanapali support Hangxiang Ma
2026-10-12 6:45 ` [PATCH v21 01/14] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Kaanapali CSI2 PHY Hangxiang Ma
2026-10-12 6:45 ` [PATCH v21 02/14] phy: qcom-mipi-csi2: Parametrise the common status register offset Hangxiang Ma
2026-10-12 6:45 ` [PATCH v21 03/14] phy: qcom-mipi-csi2: Add Kaanapali support Hangxiang Ma
2026-10-12 6:45 ` [PATCH v21 04/14] media: qcom: camss: Issue stream-on REG_UPDATE from CSID Hangxiang Ma
2026-10-12 7:01 ` sashiko-bot
2026-10-12 7:20 ` Hangxiang Ma
2026-10-12 6:45 ` [PATCH v21 05/14] media: dt-bindings: Add CAMSS device for Kaanapali Hangxiang Ma
2026-10-12 6:45 ` [PATCH v21 06/14] media: qcom: camss: Add Kaanapali compatible Hangxiang Ma
2026-10-12 7:00 ` sashiko-bot
2026-10-12 6:45 ` [PATCH v21 07/14] media: qcom: camss: csiphy: Add support for v2.4.0 two-phase CSIPHY Hangxiang Ma
2026-10-12 7:07 ` sashiko-bot
2026-10-12 6:45 ` [PATCH v21 08/14] media: qcom: camss: csid: Add support for CSID 1080 Hangxiang Ma
2026-10-12 6:59 ` sashiko-bot
2026-10-12 6:45 ` [PATCH v21 09/14] media: qcom: camss: vfe: Add support for VFE 1080 Hangxiang Ma
2026-10-12 7:00 ` sashiko-bot
2026-10-12 6:45 ` [PATCH v21 10/14] media: qcom: camss: tpg: Add support for v2.4.0 TPG Hangxiang Ma
2026-10-12 7:01 ` sashiko-bot [this message]
2026-10-12 6:45 ` [PATCH v21 11/14] arm64: dts: qcom: kaanapali: Add CAMSS and CSIPHY block definitions Hangxiang Ma
2026-10-12 6:45 ` [PATCH v21 12/14] arm64: dts: qcom: kaanapali: Add CCI controller nodes Hangxiang Ma
2026-10-12 6:45 ` [PATCH v21 13/14] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl Hangxiang Ma
2026-10-12 6:45 ` [PATCH v21 14/14] arm64: dts: qcom: kaanapali-mtp-camera-s5kjn5: Add DT overlay Hangxiang Ma
2026-10-12 6:57 ` sashiko-bot
2026-10-12 6:59 ` Hangxiang Ma
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