Re: [PATCH v3 3/5] arm64: dts: qcom: Introduce Maili SoC

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] dt-bindings: pcie: misplaced phys and missing phy-names in pcie nodes
--

commit 25d4f4b51a97698c80eebd846bb1cbf9ae8ec02d
Author: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
arm64: dts: qcom: Introduce Maili SoC

This commit adds the device tree for the Qualcomm Maili SoC. It includes
support for CPUs, interconnects, interrupts, timers, various controllers,
and peripheral devices such as PCIe and USB.

> diff --git a/arch/arm64/boot/dts/qcom/maili.dtsi b/arch/arm64/boot/dts/qcom/maili.dtsi
> new file mode 100644
> index 0000000000000..0aa5bd4ea21c3
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/maili.dtsi
> @@ -0,0 +1,6930 @@
[ ... ]
> +			pcie_port0: pcie@0 {
> +				device_type = "pci";
> +				reg = <0x0 0x0 0x0 0x0 0x0>;
> +				bus-range = <0x01 0xff>;
> +
> +				#address-cells = <3>;
> +				#size-cells = <2>;
> +				ranges;
> +				phys = <&pcie0_phy>;

[Severity: High]
Is the phys property misplaced in the pcie_port0 child node instead of
the parent pcie0 node?

The Qualcomm PCIe host controller driver (pcie-qcom.c) expects to acquire
the PHY from the main controller node via devm_phy_get(dev, "pciephy").
Without it, PHY initialization and PCIe link training will fail.

Could phys be moved to the pcie0 node and the missing phy-names = "pciephy"
property be added?

> +			};
> +		};
[ ... ]
> +			pcie_port1: pcie@0 {
> +				device_type = "pci";
> +				reg = <0x0 0x0 0x0 0x0 0x0>;
> +				bus-range = <0x01 0xff>;
> +
> +				#address-cells = <3>;
> +				#size-cells = <2>;
> +				ranges;
> +				phys = <&pcie1_phy>;

[Severity: High]
Does this node incorrectly define the phys property for the pcie_port1
child node rather than the parent pcie1 host bridge node?

Similar to the pcie_port0 node, the host controller driver expects to
acquire the PHY from the main controller node.

Should the phys property be moved to the pcie1 parent node and a
phy-names = "pciephy" property be included?

> +			};
> +		};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261012-maili-dts-v3-0-8b499e7b9a52@oss.qualcomm.com?part=3