Re: [PATCH DNM RFC 13/16] arm64: dts: qcom: sm8650: Describe clock controller power rails

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: clock: qcom: multiple power-domains exceed schema limits
--

commit 0272a7914d28ecdc80c317abd5c3a4cf467f9ae8
Author: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

arm64: dts: qcom: sm8650: Describe clock controller power rails

The SM8650 clock-controller nodes omit rails needed by their clocks and
PLLs. This commit describes the required power rails for these controllers
to prevent probe failures.

> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 86fbb0fd6472d..0847cfb35954e 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -2017,8 +2017,9 @@ gcc: clock-controller@100000 {
>  				 <&ufs_mem_phy 1>,
>  				 <&ufs_mem_phy 2>,
>  				 <&usb_dp_qmpphy QMP_USB43DP_USB3_PIPE_CLK>;
> -
> -			power-domains = <&rpmhpd RPMHPD_CX>;
> +			power-domains = <&rpmhpd RPMHPD_CX>,
> +					<&rpmhpd RPMHPD_CX_AO>,
> +					<&rpmhpd RPMHPD_MX>;

[Severity: Low]
Does this exceed the dt-binding limits? For instance, qcom,sm8650-gcc.yaml
restricts power-domains to 1 item, but this provides 3. This will cause
make dtbs_check to fail unless the yaml binding is updated.

> @@ -4364,6 +4365,10 @@ gpucc: clock-controller@3d90000 {
>  			clocks = <&bi_tcxo_div2>,
>  				 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
>  				 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
> +			power-domains = <&rpmhpd RPMHPD_MX>,
> +					<&rpmhpd RPMHPD_CX>,
> +					<&rpmhpd RPMHPD_MXC>,
> +					<&rpmhpd RPMHPD_GFX>;

[Severity: Low]
Will this trigger a validation failure for gpucc? The qcom,sm8450-gpucc.yaml
binding limits power-domains to exactly 2 items, but 4 are being provided
here.

[ ... ]

> @@ -6049,8 +6055,8 @@ dispcc: clock-controller@af00000 {
>  				 <0>, /* dp3 */
>  				 <0>;
>  
> -			power-domains = <&rpmhpd RPMHPD_MMCX>;
> -			required-opps = <&rpmhpd_opp_low_svs>;
> +			power-domains = <&rpmhpd RPMHPD_MMCX>,
> +					<&rpmhpd RPMHPD_MX>;

[Severity: Low]
Is this compatible with the qcom,sm8550-dispcc.yaml schema? The schema
has a maxItems constraint of 1 for power-domains, but 2 are provided here,
which will result in a dtbs_check error.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261014-topic-qc_clk_dvfs-v1-0-3041b788e9f7@oss.qualcomm.com?part=13