Re: [PATCH v2 24/24] ARM: dts: zte: Add ZTE ZXHN H3600 board

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] nvmem: missing mac-base layout handler causes MAC collisions
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commit c6cd707e15e55e65e91c2a8c00f74a09830fe8da
Author: Navid Ghahremani <ghahramani.navid@gmail.com>

ARM: dts: zte: Add ZTE ZXHN H3600 board
    
Add the device tree for the ZTE ZXHN H3600 Wi-Fi 6 home gateway router.
Configure the internal Gigabit switch ports, external Sanechips ZX5201
WAN PHY, SPI NAND flash on the SPI controller, LEDs, buttons, and
MediaTek MT7915 Wi-Fi cards on PCIe ports 0 and 1.

> diff --git a/arch/arm/boot/dts/zte/zx279128s-zte-zxhn-h3600.dts b/arch/arm/boot/dts/zte/zx279128s-zte-zxhn-h3600.dts
> new file mode 100644
> index 0000000000000..d46390f0754cb
> --- /dev/null
> +++ b/arch/arm/boot/dts/zte/zx279128s-zte-zxhn-h3600.dts

[ ... ]

> +&gmac_port0 {
> +	label = "lan1";
> +	phy-handle = <&phy10>;
> +	phy-mode = "internal";
> +	nvmem-cells = <&macaddr_tag_1e 0>;
> +	nvmem-cell-names = "mac-address";
> +	status = "okay";
> +};

[ ... ]

> +&gmac_port4 {
> +	label = "wan";
> +	phy-handle = <&phy8>;
> +	phy-mode = "gmii";
> +	nvmem-cells = <&macaddr_tag_1e 1>;
> +	nvmem-cell-names = "mac-address";
> +	status = "okay";
> +};

[ ... ]

> +			partition@100000 {
> +				label = "tag";
> +				reg = <0x0100000 0x0100000>;
> +				read-only;
> +
> +				nvmem-layout {
> +					compatible = "fixed-layout";
> +					#address-cells = <1>;
> +					#size-cells = <1>;
> +
> +					/* the LAN ports' MAC; the WAN port uses the next one */
> +					macaddr_tag_1e: macaddr@1e {
> +						compatible = "mac-base";
> +						reg = <0x1e 0x6>;
> +						#nvmem-cell-cells = <1>;
> +					};

[Severity: High]
Will the WAN and LAN interfaces end up with the exact same MAC address here?

Since the kernel currently lacks an NVMEM layout driver that binds to the
"mac-base" compatible string, there appears to be no read_post_process hook
to handle the NVMEM cell index offset.

When of_nvmem_cell_get() parses these entries during device probe,
__nvmem_cell_read() will fall back to simply reading 6 bytes at offset 0x1e
for both ports, completely ignoring the cell index of 0 for LAN and 1 for WAN.

Could this lead to L2 network collisions and broken routing on this board?

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Sashiko AI review · https://sashiko.dev/#/patchset/20261014072109.1759502-1-ghahramani.navid@gmail.com?part=24