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From: sashiko-bot@kernel.org
To: "Krzysztof Kaszubski" <sympthicode@gmail.com>
Cc: imx@lists.linux.dev, devicetree@vger.kernel.org, robh@kernel.org,
	conor+dt@kernel.org, Frank.Li@kernel.org
Subject: Re: [PATCH] ARM: dts: imx7ulp: add "tpm6" pwm node to i.MX7ULP
Date: Wed, 21 Oct 2026 08:53:29 +0000	[thread overview]
Message-ID: <sashiko-outbox-179991@kernel.org> (raw)
In-Reply-To: <20261021084602.121087-1-sympthicode@gmail.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] ARM: dts: imx7ulp: tpm6 placed under ahbbridge0 instead of ahbbridge1
--

commit cb9013d8dcda32d8a277bf006e44680f1bf14cb8
Author: Krzysztof Kaszubski <simpthicode@gmail.com>

ARM: dts: imx7ulp: add "tpm6" pwm node to i.MX7ULP

This commit adds the tpm6 (pwm@40a10000) device tree node to
arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi to enable PWM and timer support in the
Application Domain.

> diff --git a/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi b/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi
> index 39e37ae9b2b1e..f5ec5e9d65de2 100644
> --- a/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi
> +++ b/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi
> @@ -216,6 +216,16 @@ tpm5: tpm@40260000 {
>  			clock-names = "ipg", "per";
>  		};
>  
> +		tpm6: pwm@40a10000 {
> +			compatible = "fsl,imx7ulp-pwm";
> +			reg = <0x40a10000 0x1000>;
> +			assigned-clocks = <&pcc3 IMX7ULP_CLK_LPTPM6>;
> +			assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
> +			clocks = <&pcc3 IMX7ULP_CLK_LPTPM6>;
> +			#pwm-cells = <3>;
> +			status = "disabled";
> +		};
> +
>  		usbotg1: usb@40330000 {
>  			compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb", "fsl,imx27-usb";
>  			reg = <0x40330000 0x200>;

[Severity: Low]
Should tpm6 (pwm@40a10000) be placed under ahbbridge1 instead of ahbbridge0?

In arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi, this hunk inserts tpm6 inside
ahbbridge0 (bus@40000000) between tpm5 (tpm@40260000) and usbotg1
(usb@40330000). However, ahbbridge0 only covers the address range 0x40000000
through 0x407fffff:

	ahbbridge0: bus@40000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x40000000 0x800000>;
		ranges;

Peripherals in the 0x40800000..0x40ffffff range and clocked by pcc3 reside
under ahbbridge1 (bus@40800000):

	ahbbridge1: bus@40800000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x40800000 0x800000>;
		ranges;

		lpi2c6: i2c@40a40000 {

Placing pwm@40a10000 under ahbbridge0 puts it outside the parent bus reg
range and out of unit-address order when compiling or validating device trees
that include imx7ulp.dtsi. Should tpm6 be moved under ahbbridge1 right before
lpi2c6 (i2c@40a40000)?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261021084602.121087-1-sympthicode@gmail.com?part=1

  reply	other threads:[~2026-10-21  8:53 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-21  8:45 [PATCH] ARM: dts: imx7ulp: add "tpm6" pwm node to i.MX7ULP Krzysztof Kaszubski
2026-10-21  8:53 ` sashiko-bot [this message]
2026-10-21 12:35 ` [PATCH v2] ARM: dts: imx7ulp: Add TMP6 PWM " Krzysztof Kaszubski
2026-10-21 14:42   ` Frank Li
2026-10-21 14:40 ` [PATCH] ARM: dts: imx7ulp: add "tpm6" pwm " Frank Li

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