Re: [PATCH 5/9] arm64: dts: airoha: en7581: add watchdog node

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] arm64: dts: airoha: watchdog reg size 0x38 excludes WDT_RELOAD at 0x38
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commit 285873958d4bd82b85e9f3812fdf852db2de2884
Author: Christian Marangi <ansuelsmth@gmail.com>

arm64: dts: airoha: en7581: add watchdog node

This commit adds the watchdog device tree node to en7581.dtsi to handle
system stalls and reboots.

> diff --git a/arch/arm64/boot/dts/airoha/en7581.dtsi b/arch/arm64/boot/dts/airoha/en7581.dtsi
> index 58bd8b318910e..3a4a4fb0eba9b 100644
> --- a/arch/arm64/boot/dts/airoha/en7581.dtsi
> +++ b/arch/arm64/boot/dts/airoha/en7581.dtsi
> @@ -484,6 +484,14 @@ uart1: serial@1fbf0000 {
>  			clock-frequency = <1843200>;
>  		};
>  
> +		watchdog@1fbf0100 {
> +			compatible = "airoha,en7581-wdt";
> +			reg = <0x0 0x1fbf0100 0x0 0x38>;

[Severity: Medium]
Should the reg size in watchdog@1fbf0100 be 0x3c instead of 0x38?

In drivers/watchdog/airoha_wdt.c, WDT_RELOAD is defined at offset 0x38 and is
accessed as a 32-bit register in airoha_wdt_ping() when pinging or resuming
the watchdog:

#define WDT_RELOAD			0x38
#define   WDT_RLD			BIT(0)
...
static int airoha_wdt_ping(struct watchdog_device *wdd)
{
	struct airoha_wdt_desc *airoha_wdt = watchdog_get_drvdata(wdd);
	u32 val;

	val = readl(airoha_wdt->base + WDT_RELOAD);
	val |= WDT_RLD;
	writel(val, airoha_wdt->base + WDT_RELOAD);

	return 0;
}

With a size of 0x38, the resource mapped via devm_platform_ioremap_resource()
in airoha_wdt_probe() only covers offsets 0x00 through 0x37, leaving the
4-byte WDT_RELOAD register at 0x38..0x3b outside the declared MMIO resource
region (and the binding example in
Documentation/devicetree/bindings/watchdog/airoha,en7581-wdt.yaml also uses
0x3c).

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261026095727.31708-1-ansuelsmth@gmail.com?part=5