Re: [PATCH 1/3] arm64: dts: mediatek: mt8192-asurada: Add ramp-delay for MT6315 regulators

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] arm64: dts: mediatek: swapped regulator-ramp-delay for Vbcpu and Vlcpu
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commit 810dcac6146b830cb56f853c88e0887dc012ef9d
Author: Chen-Yu Tsai <wenst@chromium.org>

arm64: dts: mediatek: mt8192-asurada: Add ramp-delay for MT6315 regulators

This commit adds regulator-ramp-delay properties for the MT6315 buck
regulators (Vbcpu, Vlcpu, and Vgpu) on Asurada to ensure voltage increases
settle before switching CPU or GPU to higher operating points.

> diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
> index 40d34b16dc807..68d84fc55767b 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
> @@ -1500,6 +1500,7 @@ mt6315_6_vbuck1: vbuck1 {
>  				regulator-min-microvolt = <400000>;
>  				regulator-max-microvolt = <1193750>;
>  				regulator-enable-ramp-delay = <256>;
> +				regulator-ramp-delay = <4500>;
>  				regulator-allowed-modes = <0 1 2>;
>  				regulator-always-on;
>  			};
> @@ -1509,6 +1510,7 @@ mt6315_6_vbuck3: vbuck3 {
>  				regulator-min-microvolt = <400000>;
>  				regulator-max-microvolt = <1193750>;
>  				regulator-enable-ramp-delay = <256>;
> +				regulator-ramp-delay = <8000>;

[Severity: High]
Are the regulator-ramp-delay values for mt6315_6_vbuck1 and mt6315_6_vbuck3
swapped here?

The commit message states that the slew rates are 8000 uV/us for Vbcpu, and
4500 uV/us for Vlcpu and Vgpu. However, in mt8192-asurada.dtsi,
mt6315_6_vbuck1 is Vbcpu and mt6315_6_vbuck3 is Vlcpu:

	mt6315_6_vbuck1: vbuck1 {
		regulator-name = "Vbcpu";
		...
		regulator-ramp-delay = <4500>;
		...
	};

	mt6315_6_vbuck3: vbuck3 {
		regulator-name = "Vlcpu";
		...
		regulator-ramp-delay = <8000>;
		...
	};

Because mt6315_volt_range_ops does not implement .set_ramp_delay,
_regulator_set_voltage_time() uses constraints->ramp_delay directly to
compute the settling wait time during cpufreq DVFS transitions. Assigning
8000 to Vlcpu when its hardware slew rate is 4500 uV/us causes the regulator
core to wait for less than the required voltage ramp time before scaling the
little CPU cluster frequency up, while waiting longer than needed on Vbcpu.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261030103418.2355854-1-wenst@chromium.org?part=1