Re: [PATCH net-next v4 3/8] dt-bindings: net: dsa: Add SoC-e SWIP switch function

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] dt-bindings: net: dsa: soce,swip-switch: port@ nodes bypass port
  constraints
--

commit 4683eac7073869a69dfbcd2a3c82b050378eb665
Author: Vasilij Strassheim <v.strassheim@linutronix.de>

dt-bindings: net: dsa: Add SoC-e SWIP switch function

This commit adds a devicetree binding schema for the Ethernet switch
function integrated into SoC-e SWIP FPGA cores.

> diff --git a/Documentation/devicetree/bindings/net/dsa/soce,swip-switch.yaml b/Documentation/devicetree/bindings/net/dsa/soce,swip-switch.yaml
> new file mode 100644
> index 0000000000000..daac779c466d9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/dsa/soce,swip-switch.yaml
> @@ -0,0 +1,96 @@
[ ... ]
> +$ref: dsa.yaml#/$defs/ethernet-ports
> +
> +properties:
> +  compatible:
> +    const: soce,swip-switch-00-04-0c-10
> +    description:
> +      This compatible identifies the register layout; its suffix gives
> +      the offsets of the core version and feature identification
> +      registers (0x00, 0x04, 0x0c, and 0x10). Port counts and optional
> +      features depend on the FPGA synthesis configuration and are
> +      detected at runtime using this register layout.
> +
> +  reg: false
> +
> +  reg-names: false
> +
> +  ethernet-ports:
> +    type: object
> +    patternProperties:
> +      '^ethernet-port@[0-9a-f]+$':
> +        type: object
> +
> +        properties:
> +          reg:
> +            maximum: 30
> +            description: Switch port index, from 0 through 30.
> +
> +          phy-mode:
> +            enum:
> +              - mii
> +              - gmii
> +              - rmii
> +              - rgmii
> +              - rgmii-id
> +              - rgmii-rxid
> +              - rgmii-txid
> +
> +        required:
> +          - reg
> +          - phy-mode

[Severity: Low]
Because this schema references dsa.yaml#/$defs/ethernet-ports, which
matches both port@<n> and ethernet-port@<n> child nodes via
^(ethernet-)?port@[0-9a-f]+$ and marks them as evaluated for
unevaluatedProperties: false, any board devicetree using port@<n> child
nodes under ethernet-ports will be accepted by dsa.yaml without triggering
the patternProperties constraints here.

Would it make sense to change the pattern under ethernet-ports to
^(ethernet-)?port@[0-9a-f]+$ (or explicitly disallow port@<n> nodes) so
that port@<n> nodes cannot bypass the reg maximum and required phy-mode
checks?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261105-devel-vstrassheim-soce-dsa-ml-v4-0-02f3cde2afa1@linutronix.de?part=3