From: sashiko-bot@kernel.org
To: "Andrew Gigena" <mail@andrewgigena.dev>
Cc: devicetree@vger.kernel.org, linux-phy@lists.infradead.org,
robh@kernel.org, conor+dt@kernel.org, media-ci@linuxtv.org,
vkoul@kernel.org, neil.armstrong@linaro.org, olteanv@gmail.com
Subject: Re: [PATCH v3 7/7] arm64: dts: qcom: sm8150: Add CAMSS and CCI nodes
Date: Fri, 06 Nov 2026 18:59:47 +0000 [thread overview]
Message-ID: <sashiko-outbox-202123@kernel.org> (raw)
In-Reply-To: <20261106-sm8150-v7.4-rc1-camss-v3-7-0103e8a0bbcd@andrewgigena.dev>
Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [Medium] arm64: dts: qcom: sm8150: camss endpoints omit required
data-lanes
- [Low] arm64: dts: qcom: sm8150: camss placed before csiphy0..3 out of
address order
--
commit c52d60a765d4e993fcd753e18db2ef2055f389e5
Author: Andrew Gigena <mail@andrewgigena.dev>
arm64: dts: qcom: sm8150: Add CAMSS and CCI nodes
This commit adds Devicetree nodes for the SM8150 CAMSS ISP, four CSI2
PHYs, and two CCI I2C controllers along with their TLMM pin
configurations.
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 293fcbacff346..008f787235b86 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
[ ... ]
> @@ -3782,6 +3862,414 @@ camnoc_virt: interconnect@ac00000 {
[ ... ]
> + camss: isp@acaf000 {
> + compatible = "qcom,sm8150-camss";
> + status = "disabled";
[ ... ]
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + camss_csi0_in: endpoint {
> + remote-endpoint = <&csiphy0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + camss_csi1_in: endpoint {
> + remote-endpoint = <&csiphy1_out>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + camss_csi2_in: endpoint {
> + remote-endpoint = <&csiphy2_out>;
> + };
> + };
> +
> + port@3 {
> + reg = <3>;
> +
> + camss_csi3_in: endpoint {
> + remote-endpoint = <&csiphy3_out>;
> + };
> + };
> + };
> + };
[Severity: Medium]
Should port@0 through port@3 in camss omit the pre-populated
camss_csi0_in..camss_csi3_in endpoint nodes here so that board DTS files
instantiate only the active endpoints with their data-lanes?
Documentation/devicetree/bindings/media/qcom,sm8150-camss.yaml requires
data-lanes on every endpoint under port@[0-3], so enabling camss on a
board that uses fewer than all four CSI2 PHYs leaves the unused
endpoints without data-lanes and fails dtbs_check. At runtime, if a
board DTS only sets data-lanes on the sensor-facing csiphyN_in endpoint,
camss_parse_ports() -> camss_parse_endpoint_node() parses camss_csiN_in
without data-lanes, does not select V4L2_MBUS_CSI2_DPHY in
v4l2_fwnode_endpoint_parse(), and fails probe with -EINVAL:
drivers/media/platform/qcom/camss/camss.c:camss_parse_endpoint_node() {
...
v4l2_fwnode_endpoint_parse(of_fwnode_handle(node), &vep);
if (vep.bus_type != V4L2_MBUS_CSI2_DPHY) {
dev_err(dev, "Unsupported bus type %d\n", vep.bus_type);
return -EINVAL;
}
...
}
> +
> + csiphy0: phy@ac65000 {
> + compatible = "qcom,sm8150-csi2-phy";
> + reg = <0 0xac65000 0 0x1000>;
> + status = "disabled";
[Severity: Low]
Should csiphy0..csiphy3 (phy@ac65000..phy@ac68000) be placed before
camss (isp@acaf000) to keep /soc@0 child nodes in ascending unit-address
order?
Because of_platform_populate() registers devices in node order, placing
isp@acaf000 before phy@ac65000..phy@ac68000 also causes camss_probe() ->
camss_init_subdevices() -> msm_csiphy_subdev_init() to run before the
PHY providers are registered when built-in, hitting -EPROBE_DEFER from
devm_phy_get_by_of_node() and logging a spurious dev_err("csiphy %d init
fail\n"). In addition, status = "disabled" in camss and
csiphy0..csiphy3 should sit after the standard device properties (before
child nodes), and the reg addresses in these nodes should be zero-padded
to 8 hex digits (such as 0x0ac4a000) to match surrounding /soc@0 nodes.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261106-sm8150-v7.4-rc1-camss-v3-0-0103e8a0bbcd@andrewgigena.dev?part=7
prev parent reply other threads:[~2026-11-06 18:59 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-06 18:35 [PATCH v3 0/7] media: qcom: camss: Add SM8150 CAMSS support Andrew Gigena via B4 Relay
2026-11-06 18:35 ` [PATCH v3 1/7] dt-bindings: i2c: qcom-cci: Document SM8150 compatible Andrew Gigena via B4 Relay
2026-11-06 21:26 ` Vladimir Zapolskiy
2026-11-07 14:14 ` Wolfram Sang
2026-11-06 18:35 ` [PATCH v3 2/7] dt-bindings: media: qcom,sm8150-camss: Add SM8150 CAMSS Andrew Gigena via B4 Relay
2026-11-06 21:38 ` Vladimir Zapolskiy
2026-11-10 23:46 ` Andrew Gigena
2026-11-09 10:44 ` Krzysztof Kozlowski
2026-11-10 15:43 ` Andrew Gigena
2026-11-06 18:35 ` [PATCH v3 3/7] dt-bindings: phy: qcom,sm8150-csi2-phy: Add SM8150 CSI2 PHY Andrew Gigena via B4 Relay
2026-11-06 21:24 ` Vladimir Zapolskiy
2026-11-10 23:52 ` Andrew Gigena
2026-11-06 22:32 ` Bryan O'Donoghue
2026-11-06 18:35 ` [PATCH v3 4/7] media: qcom: camss: Match VFE lite clocks by name prefix Andrew Gigena via B4 Relay
2026-11-06 18:49 ` sashiko-bot
2026-11-06 22:34 ` Bryan O'Donoghue
2026-11-06 18:35 ` [PATCH v3 5/7] media: qcom: camss: Add support for SM8150 Andrew Gigena via B4 Relay
2026-11-06 18:53 ` sashiko-bot
2026-11-06 21:50 ` Vladimir Zapolskiy
2026-11-11 1:27 ` Andrew Gigena
2026-11-06 22:35 ` Bryan O'Donoghue
2026-11-06 18:35 ` [PATCH v3 6/7] phy: qcom-mipi-csi2: Add SM8150 CSI2 DPHY support Andrew Gigena via B4 Relay
2026-11-06 18:50 ` sashiko-bot
2026-11-06 22:29 ` Bryan O'Donoghue
2026-11-07 14:03 ` Bryan O'Donoghue
2026-11-10 23:56 ` Andrew Gigena
2026-11-06 18:35 ` [PATCH v3 7/7] arm64: dts: qcom: sm8150: Add CAMSS and CCI nodes Andrew Gigena via B4 Relay
2026-11-06 18:59 ` sashiko-bot [this message]
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