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From: sashiko-bot@kernel.org
To: "Jisheng Zhang" <jszhang@kernel.org>
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH 2/3] spi: cadence-xspi: Support dmaengine for sdma io copy
Date: Sat, 07 Nov 2026 07:51:31 +0000	[thread overview]
Message-ID: <sashiko-outbox-202729@kernel.org> (raw)
In-Reply-To: <20261107072044.17574-3-jszhang@kernel.org>

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] spi: cadence-xspi: unreleased DMA channel on fallback in
  cdns_xspi_dma_init()
--

commit a84278759465bccce36b68c10064eeefdfafaa8b
Author: Jisheng Zhang <jszhang@kernel.org>

spi: cadence-xspi: Support dmaengine for sdma io copy

This commit adds dmaengine memcpy support for SDMA I/O transfers in the
Cadence xSPI controller driver, falling back to CPU transfers when DMA is
unavailable.

> diff --git a/drivers/spi/spi-cadence-xspi.c b/drivers/spi/spi-cadence-xspi.c
> index 3687853e4ce4e..d9996ec42edda 100644
> --- a/drivers/spi/spi-cadence-xspi.c
> +++ b/drivers/spi/spi-cadence-xspi.c

[ ... ]

> @@ -355,6 +363,122 @@ struct cdns_xspi_dev {
>  	int current_xfer_qword;
>  };
>  
> +static void cdns_xspi_dma_cleanup(void *data)
> +{
> +	struct cdns_xspi_dev *cdns_xspi = data;
> +
> +	dma_unmap_resource(dmaengine_get_dma_device(cdns_xspi->dma_chan),
> +			   cdns_xspi->dma_addr, cdns_xspi->sdmasize,
> +			   DMA_BIDIRECTIONAL, 0);
> +}
> +
> +static int cdns_xspi_dma_init(struct cdns_xspi_dev *cdns_xspi,
> +			      phys_addr_t sdma_phys)
> +{
> +	struct device *dev = cdns_xspi->dev;
> +	struct dma_chan *chan;
> +	struct device *dma_dev;
> +	dma_addr_t dma_addr;
> +
> +	/* The Marvell overlay has additional SDMA access-width restrictions. */
> +	if (cdns_xspi->driver_data->mrvl_hw_overlay)
> +		return 0;
> +
> +	chan = devm_dma_request_chan(dev, "memcpy");
> +	if (IS_ERR(chan)) {
> +		if (PTR_ERR(chan) == -EPROBE_DEFER)
> +			return -EPROBE_DEFER;
> +		dev_dbg(dev, "DMA unavailable, using CPU transfers\n");
> +		return 0;
> +	}
> +	if (!dma_has_cap(DMA_MEMCPY, chan->device->cap_mask)) {
> +		dev_dbg(dev, "DMA channel does not support memcpy, using CPU transfers\n");
> +		return 0;
> +	}
> +
> +	/* Map the aperture once; only the RAM buffer changes between transfers. */
> +	dma_dev = dmaengine_get_dma_device(chan);
> +	dma_addr = dma_map_resource(dma_dev, sdma_phys, cdns_xspi->sdmasize,
> +				    DMA_BIDIRECTIONAL, 0);
> +	if (dma_mapping_error(dma_dev, dma_addr)) {
> +		dev_dbg(dev, "Failed to map SDMA aperture, using CPU transfers\n");
> +		return 0;
> +	}

[Severity: Medium]
Does cdns_xspi_dma_init() leave chan allocated if the DMA_MEMCPY check or
dma_map_resource() fails?  Since cdns_xspi_dma_init() returns 0 to fall
back to CPU transfers, cdns_xspi_probe() succeeds and devres keeps the
unused DMA channel exclusively claimed for the lifetime of the bound
device.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261107072044.17574-1-jszhang@kernel.org?part=2

  reply	other threads:[~2026-11-07  7:51 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-07  7:20 [PATCH 0/3] spi: cadence-xspi: add DMA support Jisheng Zhang
2026-11-07  7:20 ` [PATCH 1/3] spi: dt-bindings: cdns,xspi: Add DMA properties Jisheng Zhang
2026-11-07  8:01   ` sashiko-bot
2026-11-07  7:20 ` [PATCH 2/3] spi: cadence-xspi: Support dmaengine for sdma io copy Jisheng Zhang
2026-11-07  7:51   ` sashiko-bot [this message]
2026-11-07  7:20 ` [PATCH 3/3] spi: cadence-xspi: Use writel_relaxed() for cmd regs Jisheng Zhang

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