Re: [PATCHv2 2/4] dt-bindings: edac: altera: agilex5: document new edac support

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] dt-bindings: edac: altr,socfpga-ecc-manager piles on Agilex5
  conditionals
--

commit 5ff2b28fe8d1c4bf87126e0c3c295e7d764f432e
Author: Dinh Nguyen <dinguyen@kernel.org>

dt-bindings: edac: altera: agilex5: document new edac support

This commit documents Agilex5 EDAC support in the Altera SoCFPGA ECC
Manager binding, adding the altr,socfpga-agilex5-ecc-manager compatible
along with up to 7 named interrupts and per-compatible schema constraints.

> diff --git a/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml b/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml
> index 136e8fccd429a..16940b49471cd 100644
> --- a/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml
> +++ b/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml
> @@ -20,7 +20,9 @@ properties:
>    compatible:
>      oneOf:
>        - items:
> -          - const: altr,socfpga-s10-ecc-manager
> +          - enum:
> +              - altr,socfpga-s10-ecc-manager
> +              - altr,socfpga-agilex5-ecc-manager
>            - const: altr,socfpga-a10-ecc-manager
>        - const: altr,socfpga-a10-ecc-manager
>        - const: altr,socfpga-ecc-manager
> @@ -33,7 +35,25 @@ properties:
>  
>    interrupts:
>      minItems: 1
> -    maxItems: 2
> +    items:
> +      - description: Global single-bit error
> +      - description: Global double-bit error
> +      - description: IO96B0 DRAM controller error
> +      - description: IO96B1 DRAM controller error
> +      - description: SDM QSPI single-bit error
> +      - description: SDM QSPI double-bit error
> +      - description: SDM single-event
> +
> +  interrupt-names:
> +    minItems: 1
> +    items:
> +      - const: global_sbe
> +      - const: global_dbe
> +      - const: io96b0
> +      - const: io96b1
> +      - const: sdm_qspi_sbe
> +      - const: sdm_qspi_dbe
> +      - const: sdm_seu
>  
>    interrupt-controller: true
>  
> @@ -235,28 +255,45 @@ patternProperties:
>        - interrupts
>        - altr,ecc-parent
>  
> -if:
> -  properties:
> -    compatible:
> -      contains:
> -        const: altr,socfpga-ecc-manager
> -then:
> -  required:
> -    - compatible
> -    - "#address-cells"
> -    - "#size-cells"
> -    - ranges
> -
> -else:
> -  required:
> -    - compatible
> -    - "#address-cells"
> -    - "#size-cells"
> -    - interrupts
> -    - interrupt-controller
> -    - "#interrupt-cells"
> -    - ranges
> -    - altr,sysmgr-syscon
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: altr,socfpga-ecc-manager
> +    then:
> +      required:
> +        - compatible
> +        - "#address-cells"
> +        - "#size-cells"
> +        - ranges
> +
> +    else:
> +      required:
> +        - compatible
> +        - "#address-cells"
> +        - "#size-cells"
> +        - interrupts
> +        - interrupt-controller
> +        - "#interrupt-cells"
> +        - ranges
> +        - altr,sysmgr-syscon
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: altr,socfpga-agilex5-ecc-manager
> +    then:
> +      properties:
> +        interrupts:
> +          maxItems: 7
> +      required:
> +        - interrupt-names
> +    else:
> +      properties:
> +        interrupts:
> +          maxItems: 2

[Severity: Low]
Should Agilex5 (or the newer SoCFPGA generations) be split into a
separate schema document instead of piling on another per-compatible
if/then/else block under allOf?

This schema already spans multiple generations with different property
requirements, and Agilex5 introduces a distinct 7-interrupt layout
combining aggregate IRQ-domain interrupts with direct GIC interrupts.
Also, in the new allOf entry, the else branch only restricts interrupts
to maxItems: 2 while leaving the 7 Agilex5-specific interrupt-names
unconstrained on older platforms, and maxItems: 7 in the then branch is
redundant with the 7-entry items list at the top level.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261109162523.1698129-2-dinguyen@kernel.org?part=1