Re: [PATCH v2 3/3] i2c: mt7621: add support for Airoha AN7589

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] i2c: mt7621: unsigned underflow in mtk_i2c_init() divider
  clamp()
--

commit 36029923d9708d51405f55c0dcd224ddc5b82105
Author: John Crispin <john@phrozen.org>

i2c: mt7621: add support for Airoha AN7589

This commit adds match data to i2c-mt7621 to support the Airoha AN7589
variant, which uses an extended 16-bit clock divider in SM0CTL2 and
disables SCL stretching.

> diff --git a/drivers/i2c/busses/i2c-mt7621.c b/drivers/i2c/busses/i2c-mt7621.c
> index 7a31cc8b89ce0..4a6504df0bc18 100644
> --- a/drivers/i2c/busses/i2c-mt7621.c
> +++ b/drivers/i2c/busses/i2c-mt7621.c
[ ... ]
> @@ -262,11 +296,16 @@ MODULE_DEVICE_TABLE(of, i2c_mtk_dt_ids);
>  
>  static void mtk_i2c_init(struct mtk_i2c *i2c)
>  {
> -	i2c->clk_div = clk_get_rate(i2c->clk) / i2c->bus_freq - 1;
> -	if (i2c->clk_div < 99)
> -		i2c->clk_div = 99;
> -	if (i2c->clk_div > SM0CTL0_CLK_DIV_MAX)
> -		i2c->clk_div = SM0CTL0_CLK_DIV_MAX;
> +	unsigned long rate = clk_get_rate(i2c->clk);
> +	unsigned long div_min = 99;
> +	unsigned long div_max = SM0CTL0_CLK_DIV_MAX;
> +
> +	if (i2c->soc->ext_clk_div) {
> +		div_min = rate / I2C_MAX_FAST_MODE_PLUS_FREQ - 1;
> +		div_max = FIELD_MAX(SM0CTL2_CLK_DIV_EXT);
> +	}
> +
> +	i2c->clk_div = clamp(rate / i2c->bus_freq - 1, div_min, div_max);

[Severity: Medium]
Can div_min and rate / i2c->bus_freq - 1 underflow unsigned long here?

When CONFIG_HAVE_CLK is disabled (which is reachable via COMPILE_TEST),
clk_get_rate() returns 0, so div_min folds to ULONG_MAX while div_max is
0xffff.  That trips the BUILD_BUG_ON_MSG(statically_true(ulo > uhi)) check
inside clamp().

At runtime, if rate is smaller than I2C_MAX_FAST_MODE_PLUS_FREQ or
i2c->bus_freq, the unsigned subtraction also wraps to ULONG_MAX and
clamps i2c->clk_div to div_max instead of the minimum divider.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261112185820.1315718-1-john@phrozen.org?part=3