From: 陈华才 <chenhc@lemote.com>
To: "Jiaxun Yang" <jiaxun.yang@flygoat.com>,
linux-mips <linux-mips@vger.kernel.org>
Cc: "paul.burton" <paul.burton@mips.com>, tglx <tglx@linutronix.de>,
jason <jason@lakedaemon.net>, maz <maz@kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
robh+dt <robh+dt@kernel.org>,
"mark.rutland" <mark.rutland@arm.co>,
devicetree <devicetree@vger.kernel.org>,
"Huacai Chen" <chenhuacai@gmail.com>
Subject: Re:[PATCH v1 12/18] dt-bindings: mips: Add loongson cpus & boards
Date: Wed, 4 Sep 2019 11:46:33 +0800 [thread overview]
Message-ID: <tencent_2F3E488B13DC603F284772DC@qq.com> (raw)
In-Reply-To: <20190830043232.20191-7-jiaxun.yang@flygoat.com>
Hi, Jiaxun,
Please don't use "ls3b-780e-1way", in other words, please use "ls3b1000-780e-1way", "ls3b1500-780e-1way", etc.
Huacai
---
.../bindings/mips/loongson/cpus.yaml | 38 +++++++++++
.../bindings/mips/loongson/devices.yaml | 64 +++++++++++++++++++
2 files changed, 102 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mips/loongson/cpus.yaml
create mode 100644 Documentation/devicetree/bindings/mips/loongson/devices.yaml
diff --git a/Documentation/devicetree/bindings/mips/loongson/cpus.yaml b/Documentation/devicetree/bindings/mips/loongson/cpus.yaml
new file mode 100644
index 000000000000..dc6dd5114d5e
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/loongson/cpus.yaml
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mips/loongson/cpus.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Loongson CPUs bindings
+
+maintainers:
+ - Jiaxun Yang <jiaxun.yang@flygoat.com>
+
+description: |+
+ The device tree allows to describe the layout of CPUs in a system through
+ the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
+ defining properties for every cpu.
+
+ Bindings for CPU nodes follow the Devicetree Specification, available from:
+
+ https://www.devicetree.org/specifications/
+
+properties:
+ reg:
+ maxItems: 1
+ description: |
+ Physical ID of a CPU, Can be read from CP0 EBase.CPUNum.
+
+ compatible:
+ enum:
+ - loongson,gs464
+ - loongson,gs464e
+ - loongson,gs264
+ - loongson,gs464v
+
+required:
+ - device_type
+ - reg
+ - compatible
+...
diff --git a/Documentation/devicetree/bindings/mips/loongson/devices.yaml b/Documentation/devicetree/bindings/mips/loongson/devices.yaml
new file mode 100644
index 000000000000..aa6c42013d2c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/loongson/devices.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mips/loongson/devices.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Loongson based Platforms Device Tree Bindings
+
+maintainers:
+ - Jiaxun Yang <jiaxun.yang@flygoat.com>
+description: |
+ Devices with a Loongson CPU shall have the following properties.
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+
+ - description: Loongson 3A1000 + RS780E 1Way
+ items:
+ - const: loongson,ls3a1000-780e-1way
+
+ - description: Loongson 3A1000 + RS780E 2Way
+ items:
+ - const: loongson,ls3a1000-780e-2way
+
+ - description: Loongson 3A1000 + RS780E 4Way
+ items:
+ - const: loongson,ls3a1000-780e-4way
+
+ - description: Loongson 3B1000/1500 + RS780E 1Way
+ items:
+ - const: loongson,ls3b-780e-1way
+
+ - description: Loongson 3B1000/1500 + RS780E 2Way
+ items:
+ - const: loongson,ls3b-780e-2way
+
+ - description: Loongson 3A2000 + RS780E 1Way
+ items:
+ - const: loongson,ls3a2000-780e-1way
+
+ - description: Loongson 3A2000 + RS780E 2Way
+ items:
+ - const: loongson,ls3a2000-780e-2way
+
+ - description: Loongson 3A2000 + RS780E 4Way
+ items:
+ - const: loongson,ls3a2000-780e-4way
+
+ - description: Loongson 3A3000 + RS780E 1Way
+ items:
+ - const: loongson,ls3a3000-780e-1way
+
+ - description: Loongson 3A3000 + RS780E 2Way
+ items:
+ - const: loongson,ls3a3000-780e-2way
+
+ - description: Loongson 3A3000 + RS780E 4Way
+ items:
+ - const: loongson,ls3a3000-780e-4way
+
+...
--
2.22.0
next prev parent reply other threads:[~2019-09-04 3:46 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-30 4:32 [PATCH v1 06/18] dt-bindings: interrupt-controller: Add Loongson-3 IOINTC Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 07/18] irqchip: Add driver for Loongson-3 HyperTransport interrupt controller Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 08/18] dt-bindings: interrupt-controller: Add Loongson-3 HTINTC Jiaxun Yang
2019-09-02 13:39 ` Rob Herring
2019-08-30 4:32 ` [PATCH v1 09/18] irqchip: i8259: Add plat-poll support Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 10/18] irqchip: mips-cpu: Convert to simple domain Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 11/18] MIPS: Loongson64: Drop legacy IRQ code Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 12/18] dt-bindings: mips: Add loongson cpus & boards Jiaxun Yang
2019-09-04 3:46 ` 陈华才 [this message]
2019-09-13 14:36 ` Rob Herring
2019-08-30 4:32 ` [PATCH v1 13/18] dt-bindings: Document loongson vendor-prefix Jiaxun Yang
2019-09-02 13:39 ` Rob Herring
2019-08-30 4:32 ` [PATCH v1 14/18] MIPS: Loongson64: Add generic dts Jiaxun Yang
2019-09-04 3:44 ` 陈华才
2019-09-04 6:08 ` [PATCH " Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 15/18] MIPS: Loongson64: Load built-in dtbs Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 16/18] MIPS: Loongson: Regenerate defconfigs Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 17/18] MAINTAINERS: Add new pathes to LOONGSON64 ARCHITECTURE Jiaxun Yang
2019-08-30 4:32 ` [PATCH v1 18/18] MAINTAINERS: Add myself as maintainer of LOONGSON64 Jiaxun Yang
2019-09-02 13:38 ` [PATCH v1 06/18] dt-bindings: interrupt-controller: Add Loongson-3 IOINTC Rob Herring
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