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([2a01:e0a:e17:9700:16d2:7456:6634:9626]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-447f78aea59sm21045525e9.25.2025.05.20.01.19.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 20 May 2025 01:19:48 -0700 (PDT) Message-ID: <126762fc-17ca-4e9d-94d0-3aed1ae321ff@rivosinc.com> Date: Tue, 20 May 2025 10:19:47 +0200 Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 09/14] riscv: misaligned: move emulated access uniformity check in a function To: Charlie Jenkins Cc: Paul Walmsley , Palmer Dabbelt , Anup Patel , Atish Patra , Shuah Khan , Jonathan Corbet , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, Samuel Holland , Andrew Jones , Deepak Gupta References: <20250515082217.433227-1-cleger@rivosinc.com> <20250515082217.433227-10-cleger@rivosinc.com> Content-Language: en-US From: =?UTF-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 20/05/2025 01:32, Charlie Jenkins wrote: > On Thu, May 15, 2025 at 10:22:10AM +0200, Clément Léger wrote: >> Split the code that check for the uniformity of misaligned accesses >> performance on all cpus from check_unaligned_access_emulated_all_cpus() >> to its own function which will be used for delegation check. No >> functional changes intended. >> >> Signed-off-by: Clément Léger >> Reviewed-by: Andrew Jones >> --- >> arch/riscv/kernel/traps_misaligned.c | 20 ++++++++++++++------ >> 1 file changed, 14 insertions(+), 6 deletions(-) >> >> diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c >> index e551ba17f557..287ec37021c8 100644 >> --- a/arch/riscv/kernel/traps_misaligned.c >> +++ b/arch/riscv/kernel/traps_misaligned.c >> @@ -647,6 +647,18 @@ bool __init check_vector_unaligned_access_emulated_all_cpus(void) >> } >> #endif >> >> +static bool all_cpus_unaligned_scalar_access_emulated(void) >> +{ >> + int cpu; >> + >> + for_each_online_cpu(cpu) >> + if (per_cpu(misaligned_access_speed, cpu) != > > misaligned_access_speed is only defined when > CONFIG_RISCV_SCALAR_MISALIGNED. This function should return false when > !CONFIG_RISCV_SCALAR_MISALIGNED and only use this logic otherwise. Hi Charlie, misaligned_access_speed is defined in unaligned_access_speed.c which is compiled based on CONFIG_RISCV_MISALIGNED (ditto for trap_misaligned.c) obj-$(CONFIG_RISCV_MISALIGNED) += unaligned_access_speed.o However, the declaration for it in the header cpu-feature.h however is under a CONFIG_RISCV_SCALAR_MISALIGNED ifdef. So either the declaration or the definition is wrong but the ifdefery soup makes it quite difficult to understand what's going on. I would suggest to move the DECLARE_PER_CPU under CONFIG_RISCV_MISALIGNED so that it reduces ifdef in traps_misaligned as well. Thanks, Clément > > - Charlie > >> + RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED) >> + return false; >> + >> + return true; >> +} >> + >> #ifdef CONFIG_RISCV_SCALAR_MISALIGNED >> >> static bool unaligned_ctl __read_mostly; >> @@ -685,8 +697,6 @@ static int cpu_online_check_unaligned_access_emulated(unsigned int cpu) >> >> bool __init check_unaligned_access_emulated_all_cpus(void) >> { >> - int cpu; >> - >> /* >> * We can only support PR_UNALIGN controls if all CPUs have misaligned >> * accesses emulated since tasks requesting such control can run on any >> @@ -694,10 +704,8 @@ bool __init check_unaligned_access_emulated_all_cpus(void) >> */ >> on_each_cpu(check_unaligned_access_emulated, NULL, 1); >> >> - for_each_online_cpu(cpu) >> - if (per_cpu(misaligned_access_speed, cpu) >> - != RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED) >> - return false; >> + if (!all_cpus_unaligned_scalar_access_emulated()) >> + return false; >> >> unaligned_ctl = true; >> return true; >> -- >> 2.49.0 >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv