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From: "Andy Lutomirski" <luto@kernel.org>
To: "H. Peter Anvin" <hpa@zytor.com>,
	"Sohil Mehta" <sohil.mehta@intel.com>,
	"the arch/x86 maintainers" <x86@kernel.org>,
	"Dave Hansen" <dave.hansen@linux.intel.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>,
	"Borislav Petkov" <bp@alien8.de>
Cc: "Jonathan Corbet" <corbet@lwn.net>,
	"Josh Poimboeuf" <jpoimboe@kernel.org>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	"Ard Biesheuvel" <ardb@kernel.org>,
	"Kirill A . Shutemov" <kas@kernel.org>, "Xin Li" <xin@zytor.com>,
	"David Woodhouse" <dwmw@amazon.co.uk>,
	"Sean Christopherson" <seanjc@google.com>,
	"Rick P Edgecombe" <rick.p.edgecombe@intel.com>,
	"Vegard Nossum" <vegard.nossum@oracle.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Randy Dunlap" <rdunlap@infradead.org>,
	"Geert Uytterhoeven" <geert@linux-m68k.org>,
	"Kees Cook" <kees@kernel.org>, "Tony Luck" <tony.luck@intel.com>,
	"Alexander Shishkin" <alexander.shishkin@linux.intel.com>,
	linux-doc@vger.kernel.org,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	linux-efi@vger.kernel.org
Subject: Re: [PATCH v11 9/9] x86/cpu: Enable LASS by default during CPU initialization
Date: Thu, 30 Oct 2025 08:45:34 -0700	[thread overview]
Message-ID: <13681100-ddc3-4ef0-bd13-744282324ff1@app.fastmail.com> (raw)
In-Reply-To: <789ADBB5-F7AC-4B08-B343-F23260FB8FBC@zytor.com>



On Thu, Oct 30, 2025, at 1:40 AM, H. Peter Anvin wrote:
> On October 29, 2025 2:03:10 PM PDT, Sohil Mehta <sohil.mehta@intel.com> wrote:
>>Linear Address Space Separation (LASS) mitigates a class of side-channel
>>attacks that rely on speculative access across the user/kernel boundary.
>>
>>Enable LASS by default if the platform supports it. While at it, remove
>>the comment above the SMAP/SMEP/UMIP/LASS setup instead of updating it,
>>as the whole sequence is quite self-explanatory.
>>
>>The legacy vsyscall page is mapped at 0xffffffffff60?000. Prior to LASS,
>>vsyscall page accesses would always generate a #PF. The kernel emulates
>>the accesses in the #PF handler and returns the appropriate values to
>>userspace.
>>
>>With LASS, these accesses are intercepted before the paging structures
>>are traversed triggering a #GP instead of a #PF. To avoid breaking user
>>applications, equivalent emulation support is required in the #GP
>>handler. However, the #GP provides limited error information compared to
>>the #PF, making the emulation more complex.
>>
>>For now, keep it simple and disable LASS if vsyscall emulation is
>>compiled in. This restricts LASS usability to newer environments where
>>legacy vsyscalls are absolutely not needed. In future, LASS support can
>>be expanded by enhancing the #GP handler.
>>
>>Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
>>---
>>v11:
>> - Disable LASS if vsyscall emulation support is compiled in.
>> - Drop Rick's review tag because of the new changes.
>>
>>v10
>> - No change.
>>---
>> arch/x86/kernel/cpu/common.c | 21 ++++++++++++++++++++-
>> 1 file changed, 20 insertions(+), 1 deletion(-)
>>
>>diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
>>index c7d3512914ca..71e89859dfb4 100644
>>--- a/arch/x86/kernel/cpu/common.c
>>+++ b/arch/x86/kernel/cpu/common.c
>>@@ -401,6 +401,25 @@ static __always_inline void setup_umip(struct cpuinfo_x86 *c)
>> 	cr4_clear_bits(X86_CR4_UMIP);
>> }
>> 
>>+static __always_inline void setup_lass(struct cpuinfo_x86 *c)
>>+{
>>+	if (cpu_feature_enabled(X86_FEATURE_LASS)) {
>>+		/*
>>+		 * Legacy vsyscall page access causes a #GP when LASS is
>>+		 * active. However, vsyscall emulation isn't supported
>>+		 * with #GP. To avoid breaking userspace, disable LASS
>>+		 * if the emulation code is compiled in.
>>+		 */
>>+		if (IS_ENABLED(CONFIG_X86_VSYSCALL_EMULATION)) {
>>+			pr_info_once("x86/cpu: Disabling LASS due to CONFIG_X86_VSYSCALL_EMULATION=y\n");
>>+			setup_clear_cpu_cap(X86_FEATURE_LASS);
>>+			return;
>>+		}
>>+
>>+		cr4_set_bits(X86_CR4_LASS);
>>+	}
>>+}
>>+
>> /* These bits should not change their value after CPU init is finished. */
>> static const unsigned long cr4_pinned_mask = X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP |
>> 					     X86_CR4_FSGSBASE | X86_CR4_CET | X86_CR4_FRED;
>>@@ -2011,10 +2030,10 @@ static void identify_cpu(struct cpuinfo_x86 *c)
>> 	/* Disable the PN if appropriate */
>> 	squash_the_stupid_serial_number(c);
>> 
>>-	/* Set up SMEP/SMAP/UMIP */
>> 	setup_smep(c);
>> 	setup_smap(c);
>> 	setup_umip(c);
>>+	setup_lass(c);
>> 
>> 	/* Enable FSGSBASE instructions if available. */
>> 	if (cpu_has(c, X86_FEATURE_FSGSBASE)) {
>
> Legacy vsyscalls have been obsolete for how long now?


A looooong time.

I would suggest defaulting LASS to on and *maybe* decoding just enough to log, once per boot, that a legacy vsyscall may have been attempted. It’s too bad that #GP doesn’t report the faulting address.

—Andy

  reply	other threads:[~2025-10-30 15:45 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-29 21:03 [PATCH v11 0/9] x86: Enable Linear Address Space Separation support Sohil Mehta
2025-10-29 21:03 ` [PATCH v11 1/9] x86/cpufeatures: Enumerate the LASS feature bits Sohil Mehta
2025-10-31 17:03   ` Dave Hansen
2025-10-29 21:03 ` [PATCH v11 2/9] x86/cpu: Add an LASS dependency on SMAP Sohil Mehta
2025-10-31 17:04   ` Dave Hansen
2025-10-29 21:03 ` [PATCH v11 3/9] x86/asm: Introduce inline memcpy and memset Sohil Mehta
2025-10-31 17:06   ` Dave Hansen
2025-10-29 21:03 ` [PATCH v11 4/9] x86/alternatives: Disable LASS when patching kernel code Sohil Mehta
2025-10-31 17:10   ` Dave Hansen
2025-11-10 18:15   ` Sohil Mehta
2025-11-10 19:09     ` H. Peter Anvin
2025-11-10 19:24     ` Borislav Petkov
2025-11-12 13:56     ` Ard Biesheuvel
2025-11-12 14:51       ` Dave Hansen
2025-11-12 14:57         ` H. Peter Anvin
2025-11-12 15:18           ` Ard Biesheuvel
2025-11-12 15:23             ` H. Peter Anvin
2025-11-12 15:28               ` Ard Biesheuvel
2025-11-12 15:47                 ` H. Peter Anvin
2025-11-12 16:18                 ` Sohil Mehta
2025-11-12 16:26                   ` H. Peter Anvin
2025-11-12 16:29                   ` H. Peter Anvin
2025-10-29 21:03 ` [PATCH v11 5/9] x86/efi: Disable LASS while mapping the EFI runtime services Sohil Mehta
2025-10-31 17:11   ` Dave Hansen
2025-10-31 17:38     ` Andy Lutomirski
2025-10-31 17:41       ` Dave Hansen
2025-10-31 18:03         ` Sohil Mehta
2025-10-31 18:12           ` Dave Hansen
2025-11-07  9:04             ` Peter Zijlstra
2025-11-07  9:22               ` Ard Biesheuvel
2025-11-07  9:27                 ` H. Peter Anvin
2025-11-07  9:35                   ` Ard Biesheuvel
2025-11-07  9:40                 ` Peter Zijlstra
2025-11-07 10:09                   ` Ard Biesheuvel
2025-11-07 10:27                     ` Peter Zijlstra
2025-11-08  0:48                     ` Andy Lutomirski
2025-11-08 16:18                       ` H. Peter Anvin
2025-11-08 22:50                       ` H. Peter Anvin
2025-11-07 10:10                 ` Peter Zijlstra
2025-11-07 10:17                   ` Ard Biesheuvel
2025-10-31 19:04       ` Sohil Mehta
2025-11-07  7:36         ` Sohil Mehta
2025-10-31 18:32     ` Sohil Mehta
2025-10-29 21:03 ` [PATCH v11 6/9] x86/kexec: Disable LASS during relocate kernel Sohil Mehta
2025-10-31 17:14   ` Dave Hansen
2025-10-29 21:03 ` [PATCH v11 7/9] x86/traps: Communicate a LASS violation in #GP message Sohil Mehta
2025-10-31 17:16   ` Dave Hansen
2025-10-31 19:59     ` Sohil Mehta
2025-10-31 20:03       ` Andy Lutomirski
2025-10-31 20:56       ` Dave Hansen
2025-10-29 21:03 ` [PATCH v11 8/9] selftests/x86: Update the negative vsyscall tests to expect a #GP Sohil Mehta
2025-10-31 17:20   ` Dave Hansen
2025-10-29 21:03 ` [PATCH v11 9/9] x86/cpu: Enable LASS by default during CPU initialization Sohil Mehta
2025-10-30  8:40   ` H. Peter Anvin
2025-10-30 15:45     ` Andy Lutomirski [this message]
2025-10-30 16:44       ` Sohil Mehta
2025-10-30 16:53         ` Andy Lutomirski
2025-10-30 17:24           ` Sohil Mehta
2025-10-30 17:31             ` Andy Lutomirski
2025-10-30 21:13         ` David Laight
2025-10-31  6:41           ` H. Peter Anvin
2025-10-31 16:55           ` Dave Hansen
2025-10-30 16:27     ` Dave Hansen
2025-11-07  8:01       ` H. Peter Anvin
2025-11-07 20:08         ` Sohil Mehta
2025-10-31 17:21   ` Dave Hansen
2025-10-31 20:04     ` Sohil Mehta

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