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Fri, 5 Jul 2019 09:12:56 +0000 From: Ganapatrao Kulkarni To: "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" CC: "Will.Deacon@arm.com" , "mark.rutland@arm.com" , "corbet@lwn.net" , "Jayachandran Chandrasekharan Nair" , "rrichter@marvell.coma" , Jan Glauber , "gklkml16@gmail.com" Subject: [PATCH v2 1/2] Documentation: perf: Update documentation for ThunderX2 PMU uncore driver Thread-Topic: [PATCH v2 1/2] Documentation: perf: Update documentation for ThunderX2 PMU uncore driver Thread-Index: AQHVMxHVvOrB1kmigkmS21Hupx9VJQ== Date: Fri, 5 Jul 2019 09:12:56 +0000 Message-ID: <1562317967-16329-2-git-send-email-gkulkarni@marvell.com> References: <1562317967-16329-1-git-send-email-gkulkarni@marvell.com> In-Reply-To: <1562317967-16329-1-git-send-email-gkulkarni@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BYAPR05CA0067.namprd05.prod.outlook.com (2603:10b6:a03:74::44) To MWHPR1801MB2030.namprd18.prod.outlook.com (2603:10b6:301:69::31) x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 1.8.3.1 x-originating-ip: [199.233.59.128] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 22f3a508-f177-4cdb-b2ac-08d70128f77f x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(2017052603328)(7193020);SRVR:MWHPR1801MB1982; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 22f3a508-f177-4cdb-b2ac-08d70128f77f X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Jul 2019 09:12:56.1583 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: gkulkarni@marvell.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR1801MB1982 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-07-05_04:,, signatures=0 Sender: linux-doc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-doc@vger.kernel.org Add documentation for Cavium Coherent Processor Interconnect (CCPI2) PMU. Signed-off-by: Ganapatrao Kulkarni --- Documentation/perf/thunderx2-pmu.txt | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/Documentation/perf/thunderx2-pmu.txt b/Documentation/perf/thun= derx2-pmu.txt index dffc57143736..01315b3d4ad9 100644 --- a/Documentation/perf/thunderx2-pmu.txt +++ b/Documentation/perf/thunderx2-pmu.txt @@ -2,24 +2,26 @@ Cavium ThunderX2 SoC Performance Monitoring Unit (PMU UNC= ORE) =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 The ThunderX2 SoC PMU consists of independent, system-wide, per-socket -PMUs such as the Level 3 Cache (L3C) and DDR4 Memory Controller (DMC). +PMUs such as the Level 3 Cache (L3C), DDR4 Memory Controller (DMC) and +Cavium Coherent Processor Interconnect (CCPI2). =20 The DMC has 8 interleaved channels and the L3C has 16 interleaved tiles. Events are counted for the default channel (i.e. channel 0) and prorated to the total number of channels/tiles. =20 -The DMC and L3C support up to 4 counters. Counters are independently -programmable and can be started and stopped individually. Each counter -can be set to a different event. Counters are 32-bit and do not support -an overflow interrupt; they are read every 2 seconds. +The DMC and L3C support up to 4 counters, while the CCPI2 supports up to 8 +counters. Counters are independently programmable to different events and +can be started and stopped individually. None of the counters support an +overflow interrupt. DMC and L3C counters are 32-bit and read every 2 secon= ds. +The CCPI2 counters are 64-bit and assumed not to overflow in normal operat= ion. =20 PMU UNCORE (perf) driver: =20 The thunderx2_pmu driver registers per-socket perf PMUs for the DMC and -L3C devices. Each PMU can be used to count up to 4 events -simultaneously. The PMUs provide a description of their available events -and configuration options under sysfs, see -/sys/devices/uncore_; S is the socket id. +L3C devices. Each PMU can be used to count up to 4 (DMC/L3C) or up to 8 +(CCPI2) events simultaneously. The PMUs provide a description of their +available events and configuration options under sysfs, see +/sys/devices/uncore_; S is the socket id. =20 The driver does not support sampling, therefore "perf record" will not work. Per-task perf sessions are also not supported. --=20 2.17.1