From: "Moger, Babu" <bmoger@amd.com>
To: Reinette Chatre <reinette.chatre@intel.com>,
Babu Moger <babu.moger@amd.com>,
fenghua.yu@intel.com, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de
Cc: eranian@google.com, dave.hansen@linux.intel.com, x86@kernel.org,
hpa@zytor.com, corbet@lwn.net, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, bagasdotme@gmail.com
Subject: Re: [PATCH v3 02/10] x86/cpufeatures: Add Slow Memory Bandwidth Allocation feature flag
Date: Thu, 25 Aug 2022 17:42:45 -0500 [thread overview]
Message-ID: <1cf62647-20db-646d-ae83-c2ee61f257c7@amd.com> (raw)
In-Reply-To: <2b7e3511-8e69-2e47-0f11-7f1014b38940@intel.com>
On 8/23/2022 5:47 PM, Reinette Chatre wrote:
> Hi Babu,
>
> On 8/22/2022 6:42 AM, Babu Moger wrote:
>> Adds the new AMD feature X86_FEATURE_SMBA. With this feature, the QOS
>> enforcement policies can be applied to external slow memory connected
>> to the host. QOS enforcement is accomplished by assigning a Class Of
>> Service (COS) to a processor and specifying allocations or limits for
>> that COS for each resource to be allocated.
>>
>> This feature is identified by the CPUID Function 8000_0020_EBX_x0.
>>
>> CPUID Fn8000_0020_EBX_x0 AMD Bandwidth Enforcement Feature Identifiers (ECX=0)
>> Bits Field Name Description
>> 2 L3SBE L3 external slow memory bandwidth enforcement
>>
>> Feature description is available in the specification, "AMD64 Technology Platform Quality
>> of Service Extensions, Revision: 1.03 Publication # 56375 Revision: 1.03 Issue Date: February 2022".
>>
>> Link: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.amd.com%2Fen%2Fsupport%2Ftech-docs%2Famd64-technology-platform-quality-service-extensions&data=05%7C01%7Cbabu.moger%40amd.com%7C4385e95126b24de58aec08da85597c88%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637968916632283680%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=dKSxIinxZGybtACbs3%2FVZr4zbeAvXYc%2FezVivq3xjx0%3D&reserved=0
>> Link: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.kernel.org%2Fshow_bug.cgi%3Fid%3D206537&data=05%7C01%7Cbabu.moger%40amd.com%7C4385e95126b24de58aec08da85597c88%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637968916632283680%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=f7MJmrwkBGxq8BuWjNY6Ze9NdzJc6NOkXxNjUZk5c4U%3D&reserved=0
>> Signed-off-by: Babu Moger <babu.moger@amd.com>
>> Reviewed-by: Ingo Molnar <mingo@kernel.org>
>> ---
> resctrl currently supports "memory bandwidth allocation" and this series adds
> "slow memory bandwidth allocation". Could you please provide more detail about
> what the difference is between "MBA" and "SMBA"? It is clear that the implementation
In this case the slow memory means memory attached to CXL device.
> treats them as different resources, but both resources are associated with L3 cache
> domains and (from what I understand) throttling always occurs at the CPU. Can both
> types of memory resources thus be seen as downstream from L3 cache? How can
Yes. that is correct. They are seen as downstream from L3.
> a user know what memory is considered when configuring MBA and what memory is
> considered when configuring SMBA? Additionally, I do find the term "slow" to be
This memory completely transparent to OS with little bit higher latency
that regular main memory.
Yes. I know slow word is bit vague. I am not an expert of CXL. But i see
that word slow is being used to refer the CXL memory to differentiate it
from regular memory.
> vague as a way to distinguish between different memory types. What is the
> definition of "slow"? Would all "slow" memory on the system support SMBA?
Yes. All the slow memory in the system can support SMBA.
Thanks
Babu
>
> Reinette
next prev parent reply other threads:[~2022-08-25 22:43 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-22 13:42 [PATCH v3 00/10] x86/resctrl: Support for AMD QoS new features and bug fix Babu Moger
2022-08-22 13:42 ` [PATCH v3 01/10] x86/resctrl: Fix min_cbm_bits for AMD Babu Moger
2022-08-23 20:56 ` Reinette Chatre
2022-08-24 15:58 ` Moger, Babu
2022-08-22 13:42 ` [PATCH v3 02/10] x86/cpufeatures: Add Slow Memory Bandwidth Allocation feature flag Babu Moger
2022-08-23 22:47 ` Reinette Chatre
2022-08-25 22:42 ` Moger, Babu [this message]
2022-08-26 16:17 ` Reinette Chatre
2022-08-29 23:25 ` Babu Moger
2022-08-30 16:39 ` Reinette Chatre
[not found] ` <3aa991a8-ac08-297d-8328-5380897f6dd9@amd.com>
2022-08-30 22:23 ` Reinette Chatre
2022-08-30 22:28 ` Moger, Babu
2022-08-22 13:43 ` [PATCH v3 03/10] x86/resctrl: Add a new resource type RDT_RESOURCE_SMBA Babu Moger
2022-08-24 17:39 ` Reinette Chatre
2022-08-26 14:59 ` Moger, Babu
2022-08-22 13:43 ` [PATCH v3 04/10] x86/resctrl: Detect and configure Slow Memory Bandwidth allocation Babu Moger
2022-08-23 22:47 ` Reinette Chatre
2022-08-24 16:48 ` Moger, Babu
2022-08-22 13:43 ` [PATCH v3 05/10] x86/cpufeatures: Add Bandwidth Monitoring Event Configuration feature flag Babu Moger
2022-08-22 13:43 ` [PATCH v3 06/10] x86/resctrl: Introduce mon_configurable to detect Bandwidth Monitoring Event Configuration Babu Moger
2022-08-24 21:15 ` Reinette Chatre
2022-08-25 15:11 ` Moger, Babu
2022-08-25 15:56 ` Reinette Chatre
2022-08-25 20:44 ` Moger, Babu
2022-08-25 21:24 ` Reinette Chatre
2022-08-26 14:30 ` Babu Moger
2022-08-22 13:43 ` [PATCH v3 07/10] x86/resctrl: Add sysfs interface files to read/write event configuration Babu Moger
2022-08-24 21:15 ` Reinette Chatre
2022-08-26 16:07 ` Moger, Babu
2022-08-26 16:35 ` Reinette Chatre
2022-08-26 16:57 ` Moger, Babu
2022-08-22 13:44 ` [PATCH v3 08/10] x86/resctrl: Add the sysfs interface to read the " Babu Moger
2022-08-22 13:47 ` Bagas Sanjaya
2022-08-22 13:50 ` Moger, Babu
2022-08-22 13:55 ` Moger, Babu
2022-08-23 1:55 ` Bagas Sanjaya
2022-08-24 21:16 ` Reinette Chatre
2022-08-26 16:49 ` Moger, Babu
2022-08-26 17:34 ` Reinette Chatre
2022-08-26 18:34 ` Moger, Babu
2022-08-22 13:44 ` [PATCH v3 09/10] x86/resctrl: Add sysfs interface to write " Babu Moger
2022-08-24 21:16 ` Reinette Chatre
2022-08-26 18:17 ` Moger, Babu
2022-08-22 13:45 ` [PATCH v3 10/10] Documentation/x86: Update resctrl_ui.rst for new features Babu Moger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1cf62647-20db-646d-ae83-c2ee61f257c7@amd.com \
--to=bmoger@amd.com \
--cc=babu.moger@amd.com \
--cc=bagasdotme@gmail.com \
--cc=bp@alien8.de \
--cc=corbet@lwn.net \
--cc=dave.hansen@linux.intel.com \
--cc=eranian@google.com \
--cc=fenghua.yu@intel.com \
--cc=hpa@zytor.com \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=reinette.chatre@intel.com \
--cc=tglx@linutronix.de \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox