Re: [RFC 4/7] mm: add page consistency checker implementation

Sasha Levin
2026-04-27T18:56:30Z

On Mon, Apr 27, 2026 at 05:40:34PM +0200, David Hildenbrand (Arm) wrote:
>>>>
>>>> For something like a datacenter deployment I'd agree with you - the odds are
>>>> too low to care. For an unsupervised self driving vehicle, where there's no
>>>> human (locally or remotely) available to take over, I'd like the odds to be as
>>>> low as possible :)
>>>
>>> I thought that people usually use special RT OSes (with proven logic etc) for
>>> any safety-related systems. Using Linux on the core safety system sounds ...
>>> scary.
>>
>> RT OSes are indeed the current approach.
>>
>> s/scary/exciting ;)
>
>Not so exciting for the passengers ;)
>
>>
>>> But, I'd expect corruption of other data (user pages? page tables?) a much
>>> bigger problem than page al locator metdata? What am I missing that this here is
>>> -- in context of the bigger problems there -- a thing we particularly care about?
>>
>> You are very correct! The allocator work was fairly standalone, so it was an
>> easy first project to tackle.
>
>But in general, wouldn't we just expect ECC memory to give us an MCE, so we can
>detect what was corrupted and act accordingly?
>
>That's how it usually works: hw detects a memory corruption and injects an MCE.
>We detect that we corrupted memmap state and kill the kernel.
>
>Why does ECC not help here?

It helps, but it's not enough. ECC doesn't detect all errors (For example,
SECDED corrects single-bit, detects double-bit, but triple-bit errors can land
on a different valid codeword).

>> In general, the approach depends on what we're trying to defend from:
>>
>> 1. bugs: an ASI-like MMU enforced "context" system.
>> 2. physics: just like in most other areas - lots of redundancy. For example,
>> consider redundant variables in safety critical code which exists as two
>> copies: var_v1 = value and var_v2 = value XOR mask. When accessing them, read
>> both copies, XOR the second back, compare.
>>
>> There were a few sessions back in LPC about this. Here's the one from Bryan
>> Huntsman which gives a good overview:
>> https://www.youtube.com/watch?v=ie_ClBCed94
>
>Thanks, but I fundamentally don't understand how RAS capabilities interact here?
>We have mm/memory-failure.c for a reason :)

We do, but self driving safety requires way more than the current hardware can
provide.

I'll point you to https://dl.acm.org/doi/10.1145/2775054.2694348 , which
researched these issues in a datacenter environment (so no sun exposure,
temperature controlled, designed to avoid electromagnetic interference).

"We call a fault that generates an error larger than 2 bits in an ECC word an
undetectable-by-SECDED fault. A fault is undetectable-by-SECDED if it affects
more than two bits in any ECC word, and the data written to that location does
not match the value produced by the fault."

[...]

"A Cielo node has 288 DRAM devices, so this translates to 6048, 518, and 57.6
FIT per node for vendors A, B, and C, respectively. This translates to one
undetected error every 0.8 days, every 9.5 days, and every 85 days on a machine
the size of Cielo."

[...]

"Our main conclusion from this data is that SEC-DED ECC is poorly suited to
modern DRAM subsystems. The rate of undetected errors is too high to justify
its use in very large scale systems comprised of thousands of nodes where
fidelity of results is critical."

The passengers you've mentioned before would be excited if they knew how high
the bar is around their safety :)

--
Thanks,
Sasha