From: kbuild test robot <lkp@intel.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: kbuild-all@01.org, bhelgaas@google.com,
lorenzo.pieralisi@arm.com, Joao.Pinto@synopsys.com,
jingoohan1@gmail.com, kishon@ti.com, adouglas@cadence.com,
jesper.nilsson@axis.com, linux-pci@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Subject: Re: [PATCH v3 02/10] PCI: dwc: Add MSI-X callbacks handler
Date: Sat, 9 Jun 2018 21:22:51 +0800 [thread overview]
Message-ID: <201806091903.eKRSYHmZ%fengguang.wu@intel.com> (raw)
In-Reply-To: <299abe22c35db333dca228a48fdb03ecc662e247.1527862777.git.gustavo.pimentel@synopsys.com>
[-- Attachment #1: Type: text/plain, Size: 4095 bytes --]
Hi Gustavo,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on pci/next]
[also build test ERROR on next-20180608]
[cannot apply to v4.17]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Gustavo-Pimentel/Add-MSI-X-support-on-pcitest-tool/20180609-143316
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: xtensa-allyesconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 8.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=8.1.0 make.cross ARCH=xtensa
Note: the linux-review/Gustavo-Pimentel/Add-MSI-X-support-on-pcitest-tool/20180609-143316 HEAD 5d4d302fec65f168479852732f21aa886058d6c2 builds fine.
It only hurts bisectibility.
All errors (new ones prefixed by >>):
>> drivers/pci/dwc/pcie-designware-ep.c:359:16: error: initialization of 'int (*)(struct pci_epc *, u8, enum pci_epc_irq_type, u8)' {aka 'int (*)(struct pci_epc *, unsigned char, enum pci_epc_irq_type, unsigned char)'} from incompatible pointer type 'int (*)(struct pci_epc *, u8, enum pci_epc_irq_type, u16)' {aka 'int (*)(struct pci_epc *, unsigned char, enum pci_epc_irq_type, short unsigned int)'} [-Werror=incompatible-pointer-types]
.raise_irq = dw_pcie_ep_raise_irq,
^~~~~~~~~~~~~~~~~~~~
drivers/pci/dwc/pcie-designware-ep.c:359:16: note: (near initialization for 'epc_ops.raise_irq')
cc1: some warnings being treated as errors
--
>> drivers/pci/dwc/pcie-artpec6.c:450:15: error: initialization of 'int (*)(struct dw_pcie_ep *, u8, enum pci_epc_irq_type, u16)' {aka 'int (*)(struct dw_pcie_ep *, unsigned char, enum pci_epc_irq_type, short unsigned int)'} from incompatible pointer type 'int (*)(struct dw_pcie_ep *, u8, enum pci_epc_irq_type, u8)' {aka 'int (*)(struct dw_pcie_ep *, unsigned char, enum pci_epc_irq_type, unsigned char)'} [-Werror=incompatible-pointer-types]
.raise_irq = artpec6_pcie_raise_irq,
^~~~~~~~~~~~~~~~~~~~~~
drivers/pci/dwc/pcie-artpec6.c:450:15: note: (near initialization for 'pcie_ep_ops.raise_irq')
cc1: some warnings being treated as errors
vim +359 drivers/pci/dwc/pcie-designware-ep.c
f8aed6ec Kishon Vijay Abraham I 2017-03-27 348
f8aed6ec Kishon Vijay Abraham I 2017-03-27 349 static const struct pci_epc_ops epc_ops = {
f8aed6ec Kishon Vijay Abraham I 2017-03-27 350 .write_header = dw_pcie_ep_write_header,
f8aed6ec Kishon Vijay Abraham I 2017-03-27 351 .set_bar = dw_pcie_ep_set_bar,
f8aed6ec Kishon Vijay Abraham I 2017-03-27 352 .clear_bar = dw_pcie_ep_clear_bar,
f8aed6ec Kishon Vijay Abraham I 2017-03-27 353 .map_addr = dw_pcie_ep_map_addr,
f8aed6ec Kishon Vijay Abraham I 2017-03-27 354 .unmap_addr = dw_pcie_ep_unmap_addr,
f8aed6ec Kishon Vijay Abraham I 2017-03-27 355 .set_msi = dw_pcie_ep_set_msi,
f8aed6ec Kishon Vijay Abraham I 2017-03-27 356 .get_msi = dw_pcie_ep_get_msi,
797b96a7 Gustavo Pimentel 2018-06-08 357 .set_msix = dw_pcie_ep_set_msix,
797b96a7 Gustavo Pimentel 2018-06-08 358 .get_msix = dw_pcie_ep_get_msix,
f8aed6ec Kishon Vijay Abraham I 2017-03-27 @359 .raise_irq = dw_pcie_ep_raise_irq,
f8aed6ec Kishon Vijay Abraham I 2017-03-27 360 .start = dw_pcie_ep_start,
f8aed6ec Kishon Vijay Abraham I 2017-03-27 361 .stop = dw_pcie_ep_stop,
f8aed6ec Kishon Vijay Abraham I 2017-03-27 362 };
f8aed6ec Kishon Vijay Abraham I 2017-03-27 363
:::::: The code at line 359 was first introduced by commit
:::::: f8aed6ec624fb436877a1a552393fd22510a5ff7 PCI: dwc: designware: Add EP mode support
:::::: TO: Kishon Vijay Abraham I <kishon@ti.com>
:::::: CC: Bjorn Helgaas <bhelgaas@google.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 53054 bytes --]
next prev parent reply other threads:[~2018-06-09 13:23 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-01 14:24 [PATCH v3 00/10] Add MSI-X support on pcitest tool Gustavo Pimentel
2018-06-01 14:24 ` [PATCH v3 01/10] PCI: endpoint: Add MSI-X interfaces Gustavo Pimentel
2018-06-01 14:24 ` [PATCH v3 02/10] PCI: dwc: Add MSI-X callbacks handler Gustavo Pimentel
2018-06-09 9:25 ` kbuild test robot
2018-06-09 9:44 ` [RFC PATCH] PCI: dwc: __dw_pcie_ep_find_next_cap() can be static kbuild test robot
2018-06-09 13:22 ` kbuild test robot [this message]
2018-06-01 14:24 ` [PATCH v3 03/10] PCI: Update xxx_pcie_ep_raise_irq() and pci_epc_raise_irq() signatures Gustavo Pimentel
2018-06-09 7:21 ` kbuild test robot
2018-06-09 7:22 ` kbuild test robot
2018-06-09 10:03 ` kbuild test robot
2018-06-01 14:24 ` [PATCH v3 04/10] PCI: dwc: Rework MSI callbacks handler Gustavo Pimentel
2018-06-01 14:24 ` [PATCH v3 05/10] PCI: dwc: Add legacy interrupt callback handler Gustavo Pimentel
2018-06-01 14:24 ` [PATCH v3 06/10] pci-epf-test/pci_endpoint_test: Cleanup PCI_ENDPOINT_TEST memspace Gustavo Pimentel
2018-06-01 14:24 ` [PATCH v3 07/10] pci-epf-test/pci_endpoint_test: Use irq_type module parameter Gustavo Pimentel
2018-06-01 14:24 ` [PATCH v3 08/10] pci-epf-test/pci_endpoint_test: Add MSI-X support Gustavo Pimentel
2018-06-01 14:24 ` [PATCH v3 09/10] pci_endpoint_test: Add 2 ioctl commands Gustavo Pimentel
2018-06-01 14:24 ` [PATCH v3 10/10] tools: PCI: Add MSI-X support Gustavo Pimentel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=201806091903.eKRSYHmZ%fengguang.wu@intel.com \
--to=lkp@intel.com \
--cc=Joao.Pinto@synopsys.com \
--cc=adouglas@cadence.com \
--cc=bhelgaas@google.com \
--cc=gustavo.pimentel@synopsys.com \
--cc=jesper.nilsson@axis.com \
--cc=jingoohan1@gmail.com \
--cc=kbuild-all@01.org \
--cc=kishon@ti.com \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).