From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.1 (2015-04-28) on archive.lwn.net X-Spam-Level: X-Spam-Status: No, score=-5.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable autolearn_force=no version=3.4.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by archive.lwn.net (Postfix) with ESMTP id CD7EB7D8D9 for ; Wed, 10 Oct 2018 14:10:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726798AbeJJVcR (ORCPT ); Wed, 10 Oct 2018 17:32:17 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44428 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726636AbeJJVcQ (ORCPT ); Wed, 10 Oct 2018 17:32:16 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 764E381107; Wed, 10 Oct 2018 14:09:54 +0000 (UTC) Received: from asgard.redhat.com (ovpn-200-26.brq.redhat.com [10.40.200.26]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A03C86B8C0; Wed, 10 Oct 2018 14:09:44 +0000 (UTC) Date: Wed, 10 Oct 2018 16:10:21 +0200 From: Eugene Syromiatnikov To: Yury Norov Cc: Catalin Marinas , Arnd Bergmann , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Adam Borowski , Alexander Graf , Alexey Klimov , Andreas Schwab , Andrew Pinski , Bamvor Zhangjian , Chris Metcalf , Christoph Muellner , Dave Martin , "David S . Miller" , Florian Weimer , Geert Uytterhoeven , Heiko Carstens , James Hogan , James Morse , Joseph Myers , Lin Yongting , Manuel Montezelo , Mark Brown , Martin Schwidefsky , Maxim Kuvyrkov , Nathan_Lynch , Philipp Tomsich , Prasun Kapoor , Ramana Radhakrishnan , Steve Ellcey , Szabolcs Nagy , Pavel Machek , Palmer Dabbelt , Wookey Subject: Re: [PATCH v9 00/24] ILP32 for ARM64 Message-ID: <20181010141017.GA2881@asgard.redhat.com> References: <20180516081910.10067-1-ynorov@caviumnetworks.com> <20180724173957.GA22106@yury-thinkpad> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180724173957.GA22106@yury-thinkpad> User-Agent: Mutt/1.5.23 (2014-03-12) X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Wed, 10 Oct 2018 14:09:55 +0000 (UTC) Sender: linux-doc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-doc@vger.kernel.org On Tue, Jul 24, 2018 at 08:39:57PM +0300, Yury Norov wrote: > Hi all, > > + Pavel Machek, Palmer Dabbelt, Wookey. > > On Wed, May 16, 2018 at 11:18:45AM +0300, Yury Norov wrote: > > This series enables AARCH64 with ILP32 mode. > > > > As supporting work, it introduces ARCH_32BIT_OFF_T configuration > > option that is enabled for existing 32-bit architectures but disabled > > for new arches (so 64-bit off_t userspace type is used by new userspace). > > Also it deprecates getrlimit and setrlimit syscalls prior to prlimit64. > > > > Based on kernel v4.16. Tested with LTP, glibc testsuite, trinity, lmbench, > > CPUSpec. > This is the update of the series based on 4.17 kernel > https://github.com/norov/linux/tree/ilp32-4.17 Hello. I have some questions regarding AArch64 ILP32 implementation for which I failed to find an answer myself: * How ptrace() tracer is supposed to distinguish between ILP32 and LP64 tracees? For MIPS N32 and x32 this is possible based on syscall number, but for AArch64 ILP32 I do not see such a sign. There's also ARM_ip is employed for signalling entering/exiting, I wonder whether it's possible to employ it also for signalling tracee's personality. * What's the reasoning behind capping syscall arguments to 32 bit? x32 and MIPS N32 do not have such a restriction (and do not need special wrappers for syscalls that pass 64-bit values as a result, except when they do, as it is the case for preadv2 on x32); moreover, that would lead to insurmountable difficulties for AArch64 ILP32 tracers that try to trace LP64 tracees, as it would be impossible to pass 64-bit addresses to process_vm_{read,write} or ptrace PEEK/POKE. Thank you.