From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on archive.lwn.net X-Spam-Level: X-Spam-Status: No, score=-6.0 required=5.0 tests=MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham autolearn_force=no version=3.4.2 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by archive.lwn.net (Postfix) with ESMTP id D77747D08A for ; Thu, 2 May 2019 20:51:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726308AbfEBUv1 (ORCPT ); Thu, 2 May 2019 16:51:27 -0400 Received: from mail-oi1-f194.google.com ([209.85.167.194]:37355 "EHLO mail-oi1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726201AbfEBUv1 (ORCPT ); Thu, 2 May 2019 16:51:27 -0400 Received: by mail-oi1-f194.google.com with SMTP id 143so2848629oii.4; Thu, 02 May 2019 13:51:26 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=W0M/s2a9tlTFv/FTWip3G2NKE0kpp0LnOAR85a1p4R0=; b=D8pVa0GjAotJ4c5N5fkYKH1jrYMnsR/I2wAZQHo/s2NfYdSlSITwuZg29YSajEZHau /g8uGJT6+rZkHIhIpJAekennYU/buoTfVnsq6YHgTwMzXBxmuQi4zAN1eP1D2nwctaQj 1f2qGO1ZVzW2cfGAIC3SRL4Whw3diW+AkIPvMMnGr/ZD1yuc/A0+lCStttQG0o7UzmyE o9Vz07pQpZM9fHN9fDpW/zwuFxC9HSlpc5lR5O/8hrAtnka8L+KYJukrF68JKyR4J36p XXlI0TQGTC8VsM7nOSTkvo3S5LkF8uV/5SZS2gm4Uo7Zenpwcr+mm4M0/o8uZyLdvtEK B15Q== X-Gm-Message-State: APjAAAU4rEzFbSmJFlENufR+4CP2EjNmRrfqntouYAZ/OWixXhPB7wRo RKgUraeoClW3ZkkZMuuZyw== X-Google-Smtp-Source: APXvYqzDbdYwgPCIEAr+hiFN60T0e7ZJougtcItHrR9eZtQEVRkQfvLf64qmrsDMjgQaRmbSto/j/w== X-Received: by 2002:a54:4698:: with SMTP id k24mr3819905oic.104.1556830286202; Thu, 02 May 2019 13:51:26 -0700 (PDT) Received: from localhost (24-155-109-49.dyn.grandenetworks.net. [24.155.109.49]) by smtp.gmail.com with ESMTPSA id w5sm21290otg.34.2019.05.02.13.51.24 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 02 May 2019 13:51:24 -0700 (PDT) Date: Thu, 2 May 2019 15:51:24 -0500 From: Rob Herring To: Gerald BAEZA Cc: "will.deacon@arm.com" , "mark.rutland@arm.com" , "mcoquelin.stm32@gmail.com" , Alexandre TORGUE , "corbet@lwn.net" , "linux@armlinux.org.uk" , "olof@lixom.net" , "horms+renesas@verge.net.au" , "arnd@arndb.de" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-stm32@st-md-mailman.stormreply.com" , "linux-kernel@vger.kernel.org" , "linux-doc@vger.kernel.org" Subject: Re: [PATCH 2/5] dt-bindings: perf: stm32: ddrperfm support Message-ID: <20190502205124.GA17384@bogus> References: <1556532194-27904-1-git-send-email-gerald.baeza@st.com> <1556532194-27904-3-git-send-email-gerald.baeza@st.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1556532194-27904-3-git-send-email-gerald.baeza@st.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-doc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-doc@vger.kernel.org On Mon, Apr 29, 2019 at 10:03:37AM +0000, Gerald BAEZA wrote: > The DDRPERFM is the DDR Performance Monitor embedded in STM32MP1 SOC. > > This documentation indicates how to enable stm32-ddr-pmu driver on > DDRPERFM peripheral, via the device tree. > > Signed-off-by: Gerald Baeza > --- > .../devicetree/bindings/perf/stm32-ddr-pmu.txt | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > create mode 100644 Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt > > diff --git a/Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt b/Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt > new file mode 100644 > index 0000000..dabc4c7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/perf/stm32-ddr-pmu.txt > @@ -0,0 +1,18 @@ > +* STM32 DDR Performance Monitor (DDRPERFM) > + > +Required properties: > +- compatible: must be "st,stm32-ddr-pmu". > +- reg: physical address and length of the registers set. > +- clocks: list of phandles and specifiers to all input clocks listed in > + clock-names property. > +- clock-names: "bus" corresponds to the DDRPERFM bus clock and "ddr" to > + the DDR frequency. You have 'resets' in the dts. > + > +Example: > + ddrperfm: perf@5a007000 { > + compatible = "st,stm32-ddr-pmu"; > + reg = <0x5a007000 0x400>; > + clocks = <&rcc DDRPERFM>, <&rcc PLL2_R>; > + clock-names = "bus", "ddr"; > + }; > + > -- > 2.7.4