From: Moritz Fischer <mdf@kernel.org>
To: linux-fpga@vger.kernel.org, gregkh@linuxfoundation.org
Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
Wu Hao <hao.wu@intel.com>, Alan Tull <atull@kernel.org>,
Moritz Fischer <mdf@kernel.org>
Subject: [PATCH 01/15] fpga: dfl-fme-mgr: fix FME_PR_INTFC_ID register address.
Date: Thu, 27 Jun 2019 17:49:37 -0700 [thread overview]
Message-ID: <20190628004951.6202-2-mdf@kernel.org> (raw)
In-Reply-To: <20190628004951.6202-1-mdf@kernel.org>
From: Wu Hao <hao.wu@intel.com>
FME_PR_INTFC_ID is used as compat_id for fpga manager and region,
but high 64 bits and low 64 bits of the compat_id are swapped by
mistake. This patch fixes this problem by fixing register address.
Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Acked-by: Moritz Fischer <mdf@kernel.org>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
---
drivers/fpga/dfl-fme-mgr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/fpga/dfl-fme-mgr.c b/drivers/fpga/dfl-fme-mgr.c
index 76f37709dd1a..b3f7eee3c93f 100644
--- a/drivers/fpga/dfl-fme-mgr.c
+++ b/drivers/fpga/dfl-fme-mgr.c
@@ -30,8 +30,8 @@
#define FME_PR_STS 0x10
#define FME_PR_DATA 0x18
#define FME_PR_ERR 0x20
-#define FME_PR_INTFC_ID_H 0xA8
-#define FME_PR_INTFC_ID_L 0xB0
+#define FME_PR_INTFC_ID_L 0xA8
+#define FME_PR_INTFC_ID_H 0xB0
/* FME PR Control Register Bitfield */
#define FME_PR_CTRL_PR_RST BIT_ULL(0) /* Reset PR engine */
--
2.22.0
next prev parent reply other threads:[~2019-06-28 0:51 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-28 0:49 [PATCH 00/15] FPGA DFL updates Moritz Fischer
2019-06-28 0:49 ` Moritz Fischer [this message]
2019-06-28 0:49 ` [PATCH 02/15] fpga: dfl: fme: remove copy_to_user() in ioctl for PR Moritz Fischer
2019-06-28 0:49 ` [PATCH 03/15] fpga: dfl: fme: align PR buffer size per PR datawidth Moritz Fischer
2019-06-28 0:49 ` [PATCH 04/15] fpga: dfl: fme: support 512bit data width PR Moritz Fischer
2019-07-03 17:56 ` Greg KH
2019-07-03 23:44 ` Wu Hao
2019-06-28 0:49 ` [PATCH 05/15] Documentation: fpga: dfl: add descriptions for virtualization and new interfaces Moritz Fischer
2019-07-03 17:59 ` Greg KH
2019-07-03 23:38 ` Wu Hao
2019-07-04 5:37 ` Greg KH
2019-07-04 6:42 ` Wu Hao
2019-07-04 8:17 ` Greg KH
2019-07-04 8:19 ` Wu Hao
2019-06-28 0:49 ` [PATCH 06/15] fpga: dfl: fme: add DFL_FPGA_FME_PORT_RELEASE/ASSIGN ioctl support Moritz Fischer
2019-07-03 18:07 ` Greg KH
2019-07-03 23:30 ` Wu Hao
2019-07-04 5:39 ` Greg KH
2019-07-04 6:31 ` Wu Hao
2019-07-04 8:20 ` Greg KH
2019-07-04 8:58 ` Wu Hao
2019-07-04 11:04 ` Greg KH
2019-07-04 11:29 ` Wu Hao
2019-06-28 0:49 ` [PATCH 07/15] fpga: dfl: pci: enable SRIOV support Moritz Fischer
2019-06-28 0:49 ` [PATCH 08/15] fpga: dfl: afu: add AFU state related sysfs interfaces Moritz Fischer
2019-06-28 0:49 ` [PATCH 09/15] fpga: dfl: afu: add userclock " Moritz Fischer
2019-06-28 0:49 ` [PATCH 10/15] fpga: dfl: add id_table for dfl private feature driver Moritz Fischer
2019-06-28 0:49 ` [PATCH 11/15] fpga: dfl: afu: export __port_enable/disable function Moritz Fischer
2019-06-28 0:49 ` [PATCH 12/15] fpga: dfl: afu: add error reporting support Moritz Fischer
2019-06-28 0:49 ` [PATCH 13/15] fpga: dfl: afu: add STP (SignalTap) support Moritz Fischer
2019-06-28 0:49 ` [PATCH 14/15] fpga: dfl: fme: add capability sysfs interfaces Moritz Fischer
2019-06-28 0:49 ` [PATCH 15/15] fpga: dfl: fme: add global error reporting support Moritz Fischer
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