From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: corbet@lwn.net
Cc: mike.leach@linaro.org, linux-arm-kernel@lists.infradead.org,
linux-doc@vger.kernel.org
Subject: [PATCH 2/4] coresight: etm4x: docs: Update ABI doc for new sysfs etm4 attributes
Date: Thu, 31 Oct 2019 11:58:32 -0600 [thread overview]
Message-ID: <20191031175834.17548-3-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <20191031175834.17548-1-mathieu.poirier@linaro.org>
From: Mike Leach <mike.leach@linaro.org>
This updates the ABI document to reflect recent additions to the ETM4.X
driver sysfs interface.
Signed-off-by: Mike Leach <mike.leach@linaro.org>
[Updated Date and KernelVersion fields]
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
.../testing/sysfs-bus-coresight-devices-etm4x | 47 +++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
index 9290010e973e..614874e2cf53 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
@@ -282,6 +282,53 @@ Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
Description: (RW) Mask for all 8 virtual machine ID comparator value
registers (if implemented).
+What: /sys/bus/coresight/devices/etm<N>/addr_exlevel_s_ns
+Date: December 2019
+KernelVersion: 5.5
+Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
+Description: (RW) Set the Exception Level matching bits for secure and
+ non-secure exception levels.
+
+What: /sys/bus/coresight/devices/etm<N>/vinst_pe_cmp_start_stop
+Date: December 2019
+KernelVersion: 5.5
+Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
+Description: (RW) Access the start stop control register for PE input
+ comparators.
+
+What: /sys/bus/coresight/devices/etm<N>/addr_cmp_view
+Date: December 2019
+KernelVersion: 5.5
+Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
+Description: (R) Print the current settings for the selected address
+ comparator.
+
+What: /sys/bus/coresight/devices/etm<N>/sshot_idx
+Date: December 2019
+KernelVersion: 5.5
+Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
+Description: (RW) Select the single shot control register to access.
+
+What: /sys/bus/coresight/devices/etm<N>/sshot_ctrl
+Date: December 2019
+KernelVersion: 5.5
+Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
+Description: (RW) Access the selected single shot control register.
+
+What: /sys/bus/coresight/devices/etm<N>/sshot_status
+Date: December 2019
+KernelVersion: 5.5
+Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
+Description: (R) Print the current value of the selected single shot
+ status register.
+
+What: /sys/bus/coresight/devices/etm<N>/sshot_pe_ctrl
+Date: December 2019
+KernelVersion: 5.5
+Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
+Description: (RW) Access the selected single show PE comparator control
+ register.
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcoslsr
Date: April 2015
KernelVersion: 4.01
--
2.17.1
next prev parent reply other threads:[~2019-10-31 17:58 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-31 17:58 [PATCH 0/4] coresight: Documentation: next v5.4-rc5 Mathieu Poirier
2019-10-31 17:58 ` [PATCH 1/4] coresight: etm4x: docs: Update ABI doc for new sysfs name scheme Mathieu Poirier
2019-10-31 17:58 ` Mathieu Poirier [this message]
2019-10-31 17:58 ` [PATCH 3/4] coresight: docs: Create common sub-directory for coresight trace Mathieu Poirier
2019-10-31 17:58 ` [PATCH 4/4] coresight: etm4x: docs: Adds detailed document for programming etm4x Mathieu Poirier
2019-11-07 20:08 ` [PATCH 0/4] coresight: Documentation: next v5.4-rc5 Jonathan Corbet
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