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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id z21sm288506oto.52.2019.12.17.18.57.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Dec 2019 18:57:02 -0800 (PST) Date: Tue, 17 Dec 2019 20:57:02 -0600 From: Rob Herring To: Jae Hyun Yoo Cc: Greg Kroah-Hartman , Lee Jones , Jean Delvare , Guenter Roeck , Mark Rutland , Joel Stanley , Andrew Jeffery , Jonathan Corbet , Gustavo Pimentel , Kishon Vijay Abraham I , Lorenzo Pieralisi , "Darrick J . Wong" , Eric Sandeen , Arnd Bergmann , Wu Hao , Tomohiro Kusumi , "Bryant G . Ly" , Frederic Barrat , "David S . Miller" , Mauro Carvalho Chehab , Andrew Morton , Randy Dunlap , Philippe Ombredanne , Vinod Koul , Stephen Boyd , David Kershner , Uwe Kleine-Konig , Sagar Dharia , Johan Hovold , Thomas Gleixner , Juergen Gross , Cyrille Pitchen , Tomer Maimon , linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, openbmc@lists.ozlabs.org, Benjamin Herrenschmidt , Jason M Biils , Milton Miller II , Pavel Machek , Robin Murphy , Ryan Chen Subject: Re: [PATCH v11 04/14] dt-bindings: Add bindings document of Aspeed PECI adapter Message-ID: <20191218025702.GA18998@bogus> References: <20191211194624.2872-1-jae.hyun.yoo@linux.intel.com> <20191211194624.2872-5-jae.hyun.yoo@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191211194624.2872-5-jae.hyun.yoo@linux.intel.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-doc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-doc@vger.kernel.org On Wed, Dec 11, 2019 at 11:46:14AM -0800, Jae Hyun Yoo wrote: > This commit adds bindings document of Aspeed PECI adapter for ASPEED > AST24xx/25xx/26xx SoCs. > > Cc: Mark Rutland > Cc: Joel Stanley > Cc: Andrew Jeffery > Cc: Benjamin Herrenschmidt > Cc: Greg Kroah-Hartman > Cc: Jason M Biils > Cc: Milton Miller II > Cc: Pavel Machek > Cc: Robin Murphy > Cc: Ryan Chen > Signed-off-by: Jae Hyun Yoo > --- > Changes since v10: > - Changed documents format to DT schema format so I dropped all review tags. > Please review it again. > > .../devicetree/bindings/peci/peci-aspeed.yaml | 124 ++++++++++++++++++ > 1 file changed, 124 insertions(+) > create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.yaml > > diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.yaml b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml > new file mode 100644 > index 000000000000..0f5c2993fe9b > --- /dev/null > +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml > @@ -0,0 +1,124 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/peci/peci-aspeed.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Aspeed PECI Bus Device Tree Bindings > + > +maintainers: > + - Jae Hyun Yoo > + > +properties: > + compatible: > + enum: > + - aspeed,ast2400-peci > + - aspeed,ast2500-peci > + - aspeed,ast2600-peci > + > + reg: > + maxItems: 1 > + > + "#address-cells": > + # Required to define a client address. > + const: 1 > + > + "#size-cells": > + # Required to define a client address. > + const: 0 These 2 can be defined by the bus schema. > + > + interrupts: > + maxItems: 1 > + > + clocks: > + description: | You can drop the '|' if there's no formatting to preserve. > + Clock source for PECI controller. Should reference the external > + oscillator clock. > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + clock-frequency: > + # Operation frequency of PECI controller in units of Hz. > + minimum: 187500 > + maximum: 24000000 > + > + msg-timing: > + description: | > + Message timing negotiation period. This value will determine the period > + of message timing negotiation to be issued by PECI controller. The unit > + of the programmed value is four times of PECI clock period. > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + - minimum: 0 > + maximum: 255 > + default: 1 > + > + addr-timing: > + description: | > + Address timing negotiation period. This value will determine the period > + of address timing negotiation to be issued by PECI controller. The unit > + of the programmed value is four times of PECI clock period. > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + - minimum: 0 > + maximum: 255 > + default: 1 > + > + rd-sampling-point: > + description: | > + Read sampling point selection. The whole period of a bit time will be > + divided into 16 time frames. This value will determine the time frame > + in which the controller will sample PECI signal for data read back. > + Usually in the middle of a bit time is the best. > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + - minimum: 0 > + maximum: 15 > + default: 8 > + > + cmd-timeout-ms: > + # Command timeout in units of ms. > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + - minimum: 1 > + maximum: 60000 > + default: 1000 > + > +required: > + - compatible > + - reg > + - "#address-cells" > + - "#size-cells" > + - interrupts > + - clocks > + - resets > + - clock-frequency > + > +examples: > + - | > + #include > + #include > + peci: bus@1e78b000 { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1e78b000 0x60>; You can drop this node in the examples. > + > + peci0: peci-bus@0 { > + compatible = "aspeed,ast2600-peci"; > + reg = <0x0 0x100>; > + #address-cells = <1>; > + #size-cells = <0>; > + interrupts = ; > + clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; > + resets = <&syscon ASPEED_RESET_PECI>; > + clock-frequency = <24000000>; > + msg-timing = <1>; > + addr-timing = <1>; > + rd-sampling-point = <8>; > + cmd-timeout-ms = <1000>; > + }; > + }; > +... > -- > 2.17.1 >