From: Matthew Rosato <mjrosato@linux.ibm.com>
To: linux-s390@vger.kernel.org
Cc: alex.williamson@redhat.com, cohuck@redhat.com,
schnelle@linux.ibm.com, farman@linux.ibm.com,
pmorel@linux.ibm.com, borntraeger@linux.ibm.com,
hca@linux.ibm.com, gor@linux.ibm.com,
gerald.schaefer@linux.ibm.com, agordeev@linux.ibm.com,
svens@linux.ibm.com, frankja@linux.ibm.com, david@redhat.com,
imbrenda@linux.ibm.com, vneethv@linux.ibm.com,
oberpar@linux.ibm.com, freude@linux.ibm.com, thuth@redhat.com,
pasic@linux.ibm.com, pbonzini@redhat.com, corbet@lwn.net,
jgg@nvidia.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org
Subject: [PATCH v6 07/21] s390/pci: externalize the SIC operation controls and routine
Date: Tue, 26 Apr 2022 16:08:28 -0400 [thread overview]
Message-ID: <20220426200842.98655-8-mjrosato@linux.ibm.com> (raw)
In-Reply-To: <20220426200842.98655-1-mjrosato@linux.ibm.com>
A subsequent patch will be issuing SIC from KVM -- export the necessary
routine and make the operation control definitions available from a header.
Because the routine will now be exported, let's rename __zpci_set_irq_ctrl
to zpci_set_irq_ctrl and get rid of the zero'd iib wrapper function of
the same name.
Reviewed-by: Niklas Schnelle <schnelle@linux.ibm.com>
Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Reviewed-by: Pierre Morel <pmorel@linux.ibm.com>
Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com>
---
arch/s390/include/asm/pci_insn.h | 17 +++++++++--------
arch/s390/pci/pci_insn.c | 3 ++-
arch/s390/pci/pci_irq.c | 26 ++++++++++++--------------
3 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/arch/s390/include/asm/pci_insn.h b/arch/s390/include/asm/pci_insn.h
index 61cf9531f68f..5331082fa516 100644
--- a/arch/s390/include/asm/pci_insn.h
+++ b/arch/s390/include/asm/pci_insn.h
@@ -98,6 +98,14 @@ struct zpci_fib {
u32 gd;
} __packed __aligned(8);
+/* Set Interruption Controls Operation Controls */
+#define SIC_IRQ_MODE_ALL 0
+#define SIC_IRQ_MODE_SINGLE 1
+#define SIC_IRQ_MODE_DIRECT 4
+#define SIC_IRQ_MODE_D_ALL 16
+#define SIC_IRQ_MODE_D_SINGLE 17
+#define SIC_IRQ_MODE_SET_CPU 18
+
/* directed interruption information block */
struct zpci_diib {
u32 : 1;
@@ -134,13 +142,6 @@ int __zpci_store(u64 data, u64 req, u64 offset);
int zpci_store(const volatile void __iomem *addr, u64 data, unsigned long len);
int __zpci_store_block(const u64 *data, u64 req, u64 offset);
void zpci_barrier(void);
-int __zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib);
-
-static inline int zpci_set_irq_ctrl(u16 ctl, u8 isc)
-{
- union zpci_sic_iib iib = {{0}};
-
- return __zpci_set_irq_ctrl(ctl, isc, &iib);
-}
+int zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib);
#endif
diff --git a/arch/s390/pci/pci_insn.c b/arch/s390/pci/pci_insn.c
index 1710d006ee93..4c6967b73932 100644
--- a/arch/s390/pci/pci_insn.c
+++ b/arch/s390/pci/pci_insn.c
@@ -98,7 +98,7 @@ int zpci_refresh_trans(u64 fn, u64 addr, u64 range)
}
/* Set Interruption Controls */
-int __zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib)
+int zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib)
{
if (!test_facility(72))
return -EIO;
@@ -109,6 +109,7 @@ int __zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib)
return 0;
}
+EXPORT_SYMBOL_GPL(zpci_set_irq_ctrl);
/* PCI Load */
static inline int ____pcilg(u64 *data, u64 req, u64 offset, u8 *status)
diff --git a/arch/s390/pci/pci_irq.c b/arch/s390/pci/pci_irq.c
index 87c7d121c255..f2b3145b6697 100644
--- a/arch/s390/pci/pci_irq.c
+++ b/arch/s390/pci/pci_irq.c
@@ -15,13 +15,6 @@
static enum {FLOATING, DIRECTED} irq_delivery;
-#define SIC_IRQ_MODE_ALL 0
-#define SIC_IRQ_MODE_SINGLE 1
-#define SIC_IRQ_MODE_DIRECT 4
-#define SIC_IRQ_MODE_D_ALL 16
-#define SIC_IRQ_MODE_D_SINGLE 17
-#define SIC_IRQ_MODE_SET_CPU 18
-
/*
* summary bit vector
* FLOATING - summary bit per function
@@ -154,6 +147,7 @@ static struct irq_chip zpci_irq_chip = {
static void zpci_handle_cpu_local_irq(bool rescan)
{
struct airq_iv *dibv = zpci_ibv[smp_processor_id()];
+ union zpci_sic_iib iib = {{0}};
unsigned long bit;
int irqs_on = 0;
@@ -165,7 +159,7 @@ static void zpci_handle_cpu_local_irq(bool rescan)
/* End of second scan with interrupts on. */
break;
/* First scan complete, reenable interrupts. */
- if (zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC))
+ if (zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC, &iib))
break;
bit = 0;
continue;
@@ -193,6 +187,7 @@ static void zpci_handle_remote_irq(void *data)
static void zpci_handle_fallback_irq(void)
{
struct cpu_irq_data *cpu_data;
+ union zpci_sic_iib iib = {{0}};
unsigned long cpu;
int irqs_on = 0;
@@ -203,7 +198,7 @@ static void zpci_handle_fallback_irq(void)
/* End of second scan with interrupts on. */
break;
/* First scan complete, reenable interrupts. */
- if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC))
+ if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC, &iib))
break;
cpu = 0;
continue;
@@ -234,6 +229,7 @@ static void zpci_directed_irq_handler(struct airq_struct *airq,
static void zpci_floating_irq_handler(struct airq_struct *airq,
struct tpi_info *tpi_info)
{
+ union zpci_sic_iib iib = {{0}};
unsigned long si, ai;
struct airq_iv *aibv;
int irqs_on = 0;
@@ -247,7 +243,7 @@ static void zpci_floating_irq_handler(struct airq_struct *airq,
/* End of second scan with interrupts on. */
break;
/* First scan complete, reenable interrupts. */
- if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC))
+ if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC, &iib))
break;
si = 0;
continue;
@@ -407,11 +403,12 @@ static struct airq_struct zpci_airq = {
static void __init cpu_enable_directed_irq(void *unused)
{
union zpci_sic_iib iib = {{0}};
+ union zpci_sic_iib ziib = {{0}};
iib.cdiib.dibv_addr = (u64) zpci_ibv[smp_processor_id()]->vector;
- __zpci_set_irq_ctrl(SIC_IRQ_MODE_SET_CPU, 0, &iib);
- zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC);
+ zpci_set_irq_ctrl(SIC_IRQ_MODE_SET_CPU, 0, &iib);
+ zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC, &ziib);
}
static int __init zpci_directed_irq_init(void)
@@ -426,7 +423,7 @@ static int __init zpci_directed_irq_init(void)
iib.diib.isc = PCI_ISC;
iib.diib.nr_cpus = num_possible_cpus();
iib.diib.disb_addr = virt_to_phys(zpci_sbv->vector);
- __zpci_set_irq_ctrl(SIC_IRQ_MODE_DIRECT, 0, &iib);
+ zpci_set_irq_ctrl(SIC_IRQ_MODE_DIRECT, 0, &iib);
zpci_ibv = kcalloc(num_possible_cpus(), sizeof(*zpci_ibv),
GFP_KERNEL);
@@ -471,6 +468,7 @@ static int __init zpci_floating_irq_init(void)
int __init zpci_irq_init(void)
{
+ union zpci_sic_iib iib = {{0}};
int rc;
irq_delivery = sclp.has_dirq ? DIRECTED : FLOATING;
@@ -502,7 +500,7 @@ int __init zpci_irq_init(void)
* Enable floating IRQs (with suppression after one IRQ). When using
* directed IRQs this enables the fallback path.
*/
- zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC);
+ zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC, &iib);
return 0;
out_airq:
--
2.27.0
next prev parent reply other threads:[~2022-04-26 20:09 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-26 20:08 [PATCH v6 00/21] KVM: s390: enable zPCI for interpretive execution Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 01/21] s390/sclp: detect the zPCI load/store interpretation facility Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 02/21] s390/sclp: detect the AISII facility Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 03/21] s390/sclp: detect the AENI facility Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 04/21] s390/sclp: detect the AISI facility Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 05/21] s390/airq: pass more TPI info to airq handlers Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 06/21] s390/airq: allow for airq structure that uses an input vector Matthew Rosato
2022-04-26 20:08 ` Matthew Rosato [this message]
2022-04-26 20:08 ` [PATCH v6 08/21] s390/pci: stash associated GISA designation Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 09/21] s390/pci: stash dtsm and maxstbl Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 10/21] KVM: s390: pci: add basic kvm_zdev structure Matthew Rosato
2022-04-27 8:41 ` kernel test robot
2022-04-27 13:25 ` Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 11/21] KVM: s390: pci: do initial setup for AEN interpretation Matthew Rosato
2022-05-05 10:16 ` Christian Borntraeger
2022-04-26 20:08 ` [PATCH v6 12/21] KVM: s390: pci: enable host forwarding of Adapter Event Notifications Matthew Rosato
2022-05-05 12:37 ` Christian Borntraeger
2022-04-26 20:08 ` [PATCH v6 13/21] KVM: s390: mechanism to enable guest zPCI Interpretation Matthew Rosato
2022-05-05 13:10 ` Christian Borntraeger
2022-04-26 20:08 ` [PATCH v6 14/21] KVM: s390: pci: provide routines for enabling/disabling interrupt forwarding Matthew Rosato
2022-05-06 15:35 ` Christian Borntraeger
2022-05-06 15:55 ` Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 15/21] KVM: s390: pci: add routines to start/stop interpretive execution Matthew Rosato
2022-04-27 15:14 ` Jason Gunthorpe
2022-04-27 20:20 ` Matthew Rosato
2022-04-28 12:28 ` Jason Gunthorpe
2022-04-26 20:08 ` [PATCH v6 16/21] vfio-pci/zdev: add open/close device hooks Matthew Rosato
2022-04-27 14:04 ` Jason Gunthorpe
2022-04-27 14:42 ` Matthew Rosato
2022-04-27 15:01 ` Jason Gunthorpe
2022-04-27 15:26 ` Matthew Rosato
2022-04-27 15:39 ` Jason Gunthorpe
2022-05-06 15:56 ` Christian Borntraeger
2022-04-26 20:08 ` [PATCH v6 17/21] vfio-pci/zdev: add function handle to clp base capability Matthew Rosato
2022-05-06 16:02 ` Christian Borntraeger
2022-04-26 20:08 ` [PATCH v6 18/21] vfio-pci/zdev: different maxstbl for interpreted devices Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 19/21] KVM: s390: add KVM_S390_ZPCI_OP to manage guest zPCI devices Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 20/21] KVM: s390: introduce CPU feature for zPCI Interpretation Matthew Rosato
2022-04-26 20:08 ` [PATCH v6 21/21] MAINTAINERS: additional files related kvm s390 pci passthrough Matthew Rosato
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