From: Babu Moger <babu.moger@amd.com>
To: <corbet@lwn.net>, <reinette.chatre@intel.com>,
<tglx@linutronix.de>, <mingo@redhat.com>, <bp@alien8.de>
Cc: <fenghua.yu@intel.com>, <dave.hansen@linux.intel.com>,
<x86@kernel.org>, <hpa@zytor.com>, <paulmck@kernel.org>,
<akpm@linux-foundation.org>, <quic_neeraju@quicinc.com>,
<rdunlap@infradead.org>, <damien.lemoal@opensource.wdc.com>,
<songmuchun@bytedance.com>, <peterz@infradead.org>,
<jpoimboe@kernel.org>, <pbonzini@redhat.com>,
<babu.moger@amd.com>, <chang.seok.bae@intel.com>,
<pawan.kumar.gupta@linux.intel.com>, <jmattson@google.com>,
<daniel.sneddon@linux.intel.com>, <sandipan.das@amd.com>,
<tony.luck@intel.com>, <james.morse@arm.com>,
<linux-doc@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<bagasdotme@gmail.com>, <eranian@google.com>,
<christophe.leroy@csgroup.eu>, <jarkko@kernel.org>,
<adrian.hunter@intel.com>, <quic_jiles@quicinc.com>,
<peternewman@google.com>
Subject: [PATCH v10 06/13] x86/resctrl: Detect and configure Slow Memory Bandwidth Allocation
Date: Thu, 22 Dec 2022 17:31:20 -0600 [thread overview]
Message-ID: <20221222233127.910538-7-babu.moger@amd.com> (raw)
In-Reply-To: <20221222233127.910538-1-babu.moger@amd.com>
The QoS slow memory configuration details are available via
CPUID_Fn80000020_EDX_x02. Detect the available details and
initialize the rest to defaults.
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: Babu Moger <babu.moger@amd.com>
---
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/kernel/cpu/resctrl/core.c | 36 +++++++++++++++++++++--
arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 2 +-
arch/x86/kernel/cpu/resctrl/rdtgroup.c | 8 +++--
4 files changed, 41 insertions(+), 6 deletions(-)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 37ff47552bcb..e0a40027aa62 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -1061,6 +1061,7 @@
/* - AMD: */
#define MSR_IA32_MBA_BW_BASE 0xc0000200
+#define MSR_IA32_SMBA_BW_BASE 0xc0000280
/* MSR_IA32_VMX_MISC bits */
#define MSR_IA32_VMX_MISC_INTEL_PT (1ULL << 14)
diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
index 10a8c9d96f32..b4fc851f6489 100644
--- a/arch/x86/kernel/cpu/resctrl/core.c
+++ b/arch/x86/kernel/cpu/resctrl/core.c
@@ -162,6 +162,13 @@ bool is_mba_sc(struct rdt_resource *r)
if (!r)
return rdt_resources_all[RDT_RESOURCE_MBA].r_resctrl.membw.mba_sc;
+ /*
+ * The software controller support is only applicable to MBA resource.
+ * Make sure to check for resource type.
+ */
+ if (r->rid != RDT_RESOURCE_MBA)
+ return false;
+
return r->membw.mba_sc;
}
@@ -225,9 +232,15 @@ static bool __rdt_get_mem_config_amd(struct rdt_resource *r)
struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
union cpuid_0x10_3_eax eax;
union cpuid_0x10_x_edx edx;
- u32 ebx, ecx;
+ u32 ebx, ecx, subleaf;
- cpuid_count(0x80000020, 1, &eax.full, &ebx, &ecx, &edx.full);
+ /*
+ * Query CPUID_Fn80000020_EDX_x01 for MBA and
+ * CPUID_Fn80000020_EDX_x02 for SMBA
+ */
+ subleaf = (r->rid == RDT_RESOURCE_SMBA) ? 2 : 1;
+
+ cpuid_count(0x80000020, subleaf, &eax.full, &ebx, &ecx, &edx.full);
hw_res->num_closid = edx.split.cos_max + 1;
r->default_ctrl = MAX_MBA_BW_AMD;
@@ -750,6 +763,19 @@ static __init bool get_mem_config(void)
return false;
}
+static __init bool get_slow_mem_config(void)
+{
+ struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_SMBA];
+
+ if (!rdt_cpu_has(X86_FEATURE_SMBA))
+ return false;
+
+ if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+ return __rdt_get_mem_config_amd(&hw_res->r_resctrl);
+
+ return false;
+}
+
static __init bool get_rdt_alloc_resources(void)
{
struct rdt_resource *r;
@@ -780,6 +806,9 @@ static __init bool get_rdt_alloc_resources(void)
if (get_mem_config())
ret = true;
+ if (get_slow_mem_config())
+ ret = true;
+
return ret;
}
@@ -869,6 +898,9 @@ static __init void rdt_init_res_defs_amd(void)
} else if (r->rid == RDT_RESOURCE_MBA) {
hw_res->msr_base = MSR_IA32_MBA_BW_BASE;
hw_res->msr_update = mba_wrmsr_amd;
+ } else if (r->rid == RDT_RESOURCE_SMBA) {
+ hw_res->msr_base = MSR_IA32_SMBA_BW_BASE;
+ hw_res->msr_update = mba_wrmsr_amd;
}
}
}
diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
index 7eece3d2d0c3..eb07d4435391 100644
--- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
+++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
@@ -209,7 +209,7 @@ static int parse_line(char *line, struct resctrl_schema *s,
unsigned long dom_id;
if (rdtgrp->mode == RDT_MODE_PSEUDO_LOCKSETUP &&
- r->rid == RDT_RESOURCE_MBA) {
+ (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA)) {
rdt_last_cmd_puts("Cannot pseudo-lock MBA resource\n");
return -EINVAL;
}
diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
index e4e6cdc1ee62..aa469d708991 100644
--- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c
+++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
@@ -1208,7 +1208,7 @@ static bool rdtgroup_mode_test_exclusive(struct rdtgroup *rdtgrp)
list_for_each_entry(s, &resctrl_schema_all, list) {
r = s->res;
- if (r->rid == RDT_RESOURCE_MBA)
+ if (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA)
continue;
has_cache = true;
list_for_each_entry(d, &r->domains, list) {
@@ -1397,7 +1397,8 @@ static int rdtgroup_size_show(struct kernfs_open_file *of,
ctrl = resctrl_arch_get_config(r, d,
closid,
type);
- if (r->rid == RDT_RESOURCE_MBA)
+ if (r->rid == RDT_RESOURCE_MBA ||
+ r->rid == RDT_RESOURCE_SMBA)
size = ctrl;
else
size = rdtgroup_cbm_to_size(r, d, ctrl);
@@ -2832,7 +2833,8 @@ static int rdtgroup_init_alloc(struct rdtgroup *rdtgrp)
list_for_each_entry(s, &resctrl_schema_all, list) {
r = s->res;
- if (r->rid == RDT_RESOURCE_MBA) {
+ if (r->rid == RDT_RESOURCE_MBA ||
+ r->rid == RDT_RESOURCE_SMBA) {
rdtgroup_init_mba(r, rdtgrp->closid);
if (is_mba_sc(r))
continue;
--
2.34.1
next prev parent reply other threads:[~2022-12-22 23:32 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-22 23:31 [PATCH v10 00/13] x86/resctrl: Support for AMD QoS new features Babu Moger
2022-12-22 23:31 ` [PATCH v10 01/13] x86/resctrl: Replace smp_call_function_many() with on_each_cpu_mask() Babu Moger
2023-01-05 0:28 ` Reinette Chatre
2023-01-05 15:48 ` Moger, Babu
2022-12-22 23:31 ` [PATCH v10 02/13] x86/cpufeatures: Add Slow Memory Bandwidth Allocation feature flag Babu Moger
2022-12-22 23:31 ` [PATCH v10 03/13] x86/resctrl: Add a new resource type RDT_RESOURCE_SMBA Babu Moger
2022-12-22 23:31 ` [PATCH v10 04/13] x86/cpufeatures: Add Bandwidth Monitoring Event Configuration feature flag Babu Moger
2022-12-22 23:31 ` [PATCH v10 05/13] x86/resctrl: Include new features in command line options Babu Moger
2022-12-22 23:31 ` Babu Moger [this message]
2022-12-22 23:31 ` [PATCH v10 07/13] x86/resctrl: Add __init attribute to rdt_get_mon_l3_config() Babu Moger
2023-01-05 0:28 ` Reinette Chatre
2023-01-05 15:48 ` Moger, Babu
2022-12-22 23:31 ` [PATCH v10 08/13] x86/resctrl: Support monitor configuration Babu Moger
2022-12-22 23:31 ` [PATCH v10 09/13] x86/resctrl: Add interface to read mbm_total_bytes_config Babu Moger
2023-01-05 0:29 ` Reinette Chatre
2023-01-05 15:49 ` Moger, Babu
2022-12-22 23:31 ` [PATCH v10 10/13] x86/resctrl: Add interface to read mbm_local_bytes_config Babu Moger
2022-12-22 23:31 ` [PATCH v10 11/13] x86/resctrl: Add interface to write mbm_total_bytes_config Babu Moger
2023-01-05 0:29 ` Reinette Chatre
2023-01-05 16:04 ` Moger, Babu
2023-01-05 17:49 ` Reinette Chatre
2023-01-05 19:59 ` Moger, Babu
2022-12-22 23:31 ` [PATCH v10 12/13] x86/resctrl: Add interface to write mbm_local_bytes_config Babu Moger
2022-12-22 23:31 ` [PATCH v10 13/13] Documentation/x86: Update resctrl.rst for new features Babu Moger
2023-01-05 0:30 ` Reinette Chatre
2023-01-05 16:06 ` Moger, Babu
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