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From: Evan Green <evan@rivosinc.com>
To: Palmer Dabbelt <palmer@rivosinc.com>
Cc: Evan Green <evan@rivosinc.com>, Albert Ou <aou@eecs.berkeley.edu>,
	Andrew Bresticker <abrestic@rivosinc.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	Anup Patel <apatel@ventanamicro.com>,
	Celeste Liu <coelacanthus@outlook.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Heiko Stuebner <heiko.stuebner@vrull.eu>,
	Jisheng Zhang <jszhang@kernel.org>,
	Jonathan Corbet <corbet@lwn.net>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: [PATCH v2 0/3] RISC-V: Export Zba, Zbb to usermode via hwprobe
Date: Tue,  9 May 2023 11:25:00 -0700	[thread overview]
Message-ID: <20230509182504.2997252-1-evan@rivosinc.com> (raw)


This change detects the presence of Zba, Zbb, and Zbs extensions and exports
them per-hart to userspace via the hwprobe mechanism. Glibc can then use
these in setting up hwcaps-based library search paths.

There's a little bit of extra housekeeping here: the first change adds
Zba and Zbs to the set of extensions the kernel recognizes, and the second
change starts tracking ISA features per-hart (in addition to the ANDed
mask of features across all harts which the kernel uses to make
decisions). Now that we track the ISA information per-hart, we could
even fix up /proc/cpuinfo to accurately report extension per-hart,
though I've left that out of this series for now.

Changes in v2:
 - Add Zbs as well
 - Add blank line before if in riscv_fill_hwcap() (Conor)
 - Fixed typo s/supporte/supported/ (Conor)
 - Fixed copypasta s/IMA_ZBB/EXT_ZBB/ (Conor)
 - Added Zbs

Evan Green (3):
  RISC-V: Add Zba, Zbs extension probing
  RISC-V: Track ISA extensions per hart
  RISC-V: hwprobe: Expose Zba, Zbb, and Zbs

 Documentation/riscv/hwprobe.rst       | 10 ++++++
 arch/riscv/include/asm/cpufeature.h   | 10 ++++++
 arch/riscv/include/asm/hwcap.h        |  2 ++
 arch/riscv/include/uapi/asm/hwprobe.h |  3 ++
 arch/riscv/kernel/cpu.c               |  2 ++
 arch/riscv/kernel/cpufeature.c        | 20 +++++++----
 arch/riscv/kernel/sys_riscv.c         | 48 +++++++++++++++++++++++----
 7 files changed, 82 insertions(+), 13 deletions(-)

-- 
2.25.1


             reply	other threads:[~2023-05-09 18:25 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-09 18:25 Evan Green [this message]
2023-05-09 18:25 ` [PATCH v2 3/3] RISC-V: hwprobe: Expose Zba, Zbb, and Zbs Evan Green
2023-05-09 18:33   ` Conor Dooley
2023-05-10 14:47   ` Heiko Stübner
2023-06-19 23:55     ` Palmer Dabbelt
2023-06-19 22:07 ` [PATCH v2 0/3] RISC-V: Export Zba, Zbb to usermode via hwprobe Palmer Dabbelt
2023-06-20  1:00 ` patchwork-bot+linux-riscv

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