Re: [PATCH V6 00/21] Add basic ACPI support for RISC-V

patchwork-bot+linux-riscv
2023-06-02T15:00:37Z

Hello:

This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Mon, 15 May 2023 11:19:07 +0530 you wrote:
> This patch series enables the basic ACPI infrastructure for RISC-V.
> Supporting external interrupt controllers is in progress and hence it is
> tested using poll based HVC SBI console and RAM disk.
>
> The first patch in this series is one of the patch from Jisheng's
> series [1] which is not merged yet. This patch is required to support
> ACPI since efi_init() which gets called before sbi_init() can enable
> static branches and hits a panic.
>
> [...]

Here is the summary with links:
- [V6,01/21] riscv: move sbi_init() earlier before jump_label_init()
https://git.kernel.org/riscv/c/24fc18087f42
- [V6,02/21] platform/surface: Disable for RISC-V
https://git.kernel.org/riscv/c/7f2e20459b28
- [V6,03/21] crypto: hisilicon/qm: Fix to enable build with RISC-V clang
https://git.kernel.org/riscv/c/fbb995a7b27c
- [V6,04/21] ACPI: tables: Print RINTC information when MADT is parsed
https://git.kernel.org/riscv/c/4d02d88d2b92
- [V6,05/21] ACPI: OSL: Make should_use_kmap() 0 for RISC-V
https://git.kernel.org/riscv/c/214c236223b8
- [V6,06/21] RISC-V: Add support to build the ACPI core
https://git.kernel.org/riscv/c/a91a9ffbd3a5
- [V6,07/21] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid
https://git.kernel.org/riscv/c/8b7809e28952
- [V6,08/21] RISC-V: Add ACPI initialization in setup_arch()
https://git.kernel.org/riscv/c/724f4c0df766
- [V6,09/21] RISC-V: ACPI: Cache and retrieve the RINTC structure
https://git.kernel.org/riscv/c/f99561199470
- [V6,10/21] drivers/acpi: RISC-V: Add RHCT related code
https://git.kernel.org/riscv/c/e6b9d8eddb17
- [V6,11/21] RISC-V: smpboot: Create wrapper setup_smp()
https://git.kernel.org/riscv/c/61946127ab49
- [V6,12/21] RISC-V: smpboot: Add ACPI support in setup_smp()
https://git.kernel.org/riscv/c/ce92546cd637
- [V6,13/21] RISC-V: only iterate over possible CPUs in ISA string parser
https://git.kernel.org/riscv/c/914d6f44fc50
- [V6,14/21] RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap()
https://git.kernel.org/riscv/c/396c018332a1
- [V6,15/21] RISC-V: cpu: Enable cpuinfo for ACPI systems
https://git.kernel.org/riscv/c/0b144c818989
- [V6,16/21] irqchip/riscv-intc: Add ACPI support
https://git.kernel.org/riscv/c/7023b9d83f03
- [V6,17/21] clocksource/timer-riscv: Refactor riscv_timer_init_dt()
https://git.kernel.org/riscv/c/cd12d206685a
- [V6,18/21] clocksource/timer-riscv: Add ACPI support
https://git.kernel.org/riscv/c/21f4f92410dc
- [V6,19/21] RISC-V: time.c: Add ACPI support for time_init()
https://git.kernel.org/riscv/c/714aa1d1c8ca
- [V6,20/21] RISC-V: Enable ACPI in defconfig
https://git.kernel.org/riscv/c/0b8e15ca0082
- [V6,21/21] MAINTAINERS: Add entry for drivers/acpi/riscv
https://git.kernel.org/riscv/c/cc9e654a7e81

You are awesome, thank you!
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