From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C25DC7EE43 for ; Thu, 8 Jun 2023 13:22:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235748AbjFHNWn (ORCPT ); Thu, 8 Jun 2023 09:22:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50650 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235659AbjFHNWk (ORCPT ); Thu, 8 Jun 2023 09:22:40 -0400 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C70CC2717; Thu, 8 Jun 2023 06:22:13 -0700 (PDT) Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.206]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4QcPxY3cpGz6J7rT; Thu, 8 Jun 2023 21:21:37 +0800 (CST) Received: from localhost (10.202.227.76) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Thu, 8 Jun 2023 14:22:01 +0100 Date: Thu, 8 Jun 2023 14:22:00 +0100 From: Jonathan Cameron To: Junhao He CC: , , , , , , , , Subject: Re: [PATCH v3 2/3] drivers/perf: hisi: Add support for HiSilicon UC PMU driver Message-ID: <20230608142200.0000753c@Huawei.com> In-Reply-To: <20230608113719.27433-3-hejunhao3@huawei.com> References: <20230608113719.27433-1-hejunhao3@huawei.com> <20230608113719.27433-3-hejunhao3@huawei.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.202.227.76] X-ClientProxiedBy: lhrpeml500006.china.huawei.com (7.191.161.198) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-doc@vger.kernel.org On Thu, 8 Jun 2023 19:37:18 +0800 Junhao He wrote: > On HiSilicon Hip09 platform, there is 4 UC (unified cache) module are 4 UC (unified cache) modules > on each chip CCL (CPU Cluster). UC is a cache that provides > coherence between NUMA and UMA domains. It is located between L2 > and Memory System. And many PMU events are supported. Let's support Many PMU events are supported. > the UC PMU driver using the HiSilicon uncore PMU framework. > > * rd_req_en : rd_req_en is the abbreviation of read request tracetag > enable and allows user to count only read operations. Details are listed > in the hisi-pmu document at Documentation/admin-guide/perf/hisi-pmu.rst > > * srcid_en & srcid: Allows users to filter statistical information based > on specific CPU/ICL by srcid. > srcid_en depending on rd_req_en enabled. srcid_en depends on rd_req_en being enabled. > > * uring_channel: Allows users to filter statistical information based on > the specified tx request uring channel. > uring_channel only supported events: [0x47 ~ 0x59]. > > Signed-off-by: Junhao He > Reviewed-by: Yicong Yang The editorial stuff above is trivial and original text can be easily understood. So maintainers may not care. If you happen to be re rolling the patch then nice to clean it up. Reviewed-by: Jonathan Cameron