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From: Xin Li <xin3.li@intel.com>
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Subject: [PATCH v9 01/36] Documentation/x86/64: Add documentation for FRED
Date: Sun, 30 Jul 2023 23:32:42 -0700	[thread overview]
Message-ID: <20230731063317.3720-2-xin3.li@intel.com> (raw)
In-Reply-To: <20230731063317.3720-1-xin3.li@intel.com>

Briefly introduce FRED, its advantages compared to IDT, and its
Linux enabling.

Signed-off-by: Xin Li <xin3.li@intel.com>
---
 Documentation/arch/x86/x86_64/fred.rst  | 102 ++++++++++++++++++++++++
 Documentation/arch/x86/x86_64/index.rst |   1 +
 2 files changed, 103 insertions(+)
 create mode 100644 Documentation/arch/x86/x86_64/fred.rst

diff --git a/Documentation/arch/x86/x86_64/fred.rst b/Documentation/arch/x86/x86_64/fred.rst
new file mode 100644
index 000000000000..27c980e882ba
--- /dev/null
+++ b/Documentation/arch/x86/x86_64/fred.rst
@@ -0,0 +1,102 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+=========================================
+Flexible Return and Event Delivery (FRED)
+=========================================
+
+Overview
+========
+
+The FRED architecture defines simple new transitions that change
+privilege level (ring transitions). The FRED architecture was
+designed with the following goals:
+
+1) Improve overall performance and response time by replacing event
+   delivery through the interrupt descriptor table (IDT event
+   delivery) and event return by the IRET instruction with lower
+   latency transitions.
+
+2) Improve software robustness by ensuring that event delivery
+   establishes the full supervisor context and that event return
+   establishes the full user context.
+
+The new transitions defined by the FRED architecture are FRED event
+delivery and, for returning from events, two FRED return instructions.
+FRED event delivery can effect a transition from ring 3 to ring 0, but
+it is used also to deliver events incident to ring 0. One FRED
+instruction (ERETU) effects a return from ring 0 to ring 3, while the
+other (ERETS) returns while remaining in ring 0. Collectively, FRED
+event delivery and the FRED return instructions are FRED transitions.
+
+In addition to these transitions, the FRED architecture defines a new
+instruction (LKGS) for managing the state of the GS segment register.
+The LKGS instruction can be used by 64-bit operating systems that do
+not use the new FRED transitions.
+
+Software based event dispatching
+================================
+
+FRED operates differently from IDT in terms of event handling. Instead
+of directly dispatching an event to its handler based on the event
+vector, FRED requires the software to dispatch an event to its handler
+based on both the event's type and vector. Therefore, an event
+dispatch framework must be implemented to facilitate the
+event-to-handler dispatch process. The FRED event dispatch framework
+assumes control once an event is delivered, starting from two FRED
+entry points, after which several event dispatch tables are introduced
+to facilitate the dispatching.
+
+The first level dispatching is event type based, and two tables need
+to be defined, one for ring 3 event dispatching, and the other
+for ring 0.
+
+The second level dispatching is event vector based, and
+several tables need to be defined, e.g., an exception handler table
+for exception dispatching.
+
+Full supervisor/user context
+============================
+
+FRED event delivery atomically save and restore full supervisor/user
+context upon event delivery and return. Thus it avoids the problem of
+transient states due to %cr2 and/or %dr6, thus it is no longer needed
+to handle all the ugly corner cases caused by half baked CPU states.
+
+FRED allows explicit unblock of NMI with new event return instructions
+ERETS/ERETU, avoiding the mess caused by IRET which unconditionally
+unblocks NMI, when an exception happens during NMI handling.
+
+FRED always restores the full value of %rsp, thus ESPFIX is no longer
+needed when FRED is enabled.
+
+LKGS
+====
+
+LKGS behaves like the MOV to GS instruction except that it loads the
+base address into the IA32_KERNEL_GS_BASE MSR instead of the GS
+segment’s descriptor cache, which is exactly what Linux kernel does
+to load user level GS base. With LKGS, it ends up with avoiding
+mucking with kernel GS.
+
+Because FRED event delivery from ring 3 swaps the value of the GS base
+address and that of the IA32_KERNEL_GS_BASE MSR, and ERETU swaps the
+value of the GS base address and that of the IA32_KERNEL_GS_BASE MSR,
+plus the introduction of LKGS instruction, the SWAPGS instruction is
+no longer needed when FRED is enabled, thus is disallowed (#UD).
+
+Stack levels
+============
+
+4 stack levels 0~3 are introduced to replace the un-reentrant IST for
+handling events. Each stack level could be configured to use a
+dedicated stack.
+
+The current stack level could be unchanged or go higher upon FRED
+event delivery. If unchanged, the CPU keeps using the current event
+stack. If higher, the CPU switches to a new stack specified by the
+stack MSR of the new stack level.
+
+Only execution of a FRED return instruction ERETU or ERETS could lower
+the current stack level, causing the CPU to switch back to the stack
+it was on before a previous event delivery.
+satck.
diff --git a/Documentation/arch/x86/x86_64/index.rst b/Documentation/arch/x86/x86_64/index.rst
index a56070fc8e77..ad15e9bd623f 100644
--- a/Documentation/arch/x86/x86_64/index.rst
+++ b/Documentation/arch/x86/x86_64/index.rst
@@ -15,3 +15,4 @@ x86_64 Support
    cpu-hotplug-spec
    machinecheck
    fsgs
+   fred
-- 
2.34.1


  reply	other threads:[~2023-07-31  7:02 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-31  6:32 [PATCH v9 00/36] x86: enable FRED for x86-64 Xin Li
2023-07-31  6:32 ` Xin Li [this message]
2023-07-31  6:32 ` [PATCH v9 02/36] x86/fred: Add Kconfig option for FRED (CONFIG_X86_FRED) Xin Li
2023-07-31  6:32 ` [PATCH v9 03/36] x86/fred: Disable FRED support if CONFIG_X86_FRED is disabled Xin Li
2023-07-31  6:32 ` [PATCH v9 04/36] x86/cpufeatures: Add the cpu feature bit for FRED Xin Li
2023-07-31  6:32 ` [PATCH v9 05/36] x86/opcode: Add ERETU, ERETS instructions to x86-opcode-map Xin Li
2023-07-31  9:43   ` Masami Hiramatsu
2023-07-31 16:36     ` Li, Xin3
2023-07-31  6:32 ` [PATCH v9 06/36] x86/objtool: Teach objtool about ERETU and ERETS Xin Li
2023-07-31  6:32 ` [PATCH v9 07/36] x86/cpu: Add X86_CR4_FRED macro Xin Li
2023-07-31  6:32 ` [PATCH v9 08/36] x86/cpu: Add MSR numbers for FRED configuration Xin Li
2023-07-31  6:32 ` [PATCH v9 09/36] x86/fred: Make unions for the cs and ss fields in struct pt_regs Xin Li
2023-07-31  6:32 ` [PATCH v9 10/36] x86/fred: Add a new header file for FRED definitions Xin Li
2023-07-31  6:32 ` [PATCH v9 11/36] x86/fred: Reserve space for the FRED stack frame Xin Li
2023-07-31  6:32 ` [PATCH v9 12/36] x86/fred: Update MSR_IA32_FRED_RSP0 during task switch Xin Li
2023-07-31  6:32 ` [PATCH v9 13/36] x86/fred: Let ret_from_fork_asm() jmp to fred_exit_user when FRED is enabled Xin Li
2023-07-31  6:32 ` [PATCH v9 14/36] x86/fred: Disallow the swapgs instruction " Xin Li
2023-07-31  6:32 ` [PATCH v9 15/36] x86/fred: No ESPFIX needed " Xin Li
2023-07-31  6:32 ` [PATCH v9 16/36] x86/fred: Allow single-step trap and NMI when starting a new task Xin Li
2023-07-31  6:32 ` [PATCH v9 17/36] x86/fred: Define a common function type fred_handler Xin Li
2023-07-31  6:32 ` [PATCH v9 18/36] x86/fred: Add a page fault entry stub for FRED Xin Li
2023-07-31  6:33 ` [PATCH v9 19/36] x86/fred: Add a debug " Xin Li
2023-07-31  6:33 ` [PATCH v9 20/36] x86/fred: Add a NMI " Xin Li
2023-07-31  6:33 ` [PATCH v9 21/36] x86/fred: Add a machine check " Xin Li
2023-07-31  6:33 ` [PATCH v9 22/36] x86/fred: Add a double fault " Xin Li
2023-07-31  6:33 ` [PATCH v9 23/36] x86/entry: Remove idtentry_sysvec from entry_{32,64}.S Xin Li
2023-07-31  6:33 ` [PATCH v9 24/36] x86/idtentry: Incorporate definitions/declarations of the FRED external interrupt handler type Xin Li
2023-07-31  6:33 ` [PATCH v9 25/36] x86/traps: Add a system interrupt handler table for system interrupt dispatch Xin Li
2023-07-31 22:29 ` [PATCH v9 00/36] x86: enable FRED for x86-64 Sean Christopherson
2023-07-31 23:10   ` Li, Xin3
2023-07-31 23:17     ` Sean Christopherson
2023-07-31 23:56       ` Li, Xin3

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