From: Conor Dooley <conor@kernel.org>
To: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: Jonathan Corbet <corbet@lwn.net>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>, Will Deacon <will@kernel.org>,
Waiman Long <longman@redhat.com>,
Boqun Feng <boqun.feng@gmail.com>, Arnd Bergmann <arnd@arndb.de>,
Leonardo Bras <leobras@redhat.com>, Guo Ren <guoren@kernel.org>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-arch@vger.kernel.org
Subject: Re: [PATCH 1/7] riscv: Implement cmpxchg32/64() using Zacas
Date: Tue, 28 May 2024 16:34:48 +0100 [thread overview]
Message-ID: <20240528-repaint-graffiti-ec4f0e038e5a@spud> (raw)
In-Reply-To: <20240528151052.313031-2-alexghiti@rivosinc.com>
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On Tue, May 28, 2024 at 05:10:46PM +0200, Alexandre Ghiti wrote:
> This adds runtime support for Zacas in cmpxchg operations.
>
> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
> ---
> arch/riscv/Kconfig | 17 +++++++++++++++++
> arch/riscv/Makefile | 11 +++++++++++
> arch/riscv/include/asm/cmpxchg.h | 23 ++++++++++++++++++++---
> 3 files changed, 48 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 8a0f403432e8..b443def70139 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -579,6 +579,23 @@ config RISCV_ISA_V_PREEMPTIVE
> preemption. Enabling this config will result in higher memory
> consumption due to the allocation of per-task's kernel Vector context.
>
> +config TOOLCHAIN_HAS_ZACAS
> + bool
> + default y
> + depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zacas)
> + depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zacas)
> + depends on AS_HAS_OPTION_ARCH
> +
> +config RISCV_ISA_ZACAS
> + bool "Zacas extension support for atomic CAS"
> + depends on TOOLCHAIN_HAS_ZACAS
> + default y
> + help
> + Adds support to use atomic CAS instead of LR/SC to implement kernel
> + atomic cmpxchg operation.
If you were a person compiling a kernel, would you be able to read this
and realise that this is safe to enable when their system does not
support atomic CAS? Please take a look at other how other extensions
handle this, or the patch that I have been sending that tries to make
things clearer:
https://patchwork.kernel.org/project/linux-riscv/patch/20240528-varnish-status-9c22973093a0@spud/
> +
> + If you don't know what to do here, say Y.
> +
> config TOOLCHAIN_HAS_ZBB
> bool
> default y
> diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
> index 5b3115a19852..d5b60b87998c 100644
> --- a/arch/riscv/Makefile
> +++ b/arch/riscv/Makefile
> @@ -78,6 +78,17 @@ endif
> # Check if the toolchain supports Zihintpause extension
> riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) := $(riscv-march-y)_zihintpause
>
> +# Check if the toolchain supports Zacas
> +ifdef CONFIG_AS_IS_LLVM
> +# Support for experimental Zacas was merged in LLVM 17, but the removal of
> +# the "experimental" was merged in LLVM 19.
> +KBUILD_CFLAGS += -menable-experimental-extensions
> +KBUILD_AFLAGS += -menable-experimental-extensions
> +riscv-march-y := $(riscv-march-y)_zacas1p0
> +else
> +riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZACAS) := $(riscv-march-y)_zacas
> +endif
I'm almost certain that we discussed this before for vector and it was
decided to not enable experimental extensions (particularly as it is a
global option), and instead require the non-experimental versions.
This isn't even consistent with your TOOLCHAIN_HAS_ZACAS checks, that
will only enable the option for the ratified version. I think we should
continue to avoid enabling experimental extensions, even if that imposes
a requirement of having a bleeding edge toolchain to actually use the
extension.
Thanks,
Conor.
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next prev parent reply other threads:[~2024-05-28 15:34 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-28 15:10 [PATCH 0/7] Zacas/Zabha support and qspinlocks Alexandre Ghiti
2024-05-28 15:10 ` [PATCH 1/7] riscv: Implement cmpxchg32/64() using Zacas Alexandre Ghiti
2024-05-28 15:34 ` Conor Dooley [this message]
2024-05-29 12:20 ` Alexandre Ghiti
2024-05-30 14:43 ` Conor Dooley
2024-05-28 18:16 ` Andrea Parri
2024-05-28 15:10 ` [PATCH 2/7] riscv: Implement cmpxchg8/16() using Zabha Alexandre Ghiti
2024-05-28 19:31 ` Nathan Chancellor
2024-05-29 12:49 ` Alexandre Ghiti
2024-05-29 15:57 ` Nathan Chancellor
2024-06-03 15:31 ` Alexandre Ghiti
2024-05-28 23:54 ` Andrea Parri
2024-05-29 12:29 ` Alexandre Ghiti
2024-05-29 12:55 ` Alexandre Ghiti
2024-05-28 15:10 ` [PATCH 3/7] riscv: Implement arch_cmpxchg128() using Zacas Alexandre Ghiti
2024-05-28 15:10 ` [PATCH 4/7] riscv: Implement xchg8/16() using Zabha Alexandre Ghiti
2024-05-28 15:22 ` Conor Dooley
2024-05-29 6:15 ` Alexandre Ghiti
2024-05-28 18:00 ` Andrea Parri
2024-05-29 8:04 ` Alexandre Ghiti
2024-05-28 15:10 ` [PATCH 5/7] asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock Alexandre Ghiti
2024-05-28 15:10 ` [PATCH 6/7] asm-generic: ticket-lock: Add separate ticket-lock.h Alexandre Ghiti
2024-05-28 15:10 ` [PATCH 7/7] riscv: Add qspinlock support based on Zabha extension Alexandre Ghiti
2024-05-29 0:55 ` Andrea Parri
2024-05-31 13:37 ` Alexandre Ghiti
2024-05-31 15:52 ` Andrea Parri
2024-06-01 6:18 ` Guo Ren
2024-06-03 0:41 ` Andrea Parri
2024-05-29 9:23 ` Guo Ren
2024-05-29 13:03 ` Alexandre Ghiti
2024-05-30 1:54 ` Guo Ren
2024-05-30 5:30 ` Alexandre Ghiti
2024-05-31 1:57 ` Guo Ren
2024-05-31 6:22 ` Alexandre Ghiti
2024-05-31 6:42 ` Guo Ren
2024-06-03 9:21 ` Alexandre Ghiti
2024-06-03 11:11 ` Guo Ren
2024-05-31 13:10 ` Guo Ren
2024-06-03 9:49 ` Alexandre Ghiti
2024-06-03 11:28 ` Guo Ren
2024-06-03 11:34 ` Alexandre Ghiti
2024-06-03 11:44 ` Guo Ren
2024-06-03 11:49 ` Alexandre Ghiti
2024-06-03 11:57 ` Guo Ren
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